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Fixed bug #416. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5821 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2013-06-08 06:27:48 +00:00
parent 7a3a252875
commit 710dcf1e68
5 changed files with 23 additions and 21 deletions
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14
os/hal/platforms/STM32/USARTv1/serial_lld.c
View File

@ -98,16 +98,16 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
#else
if (sdp->usart == USART1)
#endif
u->BRR = STM32_PCLK2 / config->sc_speed;
u->BRR = STM32_PCLK2 / config->speed;
else
u->BRR = STM32_PCLK1 / config->sc_speed;
u->BRR = STM32_PCLK1 / config->speed;
/* Note that some bits are enforced.*/
u->CR2 = config->sc_cr2 | USART_CR2_LBDIE;
u->CR3 = config->sc_cr3 | USART_CR3_EIE;
u->CR1 = config->sc_cr1 | USART_CR1_UE | USART_CR1_PEIE |
USART_CR1_RXNEIE | USART_CR1_TE |
USART_CR1_RE;
u->CR2 = config->cr2 | USART_CR2_LBDIE;
u->CR3 = config->cr3 | USART_CR3_EIE;
u->CR1 = config->cr1 | USART_CR1_UE | USART_CR1_PEIE |
USART_CR1_RXNEIE | USART_CR1_TE |
USART_CR1_RE;
u->SR = 0;
(void)u->SR; /* SR reset step 1.*/
(void)u->DR; /* SR reset step 2.*/

8
os/hal/platforms/STM32/USARTv1/serial_lld.h
View File

@ -216,20 +216,20 @@ typedef struct {
/**
* @brief Bit rate.
*/
uint32_t sc_speed;
uint32_t speed;
/* End of the mandatory fields.*/
/**
* @brief Initialization value for the CR1 register.
*/
uint16_t sc_cr1;
uint16_t cr1;
/**
* @brief Initialization value for the CR2 register.
*/
uint16_t sc_cr2;
uint16_t cr2;
/**
* @brief Initialization value for the CR3 register.
*/
uint16_t sc_cr3;
uint16_t cr3;
} SerialConfig;
/**

12
os/hal/platforms/STM32/USARTv2/serial_lld.c
View File

@ -93,14 +93,14 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
USART_TypeDef *u = sdp->usart;
/* Baud rate setting.*/
u->BRR = (uint16_t)(sdp->clock / config->sc_speed);
u->BRR = (uint16_t)(sdp->clock / config->speed);
/* Note that some bits are enforced.*/
u->CR2 = config->sc_cr2 | USART_CR2_LBDIE;
u->CR3 = config->sc_cr3 | USART_CR3_EIE;
u->CR1 = config->sc_cr1 | USART_CR1_UE | USART_CR1_PEIE |
USART_CR1_RXNEIE | USART_CR1_TE |
USART_CR1_RE;
u->CR2 = config->cr2 | USART_CR2_LBDIE;
u->CR3 = config->cr3 | USART_CR3_EIE;
u->CR1 = config->cr1 | USART_CR1_UE | USART_CR1_PEIE |
USART_CR1_RXNEIE | USART_CR1_TE |
USART_CR1_RE;
u->ICR = 0xFFFFFFFF;
}

8
os/hal/platforms/STM32/USARTv2/serial_lld.h
View File

@ -216,20 +216,20 @@ typedef struct {
/**
* @brief Bit rate.
*/
uint32_t sc_speed;
uint32_t speed;
/* End of the mandatory fields.*/
/**
* @brief Initialization value for the CR1 register.
*/
uint16_t sc_cr1;
uint32_t cr1;
/**
* @brief Initialization value for the CR2 register.
*/
uint16_t sc_cr2;
uint32_t cr2;
/**
* @brief Initialization value for the CR3 register.
*/
uint16_t sc_cr3;
uint32_t cr3;
} SerialConfig;
/**

2
readme.txt
View File

@ -89,6 +89,8 @@
*****************************************************************************
*** 2.7.0 ***
- FIX: Fixed STM32 Serial (v2) driver invalid CR registers size (bug #416)
(backported to 2.6.0).
- FIX: Fixed MS2ST() and US2ST() macros error (bug #415)(backported to 2.6.0,
2.4.4, 2.2.10, NilRTOS).