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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5424 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-03-13 13:20:42 +00:00
parent 3670cd18fa
commit 6f4b10548d
6 changed files with 10 additions and 12 deletions
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2
boards/GENERIC_SPC564A/board.h
View File

@ -29,7 +29,7 @@
* Board frequencies.
*/
#if !defined(SPC5_XOSC_CLK)
#define SPC5_XOSC_CLK 8000000
#define SPC5_XOSC_CLK 40000000
#endif
/*

6
demos/PPC-SPC564A-GCC/mcuconf.h
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@ -31,9 +31,9 @@
#define SPC5_NO_INIT FALSE
#define SPC5_CLK_BYPASS FALSE
#define SPC5_ALLOW_OVERCLOCK FALSE
#define SPC5_CLK_PREDIV_VALUE 2
#define SPC5_CLK_MFD_VALUE 150
#define SPC5_CLK_RFD SPC5_RFD_DIV4
#define SPC5_CLK_PREDIV_VALUE 8
#define SPC5_CLK_MFD_VALUE 60
#define SPC5_CLK_RFD SPC5_RFD_DIV2
#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \
BIUCR_MASTER4_PREFETCH | \
BIUCR_MASTER0_PREFETCH | \

1
os/hal/platforms/SPC563Mxx/hal_lld.h
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@ -129,7 +129,6 @@
/**
* @brief External clock pre-divider.
* @note Must be in range 1...15.
* @note The effective divider factor is this value.
*/
#if !defined(SPC5_CLK_PREDIV) || defined(__DOXYGEN__)
#define SPC5_CLK_PREDIV_VALUE 2

7
os/hal/platforms/SPC564Axx/hal_lld.h
View File

@ -129,10 +129,9 @@
/**
* @brief External clock pre-divider.
* @note Must be in range 1...15.
* @note The effective divider factor is this value.
*/
#if !defined(SPC5_CLK_PREDIV) || defined(__DOXYGEN__)
#define SPC5_CLK_PREDIV_VALUE 2
#define SPC5_CLK_PREDIV_VALUE 8
#endif
/**
@ -140,14 +139,14 @@
* @note Must be in range 32...96.
*/
#if !defined(SPC5_CLK_MFD_VALUE) || defined(__DOXYGEN__)
#define SPC5_CLK_MFD_VALUE 80
#define SPC5_CLK_MFD_VALUE 60
#endif
/**
* @brief Reduced frequency divider.
*/
#if !defined(SPC5_CLK_RFD) || defined(__DOXYGEN__)
#define SPC5_CLK_RFD RFD_DIV4
#define SPC5_CLK_RFD RFD_DIV2
#endif
/**

4
os/hal/platforms/SPC564Axx/spc564a_registry.h
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@ -49,8 +49,8 @@
#define SPC5_ESCIB_NUMBER 149
#define SPC5_HAS_ESCIC TRUE
#define SPC5_ESCIB_HANDLER vector473
#define SPC5_ESCIB_NUMBER 473
#define SPC5_ESCIC_HANDLER vector473
#define SPC5_ESCIC_NUMBER 473
/* SIU attributes.*/
#define SPC5_HAS_SIU TRUE

2
os/hal/platforms/SPC5xx/EDMA_v1/spc5_edma.c
View File

@ -665,7 +665,7 @@ CH_IRQ_HANDLER(vector42) {
*/
CH_IRQ_HANDLER(vector210) {
edma_channel_t channel;
uint32_t erl, esr = EDMA.ESR.R;
uint32_t erh, esr = EDMA.ESR.R;
CH_IRQ_PROLOGUE();