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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2381 35acf78f-673a-0410-8e92-d51de3d6d3f4

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gdisirio 2010-11-17 13:58:02 +00:00
parent 5f707f9377
commit 6e35bf9bd8
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110
os/hal/platforms/STM8/hal_lld.c
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/hal_lld.c
* @brief STM8S HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{
*/
#include "ch.h"
#include "hal.h"
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
* @details Clock sources initialization, HSI is assumed to be already
* started after reset.
* @note If the @p STM8S_CLOCK_INIT option is set to @p FALSE then the
* initialization is not performed and is left to the application.
*
* @notapi
*/
void hal_lld_init(void) {
#if !STM8S_NO_CLOCK_INIT
/* Makes sure that HSI is stable before proceeding.*/
CLK->ICKR |= CLK_ICKR_HSIRDY;
while ((CLK->ICKR & CLK_ICKR_HSIRDY) == 0)
;
/* LSI startup and stabilization if required.*/
#if STM8S_LSI_ENABLED
CLK->ICKR |= CLK_ICKR_LSIEN;
while ((CLK->ICKR & CLK_ICKR_LSIRDY) == 0)
;
#endif
/* HSE startup and stabilization if required.*/
#if STM8S_HSE_ENABLED
CLK->ECKR |= CLK_ECKR_HSEEN;
while ((CLK->ECKR & CLK_ECKR_HSERDY) == 0)
;
#endif
/* Setting up clock dividers.*/
CLK->CKDIVR = (STM8S_HSI_DIVIDER << 3) | (STM8S_CPU_DIVIDER << 0);
/* SYSCLK switch to the selected source, not necessary if it is HSI.*/
#if STM8S_SYSCLK_SOURCE != CLK_SYSSEL_HSI
/* Switching clock (manual switch mode).*/
CLK->SWR = STM8S_SYSCLK_SOURCE;
while ((CLK->SWCR & CLK_SWCR_SWIF) == 0)
;
CLK->SWCR = CLK_SWCR_SWEN;
#endif
/* Clocks initially all disabled.*/
CLK->PCKENR1 = 0;
CLK->PCKENR2 = 0;
/* Other clock related initializations.*/
CLK->CSSR = 0;
CLK->CCOR = 0;
CLK->CANCCR = STM8S_CAN_DIVIDER_VALUE;
/* HSI disabled if it is no more required.*/
#if !STM8S_HSI_ENABLED
CLK->ICKR &= ~CLK_ICKR_HSIEN;
#endif
#endif /* !STM8S_NO_CLOCK_INIT */
}
/** @} */

231
os/hal/platforms/STM8/hal_lld.h
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/hal_lld.h
* @brief STM8S HAL subsystem low level driver source.
* @pre This module requires the following macros to be defined in the
* @p board.h file:
* - HSECLK (@p 0 if disabled or frequency in Hertz).
* .
* One of the following macros must also be defined:
* - STM8S103.
* - STM8S105.
* - STM8S207.
* - STM8S208.
* - STM8S903.
* .
*
* @addtogroup HAL
* @{
*/
#ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
#undef FALSE
#undef TRUE
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S105) || \
defined(STM8S103) || defined(STM8S903)
#include "stm8s.h"
#else
#error "unsupported or invalid STM8 platform"
#endif
#define FALSE 0
#define TRUE (!FALSE)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @brief Platform name.
*/
#define PLATFORM_NAME "STM8S"
#define LSICLK 128000 /**< Low speed internal clock. */
#define HSICLK 16000000 /**< High speed internal clock. */
#define CLK_SYSSEL_HSI 0xE1 /**< HSI clock selector. */
#define CLK_SYSSEL_LSI 0xD2 /**< LSI clock selector. */
#define CLK_SYSSEL_HSE 0xB4 /**< HSE clock selector. */
#define CLK_HSI_DIV1 0 /**< HSI clock divided by 1. */
#define CLK_HSI_DIV2 1 /**< HSI clock divided by 2. */
#define CLK_HSI_DIV4 2 /**< HSI clock divided by 4. */
#define CLK_HSI_DIV8 3 /**< HSI clock divided by 8. */
#define CLK_CPU_DIV1 0 /**< CPU clock divided by 1. */
#define CLK_CPU_DIV2 1 /**< CPU clock divided by 2. */
#define CLK_CPU_DIV4 2 /**< CPU clock divided by 4. */
#define CLK_CPU_DIV8 3 /**< CPU clock divided by 8. */
#define CLK_CPU_DIV16 4 /**< CPU clock divided by 16. */
#define CLK_CPU_DIV32 5 /**< CPU clock divided by 32. */
#define CLK_CPU_DIV64 6 /**< CPU clock divided by 64. */
#define CLK_CPU_DIV128 7 /**< CPU clock divided by 128. */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Disables the clock initialization in the HAL.
*/
#if !defined(STM8S_NO_CLOCK_INIT) || defined(__DOXYGEN__)
#define STM8S_NO_CLOCK_INIT FALSE
#endif
/**
* @brief Enables or disables the HSI clock source.
*/
#if !defined(STM8S_HSI_ENABLED) || defined(__DOXYGEN__)
#define STM8S_HSI_ENABLED FALSE
#endif
/**
* @brief Enables or disables the LSI clock source.
*/
#if !defined(STM8S_LSI_ENABLED) || defined(__DOXYGEN__)
#define STM8S_LSI_ENABLED TRUE
#endif
/**
* @brief Enables or disables the HSE clock source.
*/
#if !defined(STM8S_HSE_ENABLED) || defined(__DOXYGEN__)
#define STM8S_HSE_ENABLED TRUE
#endif
/**
* @brief Clock source setting.
*/
#if !defined(STM8S_SYSCLK_SOURCE) || defined(__DOXYGEN__)
#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE
#endif
/**
* @brief HSI clock divider.
*/
#if !defined(STM8S_HSI_DIVIDER) || defined(__DOXYGEN__)
#define STM8S_HSI_DIVIDER CLK_HSI_DIV8
#endif
/**
* @brief CPU clock divider.
*/
#if !defined(STM8S_CPU_DIVIDER) || defined(__DOXYGEN__)
#define STM8S_CPU_DIVIDER CLK_CPU_DIV1
#endif
/**
* @brief bxCAN divider value.
*/
#if !defined(STM8S_CAN_DIVIDER_VALUE) || defined(__DOXYGEN__)
#define STM8S_CAN_DIVIDER_VALUE 1
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if (STM8S_HSI_DIVIDER != CLK_HSI_DIV1) && \
(STM8S_HSI_DIVIDER != CLK_HSI_DIV2) && \
(STM8S_HSI_DIVIDER != CLK_HSI_DIV4) && \
(STM8S_HSI_DIVIDER != CLK_HSI_DIV8)
#error "specified invalid HSI divider"
#endif
#if (STM8S_CPU_DIVIDER != CLK_CPU_DIV1) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV2) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV4) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV8) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV16) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV32) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV64) && \
(STM8S_CPU_DIVIDER != CLK_CPU_DIV128)
#error "specified invalid CPU divider"
#endif
#if (STM8S_CAN_DIVIDER_VALUE < 1) || (STM8S_CAN_DIVIDER_VALUE > 8)
#error "specified invalid CAN divider value"
#endif
#if STM8S_HSE_ENABLED && (HSECLK == 0)
#error "impossible to activate HSE"
#endif
#if !STM8S_HSI_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSI)
#error "requested HSI clock is not enabled"
#endif
#if !STM8S_LSI_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_LSI)
#error "requested LSI clock is not enabled"
#endif
#if !STM8S_HSE_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSE)
#error "requested HSE clock is not enabled"
#endif
/**
* @brief System clock.
*/
#if STM8SL_NO_CLOCK_INIT || defined(__DOXYGEN__)
#define SYSCLK (HSICLK / 8)
#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSI
#define SYSCLK (HSICLK / (1 << STM8S_HSI_DIVIDER))
#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_LSI
#define SYSCLK LSICLK
#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSE
#define SYSCLK HSECLK
#else
#error "specified invalid clock source"
#endif
/**
* @brief CPU clock.
* @details On the STM8SS the CPU clock can be programmed to be a fraction of
* the system clock.
*/
#define CPUCLK (SYSCLK / (1 << STM8S_CPU_DIVIDER))
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void hal_lld_init(void);
#ifdef __cplusplus
}
#endif
#endif /* _HAL_LLD_H_ */
/** @} */

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os/hal/platforms/STM8/pal_lld.c
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/pal_lld.c
* @brief STM8S GPIO low level driver code.
*
* @addtogroup PAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note This function is not meant to be invoked directly by the
* application code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output at 2MHz.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
uint_fast8_t mode) {
switch (mode & PAL_MODE_MASK) {
case PAL_MODE_RESET:
case PAL_MODE_INPUT_PULLUP:
port->DDR &= ~mask;
port->CR1 |= mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_INPUT:
case PAL_MODE_INPUT_ANALOG:
port->DDR &= ~mask;
port->CR1 &= ~mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_UNCONNECTED:
case PAL_MODE_OUTPUT_PUSHPULL_SLOW:
port->DDR |= mask;
port->CR1 |= mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_OUTPUT_PUSHPULL:
port->DDR |= mask;
port->CR1 |= mask;
port->CR2 |= mask;
break;
case PAL_MODE_OUTPUT_OPENDRAIN_SLOW:
port->DDR |= mask;
port->CR1 &= ~mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_OUTPUT_OPENDRAIN:
port->DDR |= mask;
port->CR1 &= ~mask;
port->CR2 |= mask;
break;
}
}
#endif /* HAL_USE_PAL */
/** @} */

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os/hal/platforms/STM8/pal_lld.h
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/pal_lld.h
* @brief STM8S GPIO low level driver header.
*
* @addtogroup PAL
* @{
*/
#ifndef _PAL_LLD_H_
#define _PAL_LLD_H_
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Unsupported modes and specific modes */
/*===========================================================================*/
#undef PAL_MODE_INPUT_PULLDOWN
/**
* @brief STM8S specific alternate push-pull slow output mode.
*/
#define PAL_MODE_OUTPUT_PUSHPULL_SLOW 16
/**
* @brief STM8S specific alternate open-drain slow output mode.
*/
#define PAL_MODE_OUTPUT_OPENDRAIN_SLOW 17
/*===========================================================================*/
/* I/O Ports Types and constants. */
/*===========================================================================*/
/**
* @brief Generic I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialized the digital I/O
* subsystem. This represents only the initial setup, specific pads
* or whole ports can be reprogrammed at later time.
*/
typedef struct {
#if defined(STM8S105) || defined(__DOXYGEN__)
GPIO_TypeDef P[7];
#elif defined(STM8S207) || defined(STM8S208)
GPIO_TypeDef P[9];
#else
GPIO_TypeDef P[6];
#endif
} PALConfig;
/**
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 8
/**
* @brief Whole port mask.
* @brief This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
/**
* @brief Digital I/O port sized unsigned type.
*/
typedef uint8_t ioportmask_t;
/**
* @brief Port Identifier.
*/
typedef GPIO_TypeDef *ioportid_t;
/*===========================================================================*/
/* I/O Ports Identifiers. */
/*===========================================================================*/
/**
* @brief GPIO ports as a whole.
*/
#define IOPORTS ((PALConfig *)0x5000)
/**
* @brief GPIO port A identifier.
*/
#define IOPORT1 GPIOA
/**
* @brief GPIO port B identifier.
*/
#define IOPORT2 GPIOB
/**
* @brief GPIO port C identifier.
*/
#define IOPORT3 GPIOC
/**
* @brief GPIO port D identifier.
*/
#define IOPORT4 GPIOD
/**
* @brief GPIO port E identifier.
*/
#define IOPORT5 GPIOE
/**
* @brief GPIO port F identifier.
*/
#define IOPORT6 GPIOF
#if defined(STM8S207) || defined(STM8S208) || defined(STM8S105) || \
defined(__DOXYGEN__)
/**
* @brief GPIO port G identifier.
*/
#define IOPORT7 GPIOG
#endif
#if defined(STM8S207) || defined(STM8S208) || defined(__DOXYGEN__)
/**
* @brief GPIO port H identifier.
*/
#define IOPORT8 GPIOH
/**
* @brief GPIO port I identifier.
*/
#define IOPORT9 GPIOI
#endif
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */
/*===========================================================================*/
/**
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*
* @notapi
*/
#define pal_lld_init(config) *IOPORTS = *(config)
/**
* @brief Reads the physical I/O port states.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->IDR)
/**
* @brief Reads the output latch.
* @details The purpose of this function is to read back the latched output
* value.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->ODR)
/**
* @brief Writes a bits mask on a I/O port.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
/**
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note This function is not meant to be invoked directly by the
* application code.
* @note Programming an unknown or unsupported mode is silently ignored.
*
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
extern ROMCONST PALConfig pal_default_config;
#ifdef __cplusplus
extern "C" {
#endif
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
uint_fast8_t mode);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_PAL */
#endif /* _PAL_LLD_H_ */
/** @} */

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os/hal/platforms/STM8/platform.dox
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup STM8S STM8Sx Drivers
* @details This section describes all the supported drivers on the STM8S
* platform and the implementation details of the single drivers.
*
* @ingroup platforms
*/
/**
* @defgroup STM8S_HAL STM8S Initialization Support
* @details The STM8S HAL support is responsible for system initialization.
*
* @section stm8s_hal_1 Supported HW resources
* - CLK.
* .
* @section stm8s_hal_2 STM8S HAL driver implementation features
* - Clock tree initialization.
* - Clock source selection.
* .
* @ingroup STM8S
*/
/**
* @defgroup STM8S_PAL STM8S GPIO Support
* @details The STM8S PAL driver uses the GPIO peripherals.
*
* @section stm8s_pal_1 Supported HW resources
* - AFIO.
* - GPIOA.
* - GPIOB.
* - GPIOC.
* - GPIOD.
* - GPIOE.
* - GPIOF.
* - GPIOG (where present).
* - GPIOH (where present).
* - GPIOI (where present).
* .
* @section stm8s_pal_2 STM8S PAL driver implementation features
* The PAL driver implementation fully supports the following hardware
* capabilities:
* - 8 bits wide ports.
* - Atomic set/reset/toggle functions because special STM8S instruction set.
* - Output latched regardless of the pad setting.
* - Direct read of input pads regardless of the pad setting.
* .
* @section stm8s_pal_3 Supported PAL setup modes
* The STM8S PAL driver supports the following I/O modes:
* - @p PAL_MODE_RESET.
* - @p PAL_MODE_UNCONNECTED.
* - @p PAL_MODE_INPUT.
* - @p PAL_MODE_INPUT_PULLUP.
* - @p PAL_MODE_OUTPUT_PUSHPULL.
* - @p PAL_MODE_OUTPUT_OPENDRAIN.
* .
* Any attempt to setup an invalid mode is ignored.
*
* @section stm8s_pal_4 Suboptimal behavior
* The STM8S GPIO is less than optimal in several areas, the limitations
* should be taken in account while using the PAL driver:
* - Bus/group writing is not atomic.
* - Pad/group mode setup is not atomic.
* .
* @ingroup STM8S
*/
/**
* @defgroup STM8S_SPI STM8S SPI Support
* @details The SPI driver supports the STM8S SPI peripheral in an interrupt
* driven implementation.
* @note Being the SPI a fast peripheral, much care must be taken to
* not saturate the CPU bandwidth with an excessive IRQ rate. The
* maximum transfer bit rate is likely limited by the IRQ
* handling.
*
* @section stm8s_spi_1 Supported HW resources
* - SPI.
* .
* @section stm8s_spi_2 STM8S SPI driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Fully interrupt driven.
* .
* @ingroup STM8S
*/
/**
* @defgroup STM8S_SERIAL STM8S UART Support (buffered)
* @details The STM8S Serial driver uses the UART peripherals in a
* buffered, interrupt driven, implementation.
*
* @section stm8s_serial_1 Supported HW resources
* The serial driver can support any of the following hardware resources:
* - UART1.
* - UART2 (where present).
* - UART3 (where present).
* .
* @section stm8s_serial_2 STM8S Serial driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Each UART can be independently enabled and programmed. Unused
* peripherals are left in low power mode.
* - Fully interrupt driven.
* .
* @ingroup STM8S
*/

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/serial_lld.c
* @brief STM8S low level serial driver code.
*
* @addtogroup SERIAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief UART1 serial driver identifier.
*/
#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
SerialDriver SD1;
#endif
/**
* @brief UART2 serial driver identifier.
*/
#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
SerialDriver SD2;
#endif
/**
* @brief UART3 serial driver identifier.
*/
#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
SerialDriver SD3;
#endif
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/**
* @brief Driver default configuration.
*/
static ROMCONST SerialConfig default_config = {
BRR(SERIAL_DEFAULT_BITRATE),
SD_MODE_PARITY_NONE | SD_MODE_STOP_1
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void set_error(SerialDriver *sdp, uint8_t sr) {
sdflags_t sts = 0;
/* Note, SR register bit definitions are equal for all UARTs so using
the UART1 definitions is fine.*/
if (sr & UART1_SR_OR)
sts |= SD_OVERRUN_ERROR;
if (sr & UART1_SR_NF)
sts |= SD_NOISE_ERROR;
if (sr & UART1_SR_FE)
sts |= SD_FRAMING_ERROR;
if (sr & UART1_SR_PE)
sts |= SD_PARITY_ERROR;
chSysLockFromIsr();
sdAddFlagsI(sdp, sts);
chSysUnlockFromIsr();
}
#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
static void notify1(void) {
UART1->CR2 |= UART1_CR2_TIEN;
}
/**
* @brief UART1 initialization.
*
* @param[in] config architecture-dependent serial driver configuration
*/
static void uart1_init(const SerialConfig *config) {
UART1->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F));
UART1->BRR1 = (uint8_t)(config->sc_brr >> 4);
UART1->CR1 = (uint8_t)(config->sc_mode &
SD_MODE_PARITY); /* PIEN included. */
UART1->CR2 = UART1_CR2_RIEN | UART1_CR2_TEN | UART1_CR2_REN;
UART1->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
UART1->CR4 = 0;
UART1->CR5 = 0;
UART1->PSCR = 1;
(void)UART1->SR;
(void)UART1->DR;
}
/**
* @brief UART1 de-initialization.
*/
static void uart1_deinit(void) {
UART1->CR1 = UART1_CR1_UARTD;
UART1->CR2 = 0;
UART1->CR3 = 0;
UART1->CR4 = 0;
UART1->CR5 = 0;
UART1->PSCR = 0;
}
#endif /* STM8S_SERIAL_USE_UART1 */
#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
static void notify2(void) {
UART2->CR2 |= UART2_CR2_TIEN;
}
/**
* @brief UART2 initialization.
*
* @param[in] config architecture-dependent serial driver configuration
*/
static void uart2_init(const SerialConfig *config) {
UART2->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F));
UART2->BRR1 = (uint8_t)(config->sc_brr >> 4);
UART2->CR1 = (uint8_t)(config->sc_mode &
SD_MODE_PARITY); /* PIEN included. */
UART2->CR2 = UART2_CR2_RIEN | UART2_CR2_TEN | UART2_CR2_REN;
UART2->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
UART2->CR4 = 0;
UART2->CR5 = 0;
UART2->CR6 = 0;
UART2->PSCR = 1;
(void)UART2->SR;
(void)UART2->DR;
}
/**
* @brief UART1 de-initialization.
*/
static void uart2_deinit(void) {
UART2->CR1 = UART2_CR1_UARTD;
UART2->CR2 = 0;
UART2->CR3 = 0;
UART2->CR4 = 0;
UART2->CR5 = 0;
UART2->CR6 = 0;
UART2->PSCR = 0;
}
#endif /* STM8S_SERIAL_USE_UART1 */
#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
static void notify3(void) {
UART3->CR2 |= UART3_CR2_TIEN;
}
/**
* @brief UART3 initialization.
*
* @param[in] config architecture-dependent serial driver configuration
*/
static void uart3_init(const SerialConfig *config) {
UART3->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F));
UART3->BRR1 = (uint8_t)(config->sc_brr >> 4);
UART3->CR1 = (uint8_t)(config->sc_mode &
SD_MODE_PARITY); /* PIEN included. */
UART3->CR2 = UART3_CR2_RIEN | UART3_CR2_TEN | UART3_CR2_REN;
UART3->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
UART3->CR4 = 0;
UART3->CR6 = 0;
(void)UART3->SR;
(void)UART3->DR;
}
/**
* @brief UART3 de-initialization.
*/
static void uart3_deinit(void) {
UART3->CR1 = UART3_CR1_UARTD;
UART3->CR2 = 0;
UART3->CR3 = 0;
UART3->CR4 = 0;
UART3->CR6 = 0;
}
#endif /* STM8S_SERIAL_USE_UART3 */
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
/**
* @brief IRQ 17 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(17) {
msg_t b;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
b = sdRequestDataI(&SD1);
chSysUnlockFromIsr();
if (b < Q_OK)
UART1->CR2 &= (uint8_t)~UART1_CR2_TIEN;
else
UART1->DR = (uint8_t)b;
CH_IRQ_EPILOGUE();
}
/**
* @brief IRQ 18 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(18) {
uint8_t sr = UART1->SR;
CH_IRQ_PROLOGUE();
if ((sr = UART1->SR) & (UART1_SR_OR | UART1_SR_NF |
UART1_SR_FE | UART1_SR_PE))
set_error(&SD1, sr);
chSysLockFromIsr();
sdIncomingDataI(&SD1, UART1->DR);
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
#endif /* STM8S_SERIAL_USE_UART1 */
#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(20) {
msg_t b;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
b = sdRequestDataI(&SD2);
chSysUnlockFromIsr();
if (b < Q_OK)
UART2->CR2 &= (uint8_t)~UART2_CR2_TIEN;
else
UART2->DR = (uint8_t)b;
CH_IRQ_EPILOGUE();
}
/**
* @brief IRQ 21 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(21) {
uint8_t sr = UART2->SR;
CH_IRQ_PROLOGUE();
if ((sr = UART2->SR) & (UART2_SR_OR | UART2_SR_NF |
UART2_SR_FE | UART2_SR_PE))
set_error(&SD2, sr);
chSysLockFromIsr();
sdIncomingDataI(&SD2, UART2->DR);
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
#endif /* STM8S_SERIAL_USE_UART2 */
#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(20) {
msg_t b;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
b = sdRequestDataI(&SD3);
chSysUnlockFromIsr();
if (b < Q_OK)
UART3->CR2 &= (uint8_t)~UART3_CR2_TIEN;
else
UART3->DR = (uint8_t)b;
CH_IRQ_EPILOGUE();
}
/**
* @brief IRQ 21 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(21) {
uint8_t sr = UART3->SR;
CH_IRQ_PROLOGUE();
if ((sr = UART3->SR) & (UART3_SR_OR | UART3_SR_NF |
UART3_SR_FE | UART3_SR_PE))
set_error(&SD3, sr);
chSysLockFromIsr();
sdIncomingDataI(&SD3, UART3->DR);
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
#endif /* STM8S_SERIAL_USE_UART3 */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
#if STM8S_SERIAL_USE_UART1
sdObjectInit(&SD1, NULL, notify1);
CLK->PCKENR1 |= CLK_PCKENR1_UART1; /* PCKEN12, clock source. */
UART1->CR1 = UART1_CR1_UARTD; /* UARTD (low power). */
#endif
#if STM8S_SERIAL_USE_UART2
sdObjectInit(&SD2, NULL, notify2);
CLK->PCKENR1 |= CLK_PCKENR1_UART2; /* PCKEN13, clock source. */
UART2->CR1 = UART2_CR1_UARTD; /* UARTD (low power). */
#endif
#if STM8S_SERIAL_USE_UART3
sdObjectInit(&SD3, NULL, notify3);
CLK->PCKENR1 |= CLK_PCKENR1_UART3; /* PCKEN13, clock source. */
UART3->CR1 = UART3_CR1_UARTD; /* UARTD (low power). */
#endif
}
/**
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
if (config == NULL)
config = &default_config;
#if STM8S_SERIAL_USE_UART1
if (&SD1 == sdp) {
uart1_init(config);
return;
}
#endif
#if STM8S_SERIAL_USE_UART2
if (&SD2 == sdp) {
uart2_init(config);
return;
}
#endif
#if STM8S_SERIAL_USE_UART3
if (&SD3 == sdp) {
uart3_init(config);
return;
}
#endif
}
/**
* @brief Low level serial driver stop.
* @details De-initializes the USART, stops the associated clock, resets the
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {
#if STM8S_SERIAL_USE_UART1
if (&SD1 == sdp) {
uart1_deinit();
return;
}
#endif
#if STM8S_SERIAL_USE_UART2
if (&SD2 == sdp) {
uart2_deinit();
return;
}
#endif
#if STM8S_SERIAL_USE_UART3
if (&SD3 == sdp) {
uart3_deinit();
return;
}
#endif
}
#endif /* HAL_USE_SERIAL */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/serial_lld.h
* @brief STM8S low level serial driver header.
*
* @addtogroup SERIAL
* @{
*/
#ifndef _SERIAL_LLD_H_
#define _SERIAL_LLD_H_
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define SD_MODE_PARITY 0x07 /**< @brief Parity field mask. */
#define SD_MODE_PARITY_NONE 0x00 /**< @brief No parity. */
#define SD_MODE_PARITY_EVEN 0x05 /**< @brief Even parity. */
#define SD_MODE_PARITY_ODD 0x07 /**< @brief Odd parity. */
#define SD_MODE_STOP 0x30 /**< @brief Stop bits mask. */
#define SD_MODE_STOP_1 0x00 /**< @brief One stop bit. */
#define SD_MODE_STOP_2 0x20 /**< @brief Two stop bits. */
#define SD_MODE_STOP_1P5 0x30 /**< @brief 1.5 stop bits. */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief UART1 driver enable switch.
* @details If set to @p TRUE the support for UART1 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8S_SERIAL_USE_UART1) || defined(__DOXYGEN__)
#define STM8S_SERIAL_USE_UART1 TRUE
#endif
/**
* @brief UART2 driver enable switch.
* @details If set to @p TRUE the support for UART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8S_SERIAL_USE_UART2) || defined(__DOXYGEN__)
#define STM8S_SERIAL_USE_UART2 TRUE
#endif
/**
* @brief UART3 driver enable switch.
* @details If set to @p TRUE the support for UART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8S_SERIAL_USE_UART3) || defined(__DOXYGEN__)
#define STM8S_SERIAL_USE_UART3 TRUE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if STM8S_SERIAL_USE_UART2 && STM8S_SERIAL_USE_UART3
#error "STM8S UART2 and UART3 cannot be used together"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Serial Driver condition flags type.
*/
typedef uint8_t sdflags_t;
/**
* @brief Generic Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
* @note This structure content is architecture dependent, each driver
* implementation defines its own version and the custom static
* initializers.
*/
typedef struct {
/**
* @brief Bit rate register.
*/
uint16_t sc_brr;
/**
* @brief Mode flags.
*/
uint8_t sc_mode;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \
/* Driver state.*/ \
sdstate_t state; \
/* Input queue.*/ \
InputQueue iqueue; \
/* Output queue.*/ \
OutputQueue oqueue; \
/* Status Change @p EventSource.*/ \
EventSource sevent; \
/* I/O driver status flags.*/ \
sdflags_t flags; \
/* Input circular buffer.*/ \
uint8_t ib[SERIAL_BUFFERS_SIZE]; \
/* Output circular buffer.*/ \
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
/* End of the mandatory fields.*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Macro for baud rate computation.
* @note Make sure the final baud rate is within tolerance.
*/
#define BBR(b) (SYSCLK / (b))
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if STM8S_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif
#if STM8S_SERIAL_USE_UART2 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
#if STM8S_SERIAL_USE_UART3 && !defined(__DOXYGEN__)
extern SerialDriver SD3;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
void sd_lld_stop(SerialDriver *sdp);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SERIAL */
#endif /* _SERIAL_LLD_H_ */
/** @} */

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@ -1,290 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8S/spi_lld.c
* @brief STM8S low level SPI driver code.
*
* @addtogroup SPI
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_SPI || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
#if STM8S_SPI_USE_SPI || defined(__DOXYGEN__)
/** @brief SPI1 driver identifier.*/
SPIDriver SPID1;
#endif
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if STM8S_SPI_USE_SPI || defined(__DOXYGEN__)
/**
* @brief IRQ 10 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(10) {
CH_IRQ_PROLOGUE();
if ((SPI->SR & SPI_SR_OVR) != 0) {
/* The overflow condition should never happen because priority is given
to receive but a hook macro is provided anyway...*/
STM8S_SPI_ERROR_HOOK(&SPID1);
}
/* Handling the DR register like it is a FIFO with depth>1 in order to
handle the case where a frame arrives immediately after reading the
DR register.*/
while ((SPI->SR & SPI_SR_RXNE) != 0) {
if (SPID1.spd_rxptr != NULL)
*SPID1.spd_rxptr++ = SPI->DR;
else
(void)SPI->DR;
if (--SPID1.spd_rxcnt == 0) {
chDbgAssert(SPID1.spd_txcnt == 0,
"IRQ10, #1", "counter out of synch");
/* Stops all the IRQ sources.*/
SPI->ICR = 0;
/* Portable SPI ISR code defined in the high level driver, note, it
is a macro.*/
_spi_isr_code(&SPID1);
/* Goto because it is mandatory to go through the epilogue, cannot
just return.*/
goto exit_isr;
}
}
/* Loading the DR register.*/
if ((SPI->SR & SPI_SR_TXE) != 0) {
if (SPID1.spd_txptr != NULL)
SPI->DR = *SPID1.spd_txptr++;
else
SPI->DR = 0xFF;
}
exit_isr:
CH_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level SPI driver initialization.
*
* @notapi
*/
void spi_lld_init(void) {
#if STM8S_SPI_USE_SPI
spiObjectInit(&SPID1);
#endif /* STM8S_SPI_USE_SPI */
}
/**
* @brief Configures and activates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_start(SPIDriver *spip) {
/* Clock activation.*/
CLK->PCKENR1 |= CLK_PCKENR1_SPI; /* PCKEN11, clock source. */
/* Configuration.*/
SPI->CR2 = 0;
SPI->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR | SPI_CR1_SPE;
}
/**
* @brief Deactivates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_stop(SPIDriver *spip) {
(void)spip;
/* Reset state.*/
SPI->CR1 = 0;
SPI->CR2 = 0;
SPI->ICR = 0;
/* Clock de-activation.*/
CLK->PCKENR1 &= (uint8_t)~CLK_PCKENR1_SPI; /* PCKEN11, clock source. */
}
/**
* @brief Asserts the slave select signal and prepares for transfers.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_select(SPIDriver *spip) {
palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad);
}
/**
* @brief Deasserts the slave select signal.
* @details The previously selected peripheral is unselected.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_unselect(SPIDriver *spip) {
palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad);
}
/**
* @brief Ignores data on the SPI bus.
* @details This function transmits a series of idle words on the SPI bus and
* ignores the received data. This function can be invoked even
* when a slave select signal has not been yet asserted.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be ignored
*
* @notapi
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
spip->spd_rxptr = NULL;
spip->spd_txptr = NULL;
spip->spd_rxcnt = spip->spd_txcnt = n;
SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE;
}
/**
* @brief Exchanges data on the SPI bus.
* @details This asynchronous function starts a simultaneous transmit/receive
* operation.
* @post At the end of the operation the configured callback is invoked.
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be exchanged
* @param[in] txbuf the pointer to the transmit buffer
* @param[out] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
spip->spd_rxptr = rxbuf;
spip->spd_txptr = txbuf;
spip->spd_rxcnt = spip->spd_txcnt = n;
SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE;
}
/**
* @brief Sends data over the SPI bus.
* @details This asynchronous function starts a transmit operation.
* @post At the end of the operation the configured callback is invoked.
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @notapi
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
spip->spd_rxptr = NULL;
spip->spd_txptr = txbuf;
spip->spd_rxcnt = spip->spd_txcnt = n;
SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE;
}
/**
* @brief Receives data from the SPI bus.
* @details This asynchronous function starts a receive operation.
* @post At the end of the operation the configured callback is invoked.
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to receive
* @param[out] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
spip->spd_rxptr = rxbuf;
spip->spd_txptr = NULL;
spip->spd_rxcnt = spip->spd_txcnt = n;
SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE;
}
/**
* @brief Exchanges one frame using a polled wait.
* @details This synchronous function exchanges one frame using a polled
* synchronization method. This function is useful when exchanging
* small amount of data on high speed channels, usually in this
* situation is much more efficient just wait for completion using
* polling than suspending the thread waiting for an interrupt.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] frame the data frame to send over the SPI bus
* @return The received data frame from the SPI bus.
*/
uint8_t spi_lld_polled_exchange(SPIDriver *spip, uint8_t frame) {
(void)spip;
SPI->DR = (uint32_t)frame;
while ((SPI->SR & SPI_SR_RXNE) == 0)
;
return (uint16_t)SPI->DR;
}
#endif /* HAL_USE_SPI */
/** @} */

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@ -1,193 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file LPC13xx/spi_lld.h
* @brief LPC13xx low level SPI driver header.
*
* @addtogroup SPI
* @{
*/
#ifndef _SPI_LLD_H_
#define _SPI_LLD_H_
#if HAL_USE_SPI || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief SPI1 driver enable switch.
* @details If set to @p TRUE the support for device SSP0 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8S_SPI_USE_SPI) || defined(__DOXYGEN__)
#define STM8S_SPI_USE_SPI TRUE
#endif
/**
* @brief Overflow error hook.
* @details The default action is to stop the system.
*/
#if !defined(STM8S_SPI_SPI_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !STM8S_SPI_USE_SPI
#error "SPI driver activated but no SPI peripheral assigned"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type of a structure representing an SPI driver.
*/
typedef struct SPIDriver SPIDriver;
/**
* @brief SPI notification callback type.
*
* @param[in] spip pointer to the @p SPIDriver object triggering the
* callback
*/
typedef void (*spicallback_t)(SPIDriver *spip);
/**
* @brief Driver configuration structure.
*/
typedef struct {
/**
* @brief Operation complete callback or @p NULL.
* @note In order to use synchronous functions this field must be set to
* @p NULL, callbacks and synchronous operations are mutually
* exclusive.
*/
spicallback_t spc_endcb;
/* End of the mandatory fields.*/
/**
* @brief The chip select line port.
*/
ioportid_t spc_ssport;
/**
* @brief The chip select line pad number.
*/
uint16_t spc_sspad;
/**
* @brief SPI initialization data.
*/
uint8_t spc_cr1;
} SPIConfig;
/**
* @brief Structure representing a SPI driver.
*/
struct SPIDriver {
/**
* @brief Driver state.
*/
spistate_t spd_state;
/**
* @brief Current configuration data.
*/
const SPIConfig *spd_config;
#if SPI_USE_WAIT || defined(__DOXYGEN__)
/**
* @brief Waiting thread.
*/
Thread *spd_thread;
#endif /* SPI_USE_WAIT */
#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if CH_USE_MUTEXES || defined(__DOXYGEN__)
/**
* @brief Mutex protecting the bus.
*/
Mutex spd_mutex;
#elif CH_USE_SEMAPHORES
Semaphore spd_semaphore;
#endif
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#if defined(SPI_DRIVER_EXT_FIELDS)
SPI_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/**
* @brief Number of bytes yet to be received.
*/
uint16_t spd_rxcnt;
/**
* @brief Receive pointer or @p NULL.
*/
uint8_t *spd_rxptr;
/**
* @brief Number of bytes yet to be transmitted.
*/
uint16_t spd_txcnt;
/**
* @brief Transmit pointer or @p NULL.
*/
const uint8_t *spd_txptr;
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if STM8S_SPI_USE_SPI && !defined(__DOXYGEN__)
extern SPIDriver SPID1;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void spi_lld_init(void);
void spi_lld_start(SPIDriver *spip);
void spi_lld_stop(SPIDriver *spip);
void spi_lld_select(SPIDriver *spip);
void spi_lld_unselect(SPIDriver *spip);
void spi_lld_ignore(SPIDriver *spip, size_t n);
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf);
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
uint8_t spi_lld_polled_exchange(SPIDriver *spip, uint8_t frame);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SPI */
#endif /* _SPI_LLD_H_ */
/** @} */

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os/hal/platforms/STM8/stm8.h
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@ -1,36 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _STM8_H_
#define _STM8_H_
#undef FALSE
#undef TRUE
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S105) || \
defined(STM8S103) || defined (STM8S903)
#include "stm8s.h"
#else
#error "unsupported or invalid STM8 platform"
#endif
#define FALSE 0
#define TRUE (!FALSE)
#endif /* _STM8_H_ */

2567
os/hal/platforms/STM8/stm8s.h
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103
os/hal/platforms/STM8/stm8s_type.h
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@ -1,103 +0,0 @@
/**
******************************************************************************
* @file stm8s_type.h
* @brief This file contains all common data types.
* @author STMicroelectronics - MCD Application Team
* @version V1.1.1
* @date 06/05/2009
******************************************************************************
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
* @image html logo.bmp
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_TYPE_H
#define __STM8S_TYPE_H
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
typedef signed long s32;
typedef signed short s16;
typedef signed char s8;
typedef signed long const sc32; /* Read Only */
typedef signed short const sc16; /* Read Only */
typedef signed char const sc8; /* Read Only */
typedef volatile signed long vs32;
typedef volatile signed short vs16;
typedef volatile signed char vs8;
typedef volatile signed long const vsc32; /* Read Only */
typedef volatile signed short const vsc16; /* Read Only */
typedef volatile signed char const vsc8; /* Read Only */
typedef unsigned long u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef unsigned long const uc32; /* Read Only */
typedef unsigned short const uc16; /* Read Only */
typedef unsigned char const uc8; /* Read Only */
typedef volatile unsigned long vu32;
typedef volatile unsigned short vu16;
typedef volatile unsigned char vu8;
typedef volatile unsigned long const vuc32; /* Read Only */
typedef volatile unsigned short const vuc16; /* Read Only */
typedef volatile unsigned char const vuc8; /* Read Only */
typedef enum
{
FALSE = 0,
TRUE = !FALSE
}
bool;
typedef enum {
RESET = 0,
SET = !RESET
}
FlagStatus, ITStatus, BitStatus;
typedef enum {
DISABLE = 0,
ENABLE = !DISABLE
}
FunctionalState;
#define IS_FUNCTIONALSTATE_OK(VALUE) ( (VALUE == ENABLE) || (VALUE == DISABLE) )
typedef enum {
ERROR = 0,
SUCCESS = !ERROR
}
ErrorStatus;
#define U8_MAX ((u8)255)
#define S8_MAX ((s8)127)
#define S8_MIN ((s8)-128)
#define U16_MAX ((u16)65535u)
#define S16_MAX ((s16)32767)
#define S16_MIN ((s16)-32768)
#define U32_MAX ((u32)4294967295uL)
#define S32_MAX ((s32)2147483647)
#define S32_MIN ((s32)-2147483648)
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __STM8S_TYPE_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/