From 6d58b61eca6da57b7305ad5f2fc954d10b9eb3e4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 4 Feb 2013 10:32:32 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5109 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld | 11 +++-------- os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld | 11 +++-------- os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld | 11 +++-------- 3 files changed, 9 insertions(+), 24 deletions(-) diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld index b84620ed8..977db64a1 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld +++ b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld @@ -46,17 +46,12 @@ SECTIONS . = ORIGIN(flash); .boot : ALIGN(16) SUBALIGN(16) { + __ivpr_base__ = .; KEEP(*(.bam)) KEEP(*(.crt0)) - . = ALIGN(0x00000800); - KEEP(*(.vectors)) - /* Note, have to waste the first 64KB because the IVPR register - requires an alignment of 64KB and the first 64KB cannot be used, - IVOR0 would conflict with the BAM word. Applications could - allocate code or data in the first 64KB by using special sections.*/ - . = ALIGN(0x00010000); - __ivpr_base__ = .; KEEP(*(.handlers)) + . = ALIGN(0x800); + KEEP(*(.vectors)) } > flash constructors : ALIGN(4) SUBALIGN(4) diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld index 3cf9e44c9..aceed57d8 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld +++ b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld @@ -46,17 +46,12 @@ SECTIONS . = ORIGIN(flash); .boot : ALIGN(16) SUBALIGN(16) { + __ivpr_base__ = .; KEEP(*(.bam)) KEEP(*(.crt0)) - . = ALIGN(0x00000800); - KEEP(*(.vectors)) - /* Note, have to waste the first 64KB because the IVPR register - requires an alignment of 64KB and the first 64KB cannot be used, - IVOR0 would conflict with the BAM word. Applications could - allocate code or data in the first 64KB by using special sections.*/ - . = ALIGN(0x00010000); - __ivpr_base__ = .; KEEP(*(.handlers)) + . = ALIGN(0x800); + KEEP(*(.vectors)) } > flash constructors : ALIGN(4) SUBALIGN(4) diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld index 8a7674be1..ed9a9761e 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld +++ b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld @@ -46,17 +46,12 @@ SECTIONS . = ORIGIN(flash); .boot : ALIGN(16) SUBALIGN(16) { + __ivpr_base__ = .; KEEP(*(.bam)) KEEP(*(.crt0)) - . = ALIGN(0x00000800); - KEEP(*(.vectors)) - /* Note, have to waste the first 64KB because the IVPR register - requires an alignment of 64KB and the first 64KB cannot be used, - IVOR0 would conflict with the BAM word. Applications could - allocate code or data in the first 64KB by using special sections.*/ - . = ALIGN(0x00010000); - __ivpr_base__ = .; KEEP(*(.handlers)) + . = ALIGN(0x800); + KEEP(*(.vectors)) } > flash constructors : ALIGN(4) SUBALIGN(4)