Fixed bugs 3536522 and 3536523.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4309 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
0d1164787e
commit
6af0806da3
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@ -196,7 +196,7 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) {
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*
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*
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* @isr
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* @isr
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*/
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*/
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CH_IRQ_HANDLER(TIM8_IRQHandler) {
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CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
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CH_IRQ_PROLOGUE();
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CH_IRQ_PROLOGUE();
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@ -141,11 +141,28 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
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CH_IRQ_EPILOGUE();
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CH_IRQ_EPILOGUE();
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}
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}
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/**
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* @brief TIM1 compare interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
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CH_IRQ_PROLOGUE();
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icu_lld_serve_interrupt(&ICUD1);
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM32_ICU_USE_TIM1 */
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#endif /* STM32_ICU_USE_TIM1 */
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#if STM32_ICU_USE_TIM2
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#if STM32_ICU_USE_TIM2
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/**
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/**
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* @brief TIM2 compare interrupt handler.
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* @brief TIM2 interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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* perform an extra check in a potentially critical interrupt handler.
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@ -164,7 +181,7 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) {
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#if STM32_ICU_USE_TIM3
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#if STM32_ICU_USE_TIM3
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/**
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/**
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* @brief TIM3 compare interrupt handler.
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* @brief TIM3 interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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* perform an extra check in a potentially critical interrupt handler.
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@ -183,7 +200,7 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) {
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#if STM32_ICU_USE_TIM4
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#if STM32_ICU_USE_TIM4
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/**
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/**
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* @brief TIM4 compare interrupt handler.
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* @brief TIM4 interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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* perform an extra check in a potentially critical interrupt handler.
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@ -202,7 +219,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
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#if STM32_ICU_USE_TIM5
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#if STM32_ICU_USE_TIM5
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/**
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/**
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* @brief TIM5 compare interrupt handler.
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* @brief TIM5 interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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* perform an extra check in a potentially critical interrupt handler.
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@ -236,6 +253,23 @@ CH_IRQ_HANDLER(TIM8_CC_IRQHandler) {
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CH_IRQ_EPILOGUE();
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CH_IRQ_EPILOGUE();
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}
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}
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/**
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* @brief TIM8 compare interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
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CH_IRQ_PROLOGUE();
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icu_lld_serve_interrupt(&ICUD8);
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM32_ICU_USE_TIM8 */
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#endif /* STM32_ICU_USE_TIM8 */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -308,6 +342,8 @@ void icu_lld_start(ICUDriver *icup) {
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rccResetTIM1();
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rccResetTIM1();
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nvicEnableVector(TIM1_CC_IRQn,
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nvicEnableVector(TIM1_CC_IRQn,
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
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nvicEnableVector(TIM1_UP_IRQn,
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
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icup->clock = STM32_TIMCLK2;
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icup->clock = STM32_TIMCLK2;
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}
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}
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#endif
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#endif
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@ -354,6 +390,8 @@ void icu_lld_start(ICUDriver *icup) {
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rccResetTIM8();
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rccResetTIM8();
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nvicEnableVector(TIM8_CC_IRQn,
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nvicEnableVector(TIM8_CC_IRQn,
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
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nvicEnableVector(TIM8_UP_IRQn,
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
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icup->clock = STM32_TIMCLK2;
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icup->clock = STM32_TIMCLK2;
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}
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}
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#endif
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#endif
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@ -443,6 +481,7 @@ void icu_lld_stop(ICUDriver *icup) {
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#if STM32_ICU_USE_TIM1
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#if STM32_ICU_USE_TIM1
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if (&ICUD1 == icup) {
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if (&ICUD1 == icup) {
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nvicDisableVector(TIM1_CC_IRQn);
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nvicDisableVector(TIM1_CC_IRQn);
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nvicDisableVector(TIM1_UP_IRQn);
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rccDisableTIM1(FALSE);
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rccDisableTIM1(FALSE);
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}
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}
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#endif
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#endif
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@ -474,6 +513,7 @@ void icu_lld_stop(ICUDriver *icup) {
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#if STM32_ICU_USE_TIM8
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#if STM32_ICU_USE_TIM8
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if (&ICUD8 == icup) {
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if (&ICUD8 == icup) {
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nvicDisableVector(TIM8_CC_IRQn);
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nvicDisableVector(TIM8_CC_IRQn);
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nvicDisableVector(TIM8_UP_IRQn);
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rccDisableTIM8(FALSE);
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rccDisableTIM8(FALSE);
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}
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}
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#endif
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#endif
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@ -47,6 +47,9 @@
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#if defined(STM32F0XX)
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#if defined(STM32F0XX)
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#include "stm32f0xx.h"
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#include "stm32f0xx.h"
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/* Resolving naming anomalies related to the STM32F0xx sub-family.*/
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#define TIM1_UP_IRQn TIM1_BRK_UP_TRG_COM_IRQn
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#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
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#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
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defined(STM32F10X_HD_VL) || defined(STM32F10X_LD) || \
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defined(STM32F10X_HD_VL) || defined(STM32F10X_LD) || \
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defined(STM32F10X_MD) || defined(STM32F10X_HD) || \
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defined(STM32F10X_MD) || defined(STM32F10X_HD) || \
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@ -57,13 +60,28 @@
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/* Resolving naming anomalies related to the STM32F1xx sub-family.*/
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/* Resolving naming anomalies related to the STM32F1xx sub-family.*/
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#define CAN1_TX_IRQn USB_HP_CAN1_TX_IRQn
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#define CAN1_TX_IRQn USB_HP_CAN1_TX_IRQn
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#define CAN1_RX0_IRQn USB_LP_CAN1_RX0_IRQn
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#define CAN1_RX0_IRQn USB_LP_CAN1_RX0_IRQn
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#if defined(STM32F10X_XL)
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#define TIM1_UP_IRQn TIM1_UP_TIM16_IRQn
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#define TIM8_UP_IRQn TIM8_UP_TIM13_IRQn
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#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
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defined(STM32F10X_HD_VL)
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#define TIM1_UP_IRQn TIM1_UP_TIM16_IRQn
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#endif
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#elif defined(STM32F2XX)
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#elif defined(STM32F2XX)
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#include "stm32f2xx.h"
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#include "stm32f2xx.h"
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/* Resolving naming anomalies related to the STM32F2xx sub-family.*/
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#define TIM1_UP_IRQn TIM1_UP_TIM10_IRQn
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#define TIM8_UP_IRQn TIM8_UP_TIM13_IRQn
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#elif defined(STM32F4XX)
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#elif defined(STM32F4XX)
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#include "stm32f4xx.h"
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#include "stm32f4xx.h"
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/* Resolving naming anomalies related to the STM32F4xx sub-family.*/
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#define TIM1_UP_IRQn TIM1_UP_TIM10_IRQn
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#define TIM8_UP_IRQn TIM8_UP_TIM13_IRQn
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#elif defined(STM32L1XX_MD)
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#elif defined(STM32L1XX_MD)
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#include "stm32l1xx.h"
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#include "stm32l1xx.h"
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@ -52,13 +52,13 @@
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* queue-level function or macro.
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* queue-level function or macro.
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*/
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*/
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static size_t writes(void *ip, const uint8_t *bp, size_t n) {
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static size_t write(void *ip, const uint8_t *bp, size_t n) {
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return chOQWriteTimeout(&((SerialDriver *)ip)->oqueue, bp,
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return chOQWriteTimeout(&((SerialDriver *)ip)->oqueue, bp,
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n, TIME_INFINITE);
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n, TIME_INFINITE);
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}
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}
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static size_t reads(void *ip, uint8_t *bp, size_t n) {
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static size_t read(void *ip, uint8_t *bp, size_t n) {
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return chIQReadTimeout(&((SerialDriver *)ip)->iqueue, bp,
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return chIQReadTimeout(&((SerialDriver *)ip)->iqueue, bp,
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n, TIME_INFINITE);
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n, TIME_INFINITE);
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@ -99,7 +99,7 @@ static chnflags_t getflags(void *ip) {
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}
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}
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static const struct SerialDriverVMT vmt = {
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static const struct SerialDriverVMT vmt = {
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writes, reads, put, get,
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write, read, put, get,
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putt, gett, writet, readt,
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putt, gett, writet, readt,
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getflags
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getflags
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};
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};
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@ -61,13 +61,13 @@ static cdc_linecoding_t linecoding = {
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* Interface implementation.
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* Interface implementation.
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*/
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*/
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static size_t writes(void *ip, const uint8_t *bp, size_t n) {
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static size_t write(void *ip, const uint8_t *bp, size_t n) {
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return chOQWriteTimeout(&((SerialUSBDriver *)ip)->oqueue, bp,
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return chOQWriteTimeout(&((SerialUSBDriver *)ip)->oqueue, bp,
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n, TIME_INFINITE);
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n, TIME_INFINITE);
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}
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}
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static size_t reads(void *ip, uint8_t *bp, size_t n) {
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static size_t read(void *ip, uint8_t *bp, size_t n) {
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return chIQReadTimeout(&((SerialUSBDriver *)ip)->iqueue, bp,
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return chIQReadTimeout(&((SerialUSBDriver *)ip)->iqueue, bp,
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n, TIME_INFINITE);
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n, TIME_INFINITE);
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@ -108,7 +108,7 @@ static chnflags_t getflags(void *ip) {
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}
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}
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static const struct SerialUSBDriverVMT vmt = {
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static const struct SerialUSBDriverVMT vmt = {
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writes, reads, put, get,
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write, read, put, get,
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putt, gett, writet, readt,
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putt, gett, writet, readt,
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getflags
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getflags
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};
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};
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@ -81,6 +81,10 @@
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*****************************************************************************
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*****************************************************************************
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*** 2.5.0 ***
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*** 2.5.0 ***
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- FIX: Fixed TIM8 not working in STM32 GPT driver (bug 3536523)(backported
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to 2.4.2).
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- FIX: Fixed timer overflow not working in STM32 ICU driver for TIM1/TIM8 (bug
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3536522)(backported to 2.4.2).
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- FIX: Fixed wrong DMA channels on USART2 in STM32F10X_MD_VL devices (bug
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- FIX: Fixed wrong DMA channels on USART2 in STM32F10X_MD_VL devices (bug
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3536070)(backported to 2.4.2).
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3536070)(backported to 2.4.2).
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- FIX: Fixed issue with DMA channel init in STM32 ADC and SPI drivers (bug
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- FIX: Fixed issue with DMA channel init in STM32 ADC and SPI drivers (bug
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