git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6098 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
636f02da90
commit
68ea680d84
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@ -1,5 +1,6 @@
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# List of all the STM32F30x platform files.
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PLATFORMSRC = ${CHIBIOS}/os/halnew/platforms/STM32F30x/stm32_dma.c \
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PLATFORMSRC = ${CHIBIOS}/os/halnew/platforms/common/ARMCMx/nvic.c \
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${CHIBIOS}/os/halnew/platforms/STM32F30x/stm32_dma.c \
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${CHIBIOS}/os/halnew/platforms/STM32F30x/hal_lld.c \
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${CHIBIOS}/os/halnew/platforms/STM32F30x/adc_lld.c \
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${CHIBIOS}/os/halnew/platforms/STM32F30x/ext_lld_isr.c \
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@ -18,7 +19,8 @@ PLATFORMSRC = ${CHIBIOS}/os/halnew/platforms/STM32F30x/stm32_dma.c \
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${CHIBIOS}/os/halnew/platforms/STM32/USBv1/usb_lld.c
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# Required include directories
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PLATFORMINC = ${CHIBIOS}/os/halnew/platforms/STM32F30x \
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PLATFORMINC = ${CHIBIOS}/os/halnew/platforms/common/ARMCMx \
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${CHIBIOS}/os/halnew/platforms/STM32F30x \
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${CHIBIOS}/os/halnew/platforms/STM32 \
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${CHIBIOS}/os/halnew/platforms/STM32/GPIOv2 \
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${CHIBIOS}/os/halnew/platforms/STM32/I2Cv2 \
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@ -0,0 +1,57 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file common/ARMCMx/nvic.c
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* @brief Cortex-Mx NVIC support code.
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*
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* @addtogroup COMMON_ARMCMx_NVIC
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* @{
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*/
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#include "hal.h"
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/**
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* @brief Sets the priority of an interrupt handler and enables it.
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* @note The parameters are not tested for correctness.
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*
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* @param[in] n the interrupt number
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* @param[in] prio the interrupt priority mask
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*/
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void nvicEnableVector(uint32_t n, uint32_t prio) {
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NVIC->IP[n] = prio << (8 - __NVIC_PRIO_BITS);
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NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
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NVIC->ISER[n >> 5] = 1 << (n & 0x1F);
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}
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/**
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* @brief Disables an interrupt handler.
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* @note The parameters are not tested for correctness.
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*
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* @param[in] n the interrupt number
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*/
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void nvicDisableVector(uint32_t n) {
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NVIC->ICER[n >> 5] = 1 << (n & 0x1F);
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NVIC->IP[n] = 0;
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}
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/** @} */
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@ -0,0 +1,43 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file common/ARMCMx/nvic.h
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* @brief Cortex-Mx NVIC support macros and structures.
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*
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* @addtogroup COMMON_ARMCMx_NVIC
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* @{
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*/
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#ifndef _NVIC_H_
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#define _NVIC_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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void nvicEnableVector(uint32_t n, uint32_t prio);
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void nvicDisableVector(uint32_t n);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _NVIC_H_ */
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/** @} */
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@ -31,11 +31,11 @@
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#include "chcore.h"
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#if !defined(FALSE) || defined(__DOXYGEN__)
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#define FALSE 0
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#define FALSE 0
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#endif
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#if !defined(TRUE) || defined(__DOXYGEN__)
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#define TRUE 1
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#define TRUE 1
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#endif
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#if !defined(__DOXYGEN__)
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* Performs a context switch between two threads.
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*--------------------------------------------------------------------------*/
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.thumb_func
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.globl _port_switch
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.globl _port_switch
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_port_switch:
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push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
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#if CORTEX_USE_FPU
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* called on thread function return.
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*--------------------------------------------------------------------------*/
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.thumb_func
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.globl _port_thread_start
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.globl _port_thread_start
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_port_thread_start:
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#if CH_DBG_SYSTEM_STATE_CHECK
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bl dbg_check_unlock
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* Exception handlers return here for context switching.
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*--------------------------------------------------------------------------*/
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.thumb_func
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.globl _port_switch_from_isr
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.globl _port_switch_from_isr
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_port_switch_from_isr:
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#if CH_DBG_STATISTICS
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bl _stats_start_measure_crit_thd
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#if CH_DBG_STATISTICS
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bl _stats_stop_measure_crit_thd
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#endif
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.globl _port_exit_from_isr
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_port_exit_from_isr:
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#if CORTEX_SIMPLIFIED_PRIORITY
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mov r3, #SCB_ICSR :AND: 0xFFFF
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