git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6140 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-08-12 15:42:54 +00:00
parent 3fb6b81233
commit 67e80419b7
6 changed files with 49 additions and 18 deletions

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@ -35,7 +35,6 @@
#include "hal_lld.h" #include "hal_lld.h"
/* Abstract interfaces.*/ /* Abstract interfaces.*/
#include "hal_streams.h" #include "hal_streams.h"
#include "hal_channels.h" #include "hal_channels.h"

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@ -73,7 +73,7 @@
/* Driver local functions. */ /* Driver local functions. */
/*===========================================================================*/ /*===========================================================================*/
static void initgpio(GPIO_TypeDef *gpiop, const stm32_gpio_setup_t *config) { static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) {
gpiop->OTYPER = config->otyper; gpiop->OTYPER = config->otyper;
gpiop->OSPEEDR = config->ospeedr; gpiop->OSPEEDR = config->ospeedr;

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@ -130,6 +130,21 @@
PAL_STM32_OTYPE_OPENDRAIN) PAL_STM32_OTYPE_OPENDRAIN)
/** @} */ /** @} */
/**
* @name GPIO ports definitions
* @{
*/
#define GPIOA ((stm32_gpio_t *)GPIOA_BASE)
#define GPIOB ((stm32_gpio_t *)GPIOB_BASE)
#define GPIOC ((stm32_gpio_t *)GPIOC_BASE)
#define GPIOD ((stm32_gpio_t *)GPIOD_BASE)
#define GPIOE ((stm32_gpio_t *)GPIOE_BASE)
#define GPIOF ((stm32_gpio_t *)GPIOF_BASE)
#define GPIOG ((stm32_gpio_t *)GPIOG_BASE)
#define GPIOH ((stm32_gpio_t *)GPIOH_BASE)
#define GPIOI ((stm32_gpio_t *)GPIOI_BASE)
/** @} */
/*===========================================================================*/ /*===========================================================================*/
/* I/O Ports Types and constants. */ /* I/O Ports Types and constants. */
/*===========================================================================*/ /*===========================================================================*/
@ -155,7 +170,8 @@ typedef struct {
volatile uint32_t LCKR; volatile uint32_t LCKR;
volatile uint32_t AFRL; volatile uint32_t AFRL;
volatile uint32_t AFRH; volatile uint32_t AFRH;
} GPIO_TypeDef; volatile uint32_t BRR;
} stm32_gpio_t;
/** /**
* @brief GPIO port setup info. * @brief GPIO port setup info.
@ -242,7 +258,7 @@ typedef uint32_t iomode_t;
* any assumption about it, use the provided macros when populating * any assumption about it, use the provided macros when populating
* variables of this type. * variables of this type.
*/ */
typedef GPIO_TypeDef * ioportid_t; typedef stm32_gpio_t * ioportid_t;
/*===========================================================================*/ /*===========================================================================*/
/* I/O Ports Identifiers. */ /* I/O Ports Identifiers. */

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@ -15,11 +15,11 @@
*/ */
/** /**
* @file stm32_timh * @file stm32_tim.h
* @brief STM32 TIM registers layout header. * @brief STM32 TIM registers layout header.
* @note This file requires definitions from the ST STM32 header file. * @note This file requires definitions from the ST STM32 header file.
* *
* @addtogroup STM32_TIM * @addtogroup STM32_TIMv1
* @{ * @{
*/ */

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@ -42,16 +42,19 @@
#ifndef _STM32_H_ #ifndef _STM32_H_
#define _STM32_H_ #define _STM32_H_
#if defined(STM32F0XX)
#include "stm32f0xx.h"
#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \ #if defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
defined(STM32F10X_HD_VL) || defined(STM32F10X_LD) || \ defined(STM32F10X_HD_VL) || defined(STM32F10X_LD) || \
defined(STM32F10X_MD) || defined(STM32F10X_HD) || \ defined(STM32F10X_MD) || defined(STM32F10X_HD) || \
defined(STM32F10X_XL) || defined(STM32F10X_CL) || \ defined(STM32F10X_XL) || defined(STM32F10X_CL) || \
defined(__DOXYGEN__) defined(__DOXYGEN__)
#include "stm32f10x.h" #include "stm32f10x.h"
#else /* !STM32F1XX_XX */
#if defined(STM32F0XX)
#include "stm32f0xx.h"
#elif defined(STM32F2XX) #elif defined(STM32F2XX)
#include "stm32f2xx.h" #include "stm32f2xx.h"
@ -71,6 +74,23 @@
#error "STM32 device not specified" #error "STM32 device not specified"
#endif #endif
/* Discarded definitions from the ST headers, the PAL driver uses its own
definitions in order to have an unified handling for all devices.
Unfortunately the ST headers have no uniform definitions for the same
objects across the various sub-families.*/
#undef GPIOA
#undef GPIOB
#undef GPIOC
#undef GPIOD
#undef GPIOE
#undef GPIOF
#undef GPIOG
#undef GPIOH
#undef GPIOI
#endif /* !STM32F1XX_XX */
/*===========================================================================*/ /*===========================================================================*/
/* Driver constants. */ /* Driver constants. */
/*===========================================================================*/ /*===========================================================================*/

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@ -247,8 +247,7 @@ typedef enum IRQn
*/ */
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ #include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
/* CHIBIOS FIX */ #include "system_stm32f30x.h" /* STM32F30x System Header */
/*#include "system_stm32f30x.h"*/ /* STM32F30x System Header */
#include <stdint.h> #include <stdint.h>
/** @addtogroup Exported_types /** @addtogroup Exported_types
@ -554,8 +553,6 @@ typedef struct
/** /**
* @brief General Purpose I/O * @brief General Purpose I/O
*/ */
/* CHIBIOS FIX */
#if 0
typedef struct typedef struct
{ {
__IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */ __IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
@ -573,7 +570,6 @@ typedef struct
__IO uint16_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */ __IO uint16_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */
uint16_t RESERVED3; /*!< Reserved, 0x2A */ uint16_t RESERVED3; /*!< Reserved, 0x2A */
}GPIO_TypeDef; }GPIO_TypeDef;
#endif
/** /**
* @brief Operational Amplifier (OPAMP) * @brief Operational Amplifier (OPAMP)