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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@133 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2007-12-08 12:12:16 +00:00
parent 1fb3d146ed
commit 62458fc5d5
1 changed files with 18 additions and 21 deletions
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39
demos/ARM7-LPC214x-GCC-minimal/chcore2.s
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@ -47,9 +47,9 @@ threadstart:
bx r0 bx r0
.code 16 .code 16
mov r0, r5 mov r0, r5
mov lr, pc bl jmpr4
bx r4
bl chThdExit bl chThdExit
jmpr4: bx r4
.code 32 .code 32
#endif #endif
@ -71,7 +71,7 @@ FiqHandler:
ldr r0, =chSysHalt ldr r0, =chSysHalt
bx r0 bx r0
#else #else
bl chSysHalt b chSysHalt
#endif #endif
#ifdef THUMB #ifdef THUMB
@ -115,10 +115,11 @@ chSysSwitchI:
* interrupt handler: * interrupt handler:
* *
* High +------------+ * High +------------+
* | R12 | -+ * | LR_USR | -+
* | R12 | |
* | R3 | | * | R3 | |
* | R2 | | * | R2 | | External context: IRQ handler frame
* | R1 | | External context: IRQ handler frame * | R1 | |
* | R0 | | * | R0 | |
* | LR_IRQ | | (user code return address) * | LR_IRQ | | (user code return address)
* | SPSR | -+ (user code status) * | SPSR | -+ (user code status)
@ -136,7 +137,6 @@ chSysSwitchI:
*/ */
.globl IrqHandler .globl IrqHandler
IrqHandler: IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr} stmfd sp!, {r0-r3, r12, lr}
#ifdef THUMB_NO_INTERWORKING #ifdef THUMB_NO_INTERWORKING
add r0, pc, #1 add r0, pc, #1
@ -152,7 +152,6 @@ IrqHandler:
.globl T0IrqHandler .globl T0IrqHandler
T0IrqHandler: T0IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr} stmfd sp!, {r0-r3, r12, lr}
#ifdef THUMB_NO_INTERWORKING #ifdef THUMB_NO_INTERWORKING
add r0, pc, #1 add r0, pc, #1
@ -165,11 +164,9 @@ T0IrqHandler:
bl Timer0Irq bl Timer0Irq
b IrqCommon b IrqCommon
#endif #endif
/*
#if 0
.globl UART0IrqHandler .globl UART0IrqHandler
UART0IrqHandler: UART0IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr} stmfd sp!, {r0-r3, r12, lr}
#ifdef THUMB_NO_INTERWORKING #ifdef THUMB_NO_INTERWORKING
add r0, pc, #1 add r0, pc, #1
@ -182,12 +179,9 @@ UART0IrqHandler:
bl UART0Irq bl UART0Irq
b IrqCommon b IrqCommon
#endif #endif
#endif
#if 0
.globl UART1IrqHandler .globl UART1IrqHandler
UART1IrqHandler: UART1IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr} stmfd sp!, {r0-r3, r12, lr}
#ifdef THUMB_NO_INTERWORKING #ifdef THUMB_NO_INTERWORKING
add r0, pc, #1 add r0, pc, #1
@ -200,29 +194,32 @@ UART1IrqHandler:
bl UART1Irq bl UART1Irq
b IrqCommon b IrqCommon
#endif #endif
#endif */
/* /*
* Common exit point for all IRQ routines, it performs the rescheduling if * Common exit point for all IRQ routines, it performs the rescheduling if
* required. * required.
*/ */
IrqCommon:
#ifdef THUMB_NO_INTERWORKING #ifdef THUMB_NO_INTERWORKING
.code 16 .code 16
.globl IrqCommon
IrqCommon:
bl chSchRescRequiredI bl chSchRescRequiredI
mov lr, pc mov lr, pc
bx lr bx lr
.code 32 .code 32
#else #else
.globl IrqCommon
IrqCommon:
bl chSchRescRequiredI bl chSchRescRequiredI
#endif #endif
cmp r0, #0 // Simply returns if a cmp r0, #0 // Simply returns if a
ldmeqfd sp!, {r0-r3, r12, pc}^ // reschedule is not required. ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
subeqs pc, lr, #4 // required.
// Saves the IRQ mode registers in the system stack. // Saves the IRQ mode registers in the system stack.
ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty. ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
msr CPSR_c, #MODE_SYS | I_BIT msr CPSR_c, #MODE_SYS | I_BIT
stmfd sp!, {r0-r3, r12} // Registers on System Stack. stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack.
msr CPSR_c, #MODE_IRQ | I_BIT msr CPSR_c, #MODE_IRQ | I_BIT
mrs r0, SPSR mrs r0, SPSR
mov r1, lr mov r1, lr
@ -248,6 +245,6 @@ IrqCommon:
msr SPSR_fsxc, r0 msr SPSR_fsxc, r0
mov lr, r1 mov lr, r1
msr CPSR_c, #MODE_SYS | I_BIT msr CPSR_c, #MODE_SYS | I_BIT
ldmfd sp!, {r0-r3, r12} ldmfd sp!, {r0-r3, r12, lr}
msr CPSR_c, #MODE_IRQ | I_BIT msr CPSR_c, #MODE_IRQ | I_BIT
subs pc, lr, #0 subs pc, lr, #4