git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@133 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
1fb3d146ed
commit
62458fc5d5
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@ -47,9 +47,9 @@ threadstart:
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bx r0
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.code 16
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mov r0, r5
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mov lr, pc
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bx r4
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bl jmpr4
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bl chThdExit
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jmpr4: bx r4
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.code 32
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#endif
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@ -71,7 +71,7 @@ FiqHandler:
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ldr r0, =chSysHalt
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bx r0
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#else
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bl chSysHalt
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b chSysHalt
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#endif
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#ifdef THUMB
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@ -115,10 +115,11 @@ chSysSwitchI:
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* interrupt handler:
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*
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* High +------------+
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* | R12 | -+
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* | LR_USR | -+
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* | R12 | |
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* | R3 | |
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* | R2 | |
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* | R1 | | External context: IRQ handler frame
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* | R2 | | External context: IRQ handler frame
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* | R1 | |
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* | R0 | |
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* | LR_IRQ | | (user code return address)
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* | SPSR | -+ (user code status)
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@ -136,7 +137,6 @@ chSysSwitchI:
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*/
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.globl IrqHandler
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IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -152,7 +152,6 @@ IrqHandler:
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.globl T0IrqHandler
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T0IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -165,11 +164,9 @@ T0IrqHandler:
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bl Timer0Irq
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b IrqCommon
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#endif
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#if 0
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/*
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.globl UART0IrqHandler
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UART0IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -182,12 +179,9 @@ UART0IrqHandler:
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bl UART0Irq
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b IrqCommon
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#endif
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#endif
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#if 0
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.globl UART1IrqHandler
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UART1IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -200,29 +194,32 @@ UART1IrqHandler:
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bl UART1Irq
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b IrqCommon
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#endif
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#endif
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*/
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/*
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* Common exit point for all IRQ routines, it performs the rescheduling if
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* required.
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*/
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IrqCommon:
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#ifdef THUMB_NO_INTERWORKING
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.code 16
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.globl IrqCommon
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IrqCommon:
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bl chSchRescRequiredI
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mov lr, pc
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bx lr
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.code 32
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#else
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.globl IrqCommon
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IrqCommon:
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bl chSchRescRequiredI
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#endif
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cmp r0, #0 // Simply returns if a
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ldmeqfd sp!, {r0-r3, r12, pc}^ // reschedule is not required.
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ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
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subeqs pc, lr, #4 // required.
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// Saves the IRQ mode registers in the system stack.
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ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
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msr CPSR_c, #MODE_SYS | I_BIT
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stmfd sp!, {r0-r3, r12} // Registers on System Stack.
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stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack.
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msr CPSR_c, #MODE_IRQ | I_BIT
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mrs r0, SPSR
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mov r1, lr
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@ -248,6 +245,6 @@ IrqCommon:
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msr SPSR_fsxc, r0
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mov lr, r1
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msr CPSR_c, #MODE_SYS | I_BIT
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ldmfd sp!, {r0-r3, r12}
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ldmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_IRQ | I_BIT
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subs pc, lr, #0
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subs pc, lr, #4
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