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Adjustments to the EXT driver, not yet finished. Moved all STM32 drivers in private subdirectories. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8119 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
Giovanni Di Sirio 2015-07-28 11:44:32 +00:00
parent 2a6e5fabdf
commit 60faa453fd
26 changed files with 443 additions and 221 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

0
os/hal/ports/STM32/LLD/can_lld.c → os/hal/ports/STM32/LLD/CANv1/can_lld.c
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0
os/hal/ports/STM32/LLD/can_lld.h → os/hal/ports/STM32/LLD/CANv1/can_lld.h
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0
os/hal/ports/STM32/LLD/mac_lld.c → os/hal/ports/STM32/LLD/MACv1/mac_lld.c
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0
os/hal/ports/STM32/LLD/mac_lld.h → os/hal/ports/STM32/LLD/MACv1/mac_lld.h
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0
os/hal/ports/STM32/LLD/sdc_lld.c → os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c
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0
os/hal/ports/STM32/LLD/sdc_lld.h → os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.h
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13
os/hal/ports/STM32/STM32F0xx/platform.mk
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@ -5,12 +5,13 @@ HALCONF := $(strip $(shell cat halconf.h | egrep -e "define"))
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/stm32_dma.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/st_lld.c
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/adc_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/adc_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
@ -52,8 +53,9 @@ else
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/stm32_dma.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
@ -72,7 +74,8 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32F0xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2 \

21
os/hal/ports/STM32/STM32F0xx/stm32_registry.h
View File

@ -71,7 +71,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 32
#define STM32_EXTI_IMR_MASK 0x0F940000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -247,7 +248,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 32
#define STM32_EXTI_IMR_MASK 0x7F840000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -425,7 +427,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 32
#define STM32_EXTI_IMR_MASK 0x7FF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -584,7 +587,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 32
#define STM32_EXTI_IMR_MASK 0x0FF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -742,7 +746,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 32
#define STM32_EXTI_IMR_MASK 0x7FF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -896,7 +901,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 20
#define STM32_EXTI_IMR_MASK 0xFFF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -1062,7 +1068,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 28
#define STM32_EXTI_NUM_LINES 32
#define STM32_EXTI_IMR_MASK 0x7F840000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE

70
os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c
View File

@ -54,11 +54,14 @@
* @isr
*/
OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 0);
EXTD1.config->channels[0].cb(&EXTD1, 0);
pr = EXTI->PR & EXTI->IMR & (1 << 0);
EXTI->PR = pr;
if (pr & (1 << 0))
EXTD1.config->channels[0].cb(&EXTD1, 0);
OSAL_IRQ_EPILOGUE();
}
@ -69,11 +72,14 @@ OSAL_IRQ_HANDLER(Vector58) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 1);
EXTD1.config->channels[1].cb(&EXTD1, 1);
pr = EXTI->PR & EXTI->IMR & (1 << 1);
EXTI->PR = pr;
if (pr & (1 << 1))
EXTD1.config->channels[1].cb(&EXTD1, 1);
OSAL_IRQ_EPILOGUE();
}
@ -84,11 +90,14 @@ OSAL_IRQ_HANDLER(Vector5C) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector60) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 2);
EXTD1.config->channels[2].cb(&EXTD1, 2);
pr = EXTI->PR & EXTI->IMR & (1 << 2);
EXTI->PR = pr;
if (pr & (1 << 2))
EXTD1.config->channels[2].cb(&EXTD1, 2);
OSAL_IRQ_EPILOGUE();
}
@ -99,11 +108,14 @@ OSAL_IRQ_HANDLER(Vector60) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector64) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 3);
EXTD1.config->channels[3].cb(&EXTD1, 3);
pr = EXTI->PR & EXTI->IMR & (1 << 3);
EXTI->PR = pr;
if (pr & (1 << 3))
EXTD1.config->channels[3].cb(&EXTD1, 3);
OSAL_IRQ_EPILOGUE();
}
@ -114,11 +126,14 @@ OSAL_IRQ_HANDLER(Vector64) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector68) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 4);
EXTD1.config->channels[4].cb(&EXTD1, 4);
pr = EXTI->PR & EXTI->IMR & (1 << 4);
EXTI->PR = pr;
if (pr & (1 << 4))
EXTD1.config->channels[4].cb(&EXTD1, 4);
OSAL_IRQ_EPILOGUE();
}
@ -184,11 +199,14 @@ OSAL_IRQ_HANDLER(VectorE0) {
* @isr
*/
OSAL_IRQ_HANDLER(Veector44) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 16);
EXTD1.config->channels[16].cb(&EXTD1, 16);
pr = EXTI->PR & EXTI->IMR & (1 << 16);
EXTI->PR = pr;
if (pr & (1 << 16))
EXTD1.config->channels[16].cb(&EXTD1, 16);
OSAL_IRQ_EPILOGUE();
}
@ -199,11 +217,14 @@ OSAL_IRQ_HANDLER(Veector44) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE4) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 17);
EXTD1.config->channels[17].cb(&EXTD1, 17);
pr = EXTI->PR & EXTI->IMR & (1 << 17);
EXTI->PR = pr;
if (pr & (1 << 17))
EXTD1.config->channels[17].cb(&EXTD1, 17);
OSAL_IRQ_EPILOGUE();
}
@ -215,11 +236,14 @@ OSAL_IRQ_HANDLER(VectorE4) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE8) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 18);
EXTD1.config->channels[18].cb(&EXTD1, 18);
pr = EXTI->PR & EXTI->IMR & (1 << 18);
EXTI->PR = pr;
if (pr & (1 << 18))
EXTD1.config->channels[18].cb(&EXTD1, 18);
OSAL_IRQ_EPILOGUE();
}
@ -230,11 +254,14 @@ OSAL_IRQ_HANDLER(VectorE8) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector138) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 19);
EXTD1.config->channels[19].cb(&EXTD1, 19);
pr = EXTI->PR & EXTI->IMR & (1 << 19);
EXTI->PR = pr;
if (pr & (1 << 19))
EXTD1.config->channels[19].cb(&EXTD1, 19);
OSAL_IRQ_EPILOGUE();
}
@ -248,11 +275,14 @@ OSAL_IRQ_HANDLER(Vector138) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE8) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 18);
EXTD1.config->channels[18].cb(&EXTD1, 18);
pr = EXTI->PR & EXTI->IMR & (1 << 18);
EXTI->PR = pr;
if (pr & (1 << 18))
EXTD1.config->channels[18].cb(&EXTD1, 18);
OSAL_IRQ_EPILOGUE();
}

30
os/hal/ports/STM32/STM32F1xx/platform.mk
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@ -9,22 +9,16 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/adc_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
endif
ifneq ($(findstring HAL_USE_MAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/mac_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/sdc_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c
endif
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c
endif
@ -34,6 +28,9 @@ endif
ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c
endif
ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c
endif
@ -61,14 +58,13 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/mac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
@ -82,11 +78,13 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv1 \

38
os/hal/ports/STM32/STM32F1xx/platform_f105_f107.mk
View File

@ -9,34 +9,34 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/adc_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
endif
ifneq ($(findstring HAL_USE_MAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/mac_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/sdc_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c
endif
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c
endif
ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c
endif
ifneq ($(findstring HAL_USE_MAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/mac_lld.c
endif
ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c
endif
ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c
endif
ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c
endif
@ -61,15 +61,15 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/mac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/mac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
@ -82,12 +82,14 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32F1xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1
$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv1

21
os/hal/ports/STM32/STM32F1xx/stm32_registry.h
View File

@ -68,7 +68,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 18
#define STM32_EXTI_NUM_LINES 18
#define STM32_EXTI_IMR_MASK 0xFFFC0000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -231,7 +232,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_EXTI_NUM_LINES 19
#define STM32_EXTI_IMR_MASK 0xFFF80000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -402,7 +404,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_EXTI_NUM_LINES 19
#define STM32_EXTI_IMR_MASK 0xFFF80000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -546,7 +549,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_EXTI_NUM_LINES 19
#define STM32_EXTI_IMR_MASK 0xFFF80000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -709,7 +713,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_EXTI_NUM_LINES 19
#define STM32_EXTI_IMR_MASK 0xFFF80000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -908,7 +913,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_EXTI_NUM_LINES 19
#define STM32_EXTI_IMR_MASK 0xFFF80000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -1107,7 +1113,8 @@
#define STM32_HAS_ETH TRUE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 20
#define STM32_EXTI_NUM_LINES 20
#define STM32_EXTI_IMR_MASK 0xFFF00000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE

26
os/hal/ports/STM32/STM32F37x/ext_lld_isr.c
View File

@ -48,6 +48,7 @@
/* Driver interrupt handlers. */
/*===========================================================================*/
#if !defined(STM32_DISABLE_EXTI0_HANDLER)
/**
* @brief EXTI[0] interrupt handler.
*
@ -65,7 +66,9 @@ OSAL_IRQ_HANDLER(Vector58) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI1_HANDLER)
/**
* @brief EXTI[1] interrupt handler.
*
@ -83,7 +86,9 @@ OSAL_IRQ_HANDLER(Vector5C) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI2_HANDLER)
/**
* @brief EXTI[2] interrupt handler.
*
@ -101,7 +106,9 @@ OSAL_IRQ_HANDLER(Vector60) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI3_HANDLER)
/**
* @brief EXTI[3] interrupt handler.
*
@ -119,7 +126,9 @@ OSAL_IRQ_HANDLER(Vector64) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI4_HANDLER)
/**
* @brief EXTI[4] interrupt handler.
*
@ -137,7 +146,9 @@ OSAL_IRQ_HANDLER(Vector68) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
/**
* @brief EXTI[5]...EXTI[9] interrupt handler.
*
@ -164,7 +175,9 @@ OSAL_IRQ_HANDLER(Vector9C) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
/**
* @brief EXTI[10]...EXTI[15] interrupt handler.
*
@ -193,7 +206,9 @@ OSAL_IRQ_HANDLER(VectorE0) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI16_HANDLER)
/**
* @brief EXTI[16] interrupt handler (PVD).
*
@ -211,7 +226,9 @@ OSAL_IRQ_HANDLER(Vector44) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI17_HANDLER)
/**
* @brief EXTI[17] interrupt handler (RTC Alarm).
*
@ -229,7 +246,9 @@ OSAL_IRQ_HANDLER(VectorE4) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if STM32_HAS_USB && !defined(STM32_DISABLE_EXTI18_HANDLER)
/**
* @brief EXTI[18] interrupt handler (USB Wakeup).
*
@ -247,7 +266,9 @@ OSAL_IRQ_HANDLER(Vector170) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI19_HANDLER)
/**
* @brief EXTI[19] interrupt handler (Tamper TimeStamp).
*
@ -265,7 +286,9 @@ OSAL_IRQ_HANDLER(Vector48) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI20_HANDLER)
/**
* @brief EXTI[20] interrupt handler (RTC Wakeup).
*
@ -283,7 +306,9 @@ OSAL_IRQ_HANDLER(Vector4C) {
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI21_22_HANDLER)
/**
* @brief EXTI[21]..EXTI[22] interrupt handler (COMP1, COMP2).
*
@ -303,6 +328,7 @@ OSAL_IRQ_HANDLER(Vector140) {
OSAL_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */

17
os/hal/ports/STM32/STM32F37x/platform.mk
View File

@ -9,16 +9,16 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F37x/adc_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c
endif
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c
endif
@ -55,9 +55,9 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F37x/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F37x/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
@ -74,8 +74,9 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32F37x \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \

6
os/hal/ports/STM32/STM32F37x/stm32_registry.h
View File

@ -73,7 +73,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 29
#define STM32_EXTI_NUM_LINES 29
#define STM32_EXTI_IMR_MASK 0xE0000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -277,7 +278,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 29
#define STM32_EXTI_NUM_LINES 29
#define STM32_EXTI_IMR_MASK 0xE0000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE

94
os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c
View File

@ -55,11 +55,14 @@
* @isr
*/
OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 0);
EXTD1.config->channels[0].cb(&EXTD1, 0);
pr = EXTI->PR & EXTI->IMR & (1 << 0);
EXTI->PR = pr;
if (pr & (1 << 0))
EXTD1.config->channels[0].cb(&EXTD1, 0);
OSAL_IRQ_EPILOGUE();
}
@ -72,11 +75,14 @@ OSAL_IRQ_HANDLER(Vector58) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 1);
EXTD1.config->channels[1].cb(&EXTD1, 1);
pr = EXTI->PR & EXTI->IMR & (1 << 1);
EXTI->PR = pr;
if (pr & (1 << 1))
EXTD1.config->channels[1].cb(&EXTD1, 1);
OSAL_IRQ_EPILOGUE();
}
@ -89,11 +95,14 @@ OSAL_IRQ_HANDLER(Vector5C) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector60) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 2);
EXTD1.config->channels[2].cb(&EXTD1, 2);
pr = EXTI->PR & EXTI->IMR & (1 << 2);
EXTI->PR = pr;
if (pr & (1 << 2))
EXTD1.config->channels[2].cb(&EXTD1, 2);
OSAL_IRQ_EPILOGUE();
}
@ -106,11 +115,14 @@ OSAL_IRQ_HANDLER(Vector60) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector64) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 3);
EXTD1.config->channels[3].cb(&EXTD1, 3);
pr = EXTI->PR & EXTI->IMR & (1 << 3);
EXTI->PR = pr;
if (pr & (1 << 3))
EXTD1.config->channels[3].cb(&EXTD1, 3);
OSAL_IRQ_EPILOGUE();
}
@ -123,11 +135,14 @@ OSAL_IRQ_HANDLER(Vector64) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector68) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 4);
EXTD1.config->channels[4].cb(&EXTD1, 4);
pr = EXTI->PR & EXTI->IMR & (1 << 4);
EXTI->PR = pr;
if (pr & (1 << 4))
EXTD1.config->channels[4].cb(&EXTD1, 4);
OSAL_IRQ_EPILOGUE();
}
@ -144,7 +159,8 @@ OSAL_IRQ_HANDLER(Vector9C) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));
pr = EXTI->PR & EXTI->IMR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |
(1 << 9));
EXTI->PR = pr;
if (pr & (1 << 5))
EXTD1.config->channels[5].cb(&EXTD1, 5);
@ -172,8 +188,8 @@ OSAL_IRQ_HANDLER(VectorE0) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |
(1 << 15));
pr = EXTI->PR & EXTI->IMR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |
(1 << 14) | (1 << 15));
EXTI->PR = pr;
if (pr & (1 << 10))
EXTD1.config->channels[10].cb(&EXTD1, 10);
@ -199,11 +215,14 @@ OSAL_IRQ_HANDLER(VectorE0) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector44) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 16);
EXTD1.config->channels[16].cb(&EXTD1, 16);
pr = EXTI->PR & EXTI->IMR & (1 << 16);
EXTI->PR = pr;
if (pr & (1 << 16))
EXTD1.config->channels[16].cb(&EXTD1, 16);
OSAL_IRQ_EPILOGUE();
}
@ -216,11 +235,14 @@ OSAL_IRQ_HANDLER(Vector44) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE4) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 17);
EXTD1.config->channels[17].cb(&EXTD1, 17);
pr = EXTI->PR & EXTI->IMR & (1 << 17);
EXTI->PR = pr;
if (pr & (1 << 17))
EXTD1.config->channels[17].cb(&EXTD1, 17);
OSAL_IRQ_EPILOGUE();
}
@ -233,11 +255,14 @@ OSAL_IRQ_HANDLER(VectorE4) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE8) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 18);
EXTD1.config->channels[18].cb(&EXTD1, 18);
pr = EXTI->PR & EXTI->IMR & (1 << 18);
EXTI->PR = pr;
if (pr & (1 << 18))
EXTD1.config->channels[18].cb(&EXTD1, 18);
OSAL_IRQ_EPILOGUE();
}
@ -250,11 +275,14 @@ OSAL_IRQ_HANDLER(VectorE8) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector48) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 19);
EXTD1.config->channels[19].cb(&EXTD1, 19);
pr = EXTI->PR & EXTI->IMR & (1 << 19);
EXTI->PR = pr;
if (pr & (1 << 19))
EXTD1.config->channels[19].cb(&EXTD1, 19);
OSAL_IRQ_EPILOGUE();
}
@ -267,11 +295,14 @@ OSAL_IRQ_HANDLER(Vector48) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector4C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 20);
EXTD1.config->channels[20].cb(&EXTD1, 20);
pr = EXTI->PR & EXTI->IMR & (1 << 20);
EXTI->PR = pr;
if (pr & (1 << 20))
EXTD1.config->channels[20].cb(&EXTD1, 20);
OSAL_IRQ_EPILOGUE();
}
@ -288,7 +319,7 @@ OSAL_IRQ_HANDLER(Vector140) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 21) | (1 << 22) | (1 << 29));
pr = EXTI->PR & EXTI->IMR & ((1 << 21) | (1 << 22) | (1 << 29));
EXTI->PR = pr;
if (pr & (1 << 21))
EXTD1.config->channels[21].cb(&EXTD1, 21);
@ -312,14 +343,14 @@ OSAL_IRQ_HANDLER(Vector144) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 30) | (1 << 31));
pr = EXTI->PR & EXTI->IMR & ((1 << 30) | (1 << 31));
EXTI->PR = pr;
if (pr & (1 << 30))
EXTD1.config->channels[30].cb(&EXTD1, 30);
if (pr & (1 << 31))
EXTD1.config->channels[31].cb(&EXTD1, 31);
pr = EXTI->PR2 & (1 << 0);
pr = EXTI->PR2 & EXTI->IMR2 & (1 << 0);
EXTI->PR2 = pr;
if (pr & (1 << 0))
EXTD1.config->channels[32].cb(&EXTD1, 32);
@ -335,11 +366,14 @@ OSAL_IRQ_HANDLER(Vector144) {
* @isr
*/
OSAL_IRQ_HANDLER(RTC_WKUP_IRQHandler) {
uint32_t pr2;
OSAL_IRQ_PROLOGUE();
EXTI->PR2 = (1 << 1);
EXTD1.config->channels[33].cb(&EXTD1, 33);
pr2 = EXTI->PR2 & EXTI->IMR & (1 << 1);
EXTI->PR2 = pr2;
if (pr2 & (1 << 1))
EXTD1.config->channels[33].cb(&EXTD1, 33);
OSAL_IRQ_EPILOGUE();
}
@ -372,7 +406,7 @@ void ext_lld_exti_irq_enable(void) {
nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);
nvicEnableVector(COMP1_2_3_IRQn, STM32_EXT_EXTI21_22_29_IRQ_PRIORITY);
nvicEnableVector(COMP4_5_6_IRQn, STM32_EXT_EXTI30_32_IRQ_PRIORITY);
#if STM32_EXTI_NUM_CHANNELS >= 34
#if STM32_EXTI_NUM_LINES >= 34
nvicEnableVector(COMP7_IRQn, STM32_EXT_EXTI33_IRQ_PRIORITY);
#endif
}
@ -400,7 +434,7 @@ void ext_lld_exti_irq_disable(void) {
nvicDisableVector(RTC_WKUP_IRQn);
nvicDisableVector(COMP1_2_3_IRQn);
nvicDisableVector(COMP4_5_6_IRQn);
#if STM32_EXTI_NUM_CHANNELS >= 34
#if STM32_EXTI_NUM_LINES >= 34
nvicDisableVector(COMP7_IRQn);
#endif
}

17
os/hal/ports/STM32/STM32F3xx/platform.mk
View File

@ -9,16 +9,16 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/adc_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c
endif
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c
endif
@ -55,9 +55,9 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
@ -74,8 +74,9 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32F3xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \

36
os/hal/ports/STM32/STM32F3xx/stm32_registry.h
View File

@ -79,7 +79,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 34
#define STM32_EXTI_NUM_LINES 34
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -274,7 +276,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 34
#define STM32_EXTI_NUM_LINES 34
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -446,7 +450,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 33
#define STM32_EXTI_NUM_LINES 33
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -617,7 +623,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 33
#define STM32_EXTI_NUM_LINES 33
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -791,7 +799,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 34
#define STM32_EXTI_NUM_LINES 34
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -977,7 +987,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 33
#define STM32_EXTI_NUM_LINES 33
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -1151,7 +1163,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 33
#define STM32_EXTI_NUM_LINES 33
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -1322,7 +1336,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 34
#define STM32_EXTI_NUM_LINES 34
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -1512,7 +1528,9 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 33
#define STM32_EXTI_NUM_LINES 33
#define STM32_EXTI_IMR_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE

95
os/hal/ports/STM32/STM32F4xx/ext_lld_isr.c
View File

@ -54,11 +54,14 @@
* @isr
*/
OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 0);
EXTD1.config->channels[0].cb(&EXTD1, 0);
pr = EXTI->PR & EXTI->IMR & (1 << 0);
EXTI->PR = pr;
if (pr & (1 << 0))
EXTD1.config->channels[0].cb(&EXTD1, 0);
OSAL_IRQ_EPILOGUE();
}
@ -69,11 +72,14 @@ OSAL_IRQ_HANDLER(Vector58) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 1);
EXTD1.config->channels[1].cb(&EXTD1, 1);
pr = EXTI->PR & EXTI->IMR & (1 << 1);
EXTI->PR = pr;
if (pr & (1 << 1))
EXTD1.config->channels[1].cb(&EXTD1, 1);
OSAL_IRQ_EPILOGUE();
}
@ -84,11 +90,14 @@ OSAL_IRQ_HANDLER(Vector5C) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector60) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 2);
EXTD1.config->channels[2].cb(&EXTD1, 2);
pr = EXTI->PR & EXTI->IMR & (1 << 2);
EXTI->PR = pr;
if (pr & (1 << 2))
EXTD1.config->channels[2].cb(&EXTD1, 2);
OSAL_IRQ_EPILOGUE();
}
@ -99,11 +108,14 @@ OSAL_IRQ_HANDLER(Vector60) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector64) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 3);
EXTD1.config->channels[3].cb(&EXTD1, 3);
pr = EXTI->PR & EXTI->IMR & (1 << 3);
EXTI->PR = pr;
if (pr & (1 << 3))
EXTD1.config->channels[3].cb(&EXTD1, 3);
OSAL_IRQ_EPILOGUE();
}
@ -114,11 +126,14 @@ OSAL_IRQ_HANDLER(Vector64) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector68) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 4);
EXTD1.config->channels[4].cb(&EXTD1, 4);
pr = EXTI->PR & EXTI->IMR & (1 << 4);
EXTI->PR = pr;
if (pr & (1 << 4))
EXTD1.config->channels[4].cb(&EXTD1, 4);
OSAL_IRQ_EPILOGUE();
}
@ -133,7 +148,8 @@ OSAL_IRQ_HANDLER(Vector9C) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));
pr = EXTI->PR & EXTI->IMR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |
(1 << 9));
EXTI->PR = pr;
if (pr & (1 << 5))
EXTD1.config->channels[5].cb(&EXTD1, 5);
@ -159,8 +175,8 @@ OSAL_IRQ_HANDLER(VectorE0) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |
(1 << 15));
pr = EXTI->PR & EXTI->IMR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |
(1 << 14) | (1 << 15));
EXTI->PR = pr;
if (pr & (1 << 10))
EXTD1.config->channels[10].cb(&EXTD1, 10);
@ -184,11 +200,14 @@ OSAL_IRQ_HANDLER(VectorE0) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector44) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 16);
EXTD1.config->channels[16].cb(&EXTD1, 16);
pr = EXTI->PR & EXTI->IMR & (1 << 16);
EXTI->PR = pr;
if (pr & (1 << 16))
EXTD1.config->channels[16].cb(&EXTD1, 16);
OSAL_IRQ_EPILOGUE();
}
@ -199,11 +218,14 @@ OSAL_IRQ_HANDLER(Vector44) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE4) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 17);
EXTD1.config->channels[17].cb(&EXTD1, 17);
pr = EXTI->PR & EXTI->IMR & (1 << 17);
EXTI->PR = pr;
if (pr & (1 << 17))
EXTD1.config->channels[17].cb(&EXTD1, 17);
OSAL_IRQ_EPILOGUE();
}
@ -214,44 +236,53 @@ OSAL_IRQ_HANDLER(VectorE4) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE8) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 18);
EXTD1.config->channels[18].cb(&EXTD1, 18);
pr = EXTI->PR & EXTI->IMR & (1 << 18);
EXTI->PR = pr;
if (pr & (1 << 18))
EXTD1.config->channels[18].cb(&EXTD1, 18);
OSAL_IRQ_EPILOGUE();
}
#if STM32_HAS_ETH
#if STM32_HAS_ETH || defined(__DOXYGEN__)
/**
* @brief EXTI[19] interrupt handler (ETH_WKUP).
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector138) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 19);
EXTD1.config->channels[19].cb(&EXTD1, 19);
pr = EXTI->PR & EXTI->IMR & (1 << 19);
EXTI->PR = pr;
if (pr & (1 << 19))
EXTD1.config->channels[19].cb(&EXTD1, 19);
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_HAS_ETH */
#if STM32_HAS_OTG2
#if STM32_HAS_OTG2 || defined(__DOXYGEN__)
/**
* @brief EXTI[20] interrupt handler (OTG_HS_WKUP).
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector170) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 20);
EXTD1.config->channels[20].cb(&EXTD1, 20);
pr = EXTI->PR & EXTI->IMR & (1 << 20);
EXTI->PR = pr;
if (pr & (1 << 20))
EXTD1.config->channels[20].cb(&EXTD1, 20);
OSAL_IRQ_EPILOGUE();
}
@ -264,11 +295,14 @@ OSAL_IRQ_HANDLER(Vector170) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector48) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 21);
EXTD1.config->channels[21].cb(&EXTD1, 21);
pr = EXTI->PR & EXTI->IMR & (1 << 21);
EXTI->PR = pr;
if (pr & (1 << 21))
EXTD1.config->channels[21].cb(&EXTD1, 21);
OSAL_IRQ_EPILOGUE();
}
@ -280,11 +314,14 @@ OSAL_IRQ_HANDLER(Vector48) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector4C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 22);
EXTD1.config->channels[22].cb(&EXTD1, 22);
pr = EXTI->PR & EXTI->IMR & (1 << 22);
EXTI->PR = pr;
if (pr & (1 << 22))
EXTD1.config->channels[22].cb(&EXTD1, 22);
OSAL_IRQ_EPILOGUE();
}

35
os/hal/ports/STM32/STM32F4xx/platform.mk
View File

@ -9,28 +9,25 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/adc_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
endif
ifneq ($(findstring HAL_USE_MAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/mac_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/sdc_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANV1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/ext_lld_isr.c
endif
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c
endif
ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c
endif
ifneq ($(findstring HAL_USE_MAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/mac_lld.c
endif
ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c
endif
@ -40,6 +37,9 @@ endif
ifneq ($(findstring HAL_USE_I2S TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c
endif
ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c
endif
@ -64,15 +64,15 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/mac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/mac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
@ -86,12 +86,15 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv1 \

12
os/hal/ports/STM32/STM32F4xx/stm32_registry.h
View File

@ -109,7 +109,8 @@
#define STM32_HAS_ETH TRUE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_EXTI_NUM_LINES 23
#define STM32_EXTI_IMR_MASK 0xFF800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -406,7 +407,8 @@
#endif
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_EXTI_NUM_LINES 23
#define STM32_EXTI_IMR_MASK 0xFF800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -678,7 +680,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_EXTI_NUM_LINES 23
#define STM32_EXTI_IMR_MASK 0xFF800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -898,7 +901,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_EXTI_NUM_LINES 23
#define STM32_EXTI_IMR_MASK 0xFF800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE

14
os/hal/ports/STM32/STM32L0xx/platform.mk
View File

@ -3,16 +3,16 @@ ifeq ($(USE_SMART_BUILD),yes)
HALCONF := $(strip $(shell cat halconf.h | egrep -e "define"))
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/st_lld.c
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c
endif
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/adc_lld.c
endif
ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
endif
@ -53,8 +53,8 @@ else
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
@ -75,6 +75,7 @@ endif
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32L0xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
@ -84,5 +85,4 @@ PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD
$(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1

3
os/hal/ports/STM32/STM32L0xx/stm32_registry.h
View File

@ -80,7 +80,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_EXTI_NUM_LINES 23
#define STM32_EXTI_IMR_MASK 0xFF840000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE

102
os/hal/ports/STM32/STM32L1xx/ext_lld_isr.c
View File

@ -54,11 +54,14 @@
* @isr
*/
OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 0);
EXTD1.config->channels[0].cb(&EXTD1, 0);
pr = EXTI->PR & EXTI->IMR & (1 << 0);
EXTI->PR = pr;
if (pr & (1 << 0))
EXTD1.config->channels[0].cb(&EXTD1, 0);
OSAL_IRQ_EPILOGUE();
}
@ -69,11 +72,14 @@ OSAL_IRQ_HANDLER(Vector58) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 1);
EXTD1.config->channels[1].cb(&EXTD1, 1);
pr = EXTI->PR & EXTI->IMR & (1 << 1);
EXTI->PR = pr;
if (pr & (1 << 1))
EXTD1.config->channels[1].cb(&EXTD1, 1);
OSAL_IRQ_EPILOGUE();
}
@ -84,11 +90,14 @@ OSAL_IRQ_HANDLER(Vector5C) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector60) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 2);
EXTD1.config->channels[2].cb(&EXTD1, 2);
pr = EXTI->PR & EXTI->IMR & (1 << 2);
EXTI->PR = pr;
if (pr & (1 << 2))
EXTD1.config->channels[2].cb(&EXTD1, 2);
OSAL_IRQ_EPILOGUE();
}
@ -99,11 +108,14 @@ OSAL_IRQ_HANDLER(Vector60) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector64) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 3);
EXTD1.config->channels[3].cb(&EXTD1, 3);
pr = EXTI->PR & EXTI->IMR & (1 << 3);
EXTI->PR = pr;
if (pr & (1 << 3))
EXTD1.config->channels[3].cb(&EXTD1, 3);
OSAL_IRQ_EPILOGUE();
}
@ -114,11 +126,14 @@ OSAL_IRQ_HANDLER(Vector64) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector68) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 4);
EXTD1.config->channels[4].cb(&EXTD1, 4);
pr = EXTI->PR & EXTI->IMR & (1 << 4);
EXTI->PR = pr;
if (pr & (1 << 4))
EXTD1.config->channels[4].cb(&EXTD1, 4);
OSAL_IRQ_EPILOGUE();
}
@ -133,7 +148,8 @@ OSAL_IRQ_HANDLER(Vector9C) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));
pr = EXTI->PR & EXTI->IMR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |
(1 << 9));
EXTI->PR = pr;
if (pr & (1 << 5))
EXTD1.config->channels[5].cb(&EXTD1, 5);
@ -159,8 +175,8 @@ OSAL_IRQ_HANDLER(VectorE0) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |
(1 << 15));
pr = EXTI->PR & EXTI->IMR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |
(1 << 14) | (1 << 15));
EXTI->PR = pr;
if (pr & (1 << 10))
EXTD1.config->channels[10].cb(&EXTD1, 10);
@ -184,11 +200,14 @@ OSAL_IRQ_HANDLER(VectorE0) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector44) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 16);
EXTD1.config->channels[16].cb(&EXTD1, 16);
pr = EXTI->PR & EXTI->IMR & (1 << 16);
EXTI->PR = pr;
if (pr & (1 << 16))
EXTD1.config->channels[16].cb(&EXTD1, 16);
OSAL_IRQ_EPILOGUE();
}
@ -199,11 +218,13 @@ OSAL_IRQ_HANDLER(Vector44) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE4) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 17);
EXTD1.config->channels[17].cb(&EXTD1, 17);
pr = EXTI->PR & EXTI->IMR & (1 << 17);
EXTI->PR = pr;
if (pr & (1 << 17))
EXTD1.config->channels[17].cb(&EXTD1, 17);
OSAL_IRQ_EPILOGUE();
}
@ -213,11 +234,13 @@ OSAL_IRQ_HANDLER(VectorE4) {
* @isr
*/
OSAL_IRQ_HANDLER(VectorE8) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 18);
EXTD1.config->channels[18].cb(&EXTD1, 18);
pr = EXTI->PR & EXTI->IMR & (1 << 18);
EXTI->PR = pr;
if (pr & (1 << 18))
EXTD1.config->channels[18].cb(&EXTD1, 18);
OSAL_IRQ_EPILOGUE();
}
@ -228,11 +251,13 @@ OSAL_IRQ_HANDLER(VectorE8) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector48) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 19);
EXTD1.config->channels[19].cb(&EXTD1, 19);
pr = EXTI->PR & EXTI->IMR & (1 << 19);
EXTI->PR = pr;
if (pr & (1 << 19))
EXTD1.config->channels[19].cb(&EXTD1, 19);
OSAL_IRQ_EPILOGUE();
}
@ -243,11 +268,13 @@ OSAL_IRQ_HANDLER(Vector48) {
* @isr
*/
OSAL_IRQ_HANDLER(Vector4C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 20);
EXTD1.config->channels[20].cb(&EXTD1, 20);
pr = EXTI->PR & EXTI->IMR & (1 << 20);
EXTI->PR = pr;
if (pr & (1 << 20))
EXTD1.config->channels[20].cb(&EXTD1, 20);
OSAL_IRQ_EPILOGUE();
}
@ -262,7 +289,7 @@ OSAL_IRQ_HANDLER(Vector98) {
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 21) | (1 << 22));
pr = EXTI->PR & EXTI->IMR & ((1 << 21) | (1 << 22));
EXTI->PR = pr;
if (pr & (1 << 21))
EXTD1.config->channels[21].cb(&EXTD1, 21);
@ -272,6 +299,25 @@ OSAL_IRQ_HANDLER(Vector98) {
OSAL_IRQ_EPILOGUE();
}
#if (STM32_EXTI_NUM_LINES > 23) || defined(__DOXYGEN__)
/**
* @brief EXTI[23] interrupt handler (Channel Acquisition).
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector120) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & EXTI->IMR & (1 << 23);
EXTI->PR = pr;
if (pr & (1 << 23))
EXTD1.config->channels[23].cb(&EXTD1, 23);
OSAL_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/

8
os/hal/ports/STM32/STM32L1xx/platform.mk
View File

@ -10,8 +10,8 @@ ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/adc_lld.c
endif
ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/ext_lld_isr.c
endif
ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
@ -52,7 +52,7 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/adc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/ext_lld_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c \
@ -70,7 +70,7 @@ endif
# Required include directories
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/STM32L1xx \
$(CHIBIOS)/os/hal/ports/STM32/LLD \
$(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1 \

6
os/hal/ports/STM32/STM32L1xx/stm32_registry.h
View File

@ -65,7 +65,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_EXTI_NUM_LINES 23
#define STM32_EXTI_IMR_MASK 0xFF800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@ -245,7 +246,8 @@
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 24
#define STM32_EXTI_NUM_LINES 24
#define STM32_EXTI_IMR_MASK 0xFF000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE