git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6103 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
0c0288d678
commit
6071e93a92
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@ -41,7 +41,7 @@
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* setting also defines the system tick time unit.
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* setting also defines the system tick time unit.
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*/
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*/
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#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
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#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
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#define CH_CFG_ST_FREQUENCY 10000
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#define CH_CFG_ST_FREQUENCY 1000
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#endif
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#endif
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/**
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/**
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@ -62,7 +62,7 @@
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* this value.
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* this value.
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*/
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*/
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#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
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#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
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#define CH_CFG_TIMEDELTA 2
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#define CH_CFG_TIMEDELTA 0
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#endif
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#endif
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/**
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/**
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@ -104,7 +104,7 @@ void st_lld_init(void) {
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#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
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#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
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/* Free running counter mode.*/
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/* Free running counter mode.*/
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rccEnableTIM2(FALSE);
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rccEnableTIM2(FALSE);
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nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY_MASK);
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nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY);
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STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1;
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STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1;
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#endif
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#endif
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@ -117,7 +117,7 @@ void st_lld_init(void) {
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SysTick_CTRL_ENABLE_Msk |
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SysTick_CTRL_ENABLE_Msk |
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SysTick_CTRL_TICKINT_Msk;
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SysTick_CTRL_TICKINT_Msk;
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nvicSetSystemHandlerPriority(HANDLER_SYSTICK, ST_TIMER_PRIORITY_MASK);
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nvicSetSystemHandlerPriority(SysTick_IRQn, ST_TIMER_PRIORITY);
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#endif
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#endif
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}
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}
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@ -40,10 +40,10 @@
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* @{
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* @{
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*/
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*/
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/**
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/**
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* @brief SysTick timer priority mask.
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* @brief SysTick timer priority.
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*/
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*/
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#if !defined(ST_TIMER_PRIORITY_MASK) || defined(__DOXYGEN__)
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#if !defined(ST_TIMER_PRIORITY) || defined(__DOXYGEN__)
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#define ST_TIMER_PRIORITY_MASK 0x80
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#define ST_TIMER_PRIORITY 8
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#endif
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#endif
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/** @} */
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/** @} */
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@ -55,7 +55,7 @@
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* @param[in] n the interrupt number
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* @param[in] n the interrupt number
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* @param[in] prio the interrupt priority mask
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* @param[in] prio the interrupt priority mask
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*/
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*/
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void nvicEnableVector(uint32_t n, uint32_t prio) {
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void nvicEnableVector(IRQn_Type n, uint32_t prio) {
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NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
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NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
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NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
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NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
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*
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*
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* @param[in] n the interrupt number
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* @param[in] n the interrupt number
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*/
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*/
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void nvicDisableVector(uint32_t n) {
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void nvicDisableVector(IRQn_Type n) {
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NVIC->ICER[n >> 5] = 1 << (n & 0x1F);
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NVIC->ICER[n >> 5] = 1 << (n & 0x1F);
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NVIC->IP[n] = 0;
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NVIC->IP[n] = 0;
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}
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}
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/**
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* @brief Changes the priority of a system handler.
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* @note The parameters are not tested for correctness.
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*
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* @param[in] handler the system handler number
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* @param[in] prio the system handler priority mask
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*/
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void nvicSetSystemHandlerPriority(IRQn_Type handler, uint32_t prio) {
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SCB->SHP[((uint32_t)(handler) & 15) - 4] = NVIC_PRIORITY_MASK(prio);
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}
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/** @} */
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/** @} */
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@ -57,8 +57,9 @@
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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void nvicEnableVector(uint32_t n, uint32_t prio);
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void nvicEnableVector(IRQn_Type n, uint32_t prio);
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void nvicDisableVector(uint32_t n);
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void nvicDisableVector(IRQn_Type n);
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void nvicSetSystemHandlerPriority(IRQn_Type handler, uint32_t prio);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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