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Added symbol __main_thread_stack_base__ to Keil startup file. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3389 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2011-09-24 07:29:46 +00:00
parent 76d35140c9
commit 5f8971c537
2 changed files with 11 additions and 74 deletions
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83
demos/ARMCM3-STM32F103/keil/ch.uvproj
View File

@ -346,7 +346,7 @@
<MiscControls></MiscControls>
<Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\test</IncludePath>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv1;..\..\..\os\hal\platforms\STM32\DMAv1;..\..\..\os\hal\platforms\STM32\USBv1;..\..\..\os\hal\platforms\STM32F1xx;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\test</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -361,7 +361,7 @@
<MiscControls>--cpreproc</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\os\ports\RVCT\ARMCMx\STM32</IncludePath>
<IncludePath>..\;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx</IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -409,7 +409,7 @@
<File>
<FileName>vectors.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32\vectors.s</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\ports\RVCT\ARMCMx\STM32F1xx\vectors.s</FilePath>
</File>
<File>
<FileName>chcoreasm_v7m.s</FileName>
@ -791,110 +791,45 @@
<Group>
<GroupName>platform</GroupName>
<Files>
<File>
<FileName>adc_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.c</FilePath>
</File>
<File>
<FileName>can_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.c</FilePath>
</File>
<File>
<FileName>hal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.c</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld.c</FilePath>
</File>
<File>
<FileName>pal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.c</FilePath>
</File>
<File>
<FileName>pwm_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\GPIOv1\pal_lld.c</FilePath>
</File>
<File>
<FileName>serial_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
</File>
<File>
<FileName>spi_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.c</FilePath>
</File>
<File>
<FileName>uart_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.c</FilePath>
</File>
<File>
<FileName>adc_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.h</FilePath>
</File>
<File>
<FileName>can_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.h</FilePath>
</File>
<File>
<FileName>core_cm3.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\core_cm3.h</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld_f103.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld_f103.h</FilePath>
</File>
<File>
<FileName>pal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.h</FilePath>
</File>
<File>
<FileName>pwm_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\GPIOv1\pal_lld.h</FilePath>
</File>
<File>
<FileName>serial_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
</File>
<File>
<FileName>spi_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.h</FilePath>
</File>
<File>
<FileName>stm32f10x.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32f10x.h</FilePath>
</File>
<File>
<FileName>uart_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\stm32f10x.h</FilePath>
</File>
</Files>
</Group>

2
os/ports/RVCT/ARMCMx/cstartup.s
View File

@ -41,6 +41,8 @@ main_stack_mem SPACE main_stack_size
__initial_msp
AREA CSTACK, NOINIT, READWRITE, ALIGN=3
__main_thread_stack_base__
EXPORT __main_thread_stack_base__
proc_stack_mem SPACE proc_stack_size
EXPORT __initial_sp
__initial_sp