Added CAN transmission errors handling.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8613 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
bb82aedb91
commit
56e47668d5
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@ -38,23 +38,23 @@
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/**
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* @brief Errors rate warning.
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*/
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#define CAN_LIMIT_WARNING 1
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#define CAN_LIMIT_WARNING 1U
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/**
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* @brief Errors rate error.
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*/
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#define CAN_LIMIT_ERROR 2
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#define CAN_LIMIT_ERROR 2U
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/**
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* @brief Bus off condition reached.
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*/
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#define CAN_BUS_OFF_ERROR 4
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#define CAN_BUS_OFF_ERROR 4U
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/**
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* @brief Framing error of some kind on the CAN bus.
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*/
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#define CAN_FRAMING_ERROR 8
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#define CAN_FRAMING_ERROR 8U
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/**
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* @brief Overflow in receive queue.
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*/
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#define CAN_OVERFLOW_ERROR 16
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#define CAN_OVERFLOW_ERROR 16U
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/** @} */
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/**
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@ -113,7 +113,7 @@ typedef enum {
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/**
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* @brief Converts a mailbox index to a bit mask.
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*/
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#define CAN_MAILBOX_TO_MASK(mbx) (1 << ((mbx) - 1))
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#define CAN_MAILBOX_TO_MASK(mbx) (1U << ((mbx) - 1U))
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/** @} */
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/*===========================================================================*/
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@ -142,12 +142,50 @@ static void can_lld_set_filters(uint32_t can2sb,
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* @notapi
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*/
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static void can_lld_tx_handler(CANDriver *canp) {
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uint32_t tsr;
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eventflags_t flags;
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/* No more events until a message is transmitted.*/
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canp->can->TSR = CAN_TSR_RQCP0 | CAN_TSR_RQCP1 | CAN_TSR_RQCP2;
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/* Clearing IRQ sources.*/
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tsr = canp->can->TSR;
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canp->can->TSR = tsr;
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/* Flags to be signaled through the TX event source.*/
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flags = 0U;
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/* Checking mailbox 0.*/
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if ((tsr & CAN_TSR_RQCP0) != 0U) {
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if ((tsr & (CAN_TSR_ALST0 | CAN_TSR_TERR0)) != 0U) {
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flags |= CAN_MAILBOX_TO_MASK(1U) << 16U;
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}
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else {
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flags |= CAN_MAILBOX_TO_MASK(1U);
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}
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}
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/* Checking mailbox 1.*/
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if ((tsr & CAN_TSR_RQCP1) != 0U) {
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if ((tsr & (CAN_TSR_ALST1 | CAN_TSR_TERR1)) != 0U) {
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flags |= CAN_MAILBOX_TO_MASK(2U) << 16U;
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}
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else {
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flags |= CAN_MAILBOX_TO_MASK(2U);
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}
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}
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/* Checking mailbox 2.*/
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if ((tsr & CAN_TSR_RQCP2) != 0U) {
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if ((tsr & (CAN_TSR_ALST2 | CAN_TSR_TERR2)) != 0U) {
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flags |= CAN_MAILBOX_TO_MASK(3U) << 16U;
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}
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else {
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flags |= CAN_MAILBOX_TO_MASK(3U);
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}
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}
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/* Signaling flags and waking up threads waiting for a transmission slot.*/
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osalSysLockFromISR();
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osalThreadDequeueAllI(&canp->txqueue, MSG_OK);
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osalEventBroadcastFlagsI(&canp->txempty_event, CAN_MAILBOX_TO_MASK(1));
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osalEventBroadcastFlagsI(&canp->txempty_event, flags);
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osalSysUnlockFromISR();
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}
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@ -167,7 +205,7 @@ static void can_lld_rx0_handler(CANDriver *canp) {
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canp->can->IER &= ~CAN_IER_FMPIE0;
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osalSysLockFromISR();
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osalThreadDequeueAllI(&canp->rxqueue, MSG_OK);
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osalEventBroadcastFlagsI(&canp->rxfull_event, CAN_MAILBOX_TO_MASK(1));
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osalEventBroadcastFlagsI(&canp->rxfull_event, CAN_MAILBOX_TO_MASK(1U));
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osalSysUnlockFromISR();
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}
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if ((rf0r & CAN_RF0R_FOVR0) > 0) {
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@ -195,7 +233,7 @@ static void can_lld_rx1_handler(CANDriver *canp) {
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canp->can->IER &= ~CAN_IER_FMPIE1;
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osalSysLockFromISR();
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osalThreadDequeueAllI(&canp->rxqueue, MSG_OK);
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osalEventBroadcastFlagsI(&canp->rxfull_event, CAN_MAILBOX_TO_MASK(2));
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osalEventBroadcastFlagsI(&canp->rxfull_event, CAN_MAILBOX_TO_MASK(2U));
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osalSysUnlockFromISR();
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}
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if ((rf1r & CAN_RF1R_FOVR1) > 0) {
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@ -282,7 +282,7 @@ typedef struct {
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* until the received frames queue has been completely emptied. It
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* is <b>not</b> broadcasted for each received frame. It is
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* responsibility of the application to empty the queue by
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* repeatedly invoking @p chReceive() when listening to this event.
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* repeatedly invoking @p canReceive() when listening to this event.
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* This behavior minimizes the interrupt served by the system
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* because CAN traffic.
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* @note The flags associated to the listeners will indicate which
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@ -293,13 +293,17 @@ typedef struct {
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* @brief One or more transmission mailbox become available.
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* @note The flags associated to the listeners will indicate which
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* transmit mailboxes become empty.
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* @note The upper 16 bits are transmission error flags associated
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* to the transmit mailboxes.
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*
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*/
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event_source_t txempty_event;
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/**
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* @brief A CAN bus error happened.
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* @note The flags associated to the listeners will indicate the
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* error(s) that have occurred.
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* @note The flags associated to the listeners will indicate that
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* receive error(s) have occurred.
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* @note In this implementation the upper 16 bits are filled with the
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* unprocessed content of the ESR register.
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*/
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event_source_t error_event;
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#if CAN_USE_SLEEP_MODE || defined (__DOXYGEN__)
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@ -61,6 +61,14 @@
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#define STM32_HAS_CAN1 TRUE
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#define STM32_HAS_CAN2 FALSE
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#define STM32_CAN_MAX_FILTERS 14
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#define STM32_CAN1_TX_HANDLER Vector8C
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#define STM32_CAN1_RX0_HANDLER Vector90
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#define STM32_CAN1_RX1_HANDLER Vector94
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#define STM32_CAN1_SCE_HANDLER Vector98
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#define STM32_CAN1_TX_NUMBER 19
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#define STM32_CAN1_RX0_NUMBER 20
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#define STM32_CAN1_RX1_NUMBER 21
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#define STM32_CAN1_SCE_NUMBER 22
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/* DAC attributes.*/
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#define STM32_HAS_DAC1_CH1 TRUE
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@ -33,7 +33,7 @@
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<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
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<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
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<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
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<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="CR2-adc-adcp-adc_lld_start_conversion-(format)" val="4"/><content id="CR2-adc-null-port_wait_for_interrupt-(format)" val="4"/><content id="cr2-adc_lld_start_conversion-(format)" val="4"/></contentList>"/>
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<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="cr2-adc_lld_start_conversion-(format)" val="4"/><content id="CR2-adc-null-port_wait_for_interrupt-(format)" val="4"/><content id="CR2-adc-adcp-adc_lld_start_conversion-(format)" val="4"/></contentList>"/>
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<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
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<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
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<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
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