Fixed bug 3317500, retested impacted ports.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3047 35acf78f-673a-0410-8e92-d51de3d6d3f4

docs/reports/LPC1114-48-GCC.txt

@@ -5,7 +5,7 @@ Settings: CLK=48, (2 wait states)
 
 *** ChibiOS/RT test suite
 ***
-*** Kernel:       2.3.4unstable
+*** Kernel:       2.3.3unstable
 *** Compiler:     GCC 4.3.3
 *** Architecture: ARMv6-M
 *** Core Variant: Cortex-M0
@@ -99,51 +99,51 @@ Settings: CLK=48, (2 wait states)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 126785 msgs/S, 253570 ctxswc/S
+--- Score : 126622 msgs/S, 253244 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 100841 msgs/S, 201682 ctxswc/S
+--- Score : 100709 msgs/S, 201418 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 100841 msgs/S, 201682 ctxswc/S
+--- Score : 100709 msgs/S, 201418 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 380488 ctxswc/S
+--- Score : 379992 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 78360 threads/S
+--- Score : 77997 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 110391 threads/S
+--- Score : 109742 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 31038 reschedules/S, 186228 ctxswc/S
+--- Score : 30999 reschedules/S, 185994 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 253236 ctxswc/S
+--- Score : 252904 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 384968 bytes/S
+--- Score : 384484 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 350246 timers/S
+--- Score : 349796 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 592052 wait+signal/S
+--- Score : 591284 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 334912 lock+unlock/S
+--- Score : 334472 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/LPC1114-48-RVCT.txt

@@ -6,7 +6,7 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
 
 *** ChibiOS/RT test suite
 ***
-*** Kernel:       2.3.4unstable
+*** Kernel:       2.3.3unstable
 *** Compiler:     RVCT
 *** Architecture: ARMv6-M
 *** Core Variant: Cortex-M0
@@ -100,51 +100,51 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 120730 msgs/S, 241460 ctxswc/S
+--- Score : 119906 msgs/S, 239812 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 103037 msgs/S, 206074 ctxswc/S
+--- Score : 101539 msgs/S, 203078 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 103037 msgs/S, 206074 ctxswc/S
+--- Score : 101972 msgs/S, 203944 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 383632 ctxswc/S
+--- Score : 371752 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 79025 threads/S
+--- Score : 78107 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 112230 threads/S
+--- Score : 111504 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 33692 reschedules/S, 202152 ctxswc/S
+--- Score : 33164 reschedules/S, 198984 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 236968 ctxswc/S
+--- Score : 248880 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 360780 bytes/S
+--- Score : 367048 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 311418 timers/S
+--- Score : 302964 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 599396 wait+signal/S
+--- Score : 613732 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 371284 lock+unlock/S
+--- Score : 387156 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/STM32F103-72-GCC-compact.txt

@@ -5,7 +5,7 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 
 *** ChibiOS/RT test suite
 ***
-*** Kernel:       2.3.4unstable
+*** Kernel:       2.3.3unstable
 *** Compiler:     GCC 4.5.2
 *** Architecture: ARMv7-M
 *** Core Variant: Cortex-M3
@@ -99,51 +99,51 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 258426 msgs/S, 516852 ctxswc/S
+--- Score : 258293 msgs/S, 516586 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 204682 msgs/S, 409364 ctxswc/S
+--- Score : 204574 msgs/S, 409148 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 204682 msgs/S, 409364 ctxswc/S
+--- Score : 204574 msgs/S, 409148 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 831792 ctxswc/S
+--- Score : 831352 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 161453 threads/S
+--- Score : 161369 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 238693 threads/S
+--- Score : 238569 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 62418 reschedules/S, 374508 ctxswc/S
+--- Score : 62385 reschedules/S, 374310 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 481380 ctxswc/S
+--- Score : 481120 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 602560 bytes/S
+--- Score : 602228 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 641534 timers/S
+--- Score : 641196 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 842840 wait+signal/S
+--- Score : 842388 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 611492 lock+unlock/S
+--- Score : 611188 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/STM32F103-72-GCC.txt

@@ -99,43 +99,43 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 248452 msgs/S, 496904 ctxswc/S
+--- Score : 248463 msgs/S, 496926 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 198898 msgs/S, 397796 ctxswc/S
+--- Score : 198907 msgs/S, 397814 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 198898 msgs/S, 397796 ctxswc/S
+--- Score : 198907 msgs/S, 397814 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 838600 ctxswc/S
+--- Score : 838640 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 156781 threads/S
+--- Score : 156788 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 235429 threads/S
+--- Score : 235439 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 61109 reschedules/S, 366654 ctxswc/S
+--- Score : 61111 reschedules/S, 366666 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 477900 ctxswc/S
+--- Score : 477916 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 592276 bytes/S
+--- Score : 592296 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 646946 timers/S
+--- Score : 646974 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
@@ -143,7 +143,7 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 586216 lock+unlock/S
+--- Score : 586240 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/STM32F103-72-IAR-compact.txt

@@ -6,7 +6,7 @@ Compiler: IAR C/C++ Compiler for ARM 6.10.1.32143
 
 *** ChibiOS/RT test suite
 ***
-*** Kernel:       2.3.4unstable
+*** Kernel:       2.3.3unstable
 *** Compiler:     IAR
 *** Architecture: ARMv7-M
 *** Core Variant: Cortex-M3
@@ -100,51 +100,51 @@ Compiler: IAR C/C++ Compiler for ARM 6.10.1.32143
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 251219 msgs/S, 502438 ctxswc/S
+--- Score : 251084 msgs/S, 502168 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 211939 msgs/S, 423878 ctxswc/S
+--- Score : 211831 msgs/S, 423662 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 215112 msgs/S, 430224 ctxswc/S
+--- Score : 214998 msgs/S, 429996 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 842800 ctxswc/S
+--- Score : 842352 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 148759 threads/S
+--- Score : 148679 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 221758 threads/S
+--- Score : 221641 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 68491 reschedules/S, 410946 ctxswc/S
+--- Score : 68455 reschedules/S, 410730 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 471140 ctxswc/S
+--- Score : 470896 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 680616 bytes/S
+--- Score : 680260 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 690848 timers/S
+--- Score : 690492 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 1118272 wait+signal/S
+--- Score : 1117700 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 645840 lock+unlock/S
+--- Score : 645492 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/STM32F103-72-IAR.txt

@@ -100,35 +100,35 @@ Compiler: IAR C/C++ Compiler for ARM 6.10.1.32143
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 243407 msgs/S, 486814 ctxswc/S
+--- Score : 243426 msgs/S, 486852 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 208131 msgs/S, 416262 ctxswc/S
+--- Score : 208147 msgs/S, 416294 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 211190 msgs/S, 422380 ctxswc/S
+--- Score : 211209 msgs/S, 422418 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 838608 ctxswc/S
+--- Score : 838672 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 145067 threads/S
+--- Score : 145079 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 220950 threads/S
+--- Score : 220971 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 66609 reschedules/S, 399654 ctxswc/S
+--- Score : 66615 reschedules/S, 399690 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 458824 ctxswc/S
+--- Score : 458860 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
@@ -136,15 +136,15 @@ Compiler: IAR C/C++ Compiler for ARM 6.10.1.32143
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 703990 timers/S
+--- Score : 704032 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 1052104 wait+signal/S
+--- Score : 1052200 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 623052 lock+unlock/S
+--- Score : 623104 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/STM32F103-72-RVCT-compact.txt

@@ -6,7 +6,7 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
 
 *** ChibiOS/RT test suite
 ***
-*** Kernel:       2.3.4unstable
+*** Kernel:       2.3.3unstable
 *** Compiler:     RVCT
 *** Architecture: ARMv7-M
 *** Core Variant: Cortex-M3
@@ -100,51 +100,51 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 246926 msgs/S, 493852 ctxswc/S
+--- Score : 246810 msgs/S, 493620 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 214498 msgs/S, 428996 ctxswc/S
+--- Score : 214392 msgs/S, 428784 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 214498 msgs/S, 428996 ctxswc/S
+--- Score : 214392 msgs/S, 428784 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 857992 ctxswc/S
+--- Score : 857584 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 158980 threads/S
+--- Score : 161404 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 228850 threads/S
+--- Score : 229474 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 68304 reschedules/S, 409824 ctxswc/S
+--- Score : 68271 reschedules/S, 409626 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 504240 ctxswc/S
+--- Score : 504000 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 655812 bytes/S
+--- Score : 655496 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 563550 timers/S
+--- Score : 563282 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 942344 wait+signal/S
+--- Score : 941912 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 633060 lock+unlock/S
+--- Score : 632764 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

docs/reports/STM32F103-72-RVCT.txt

@@ -100,27 +100,27 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 241004 msgs/S, 482008 ctxswc/S
+--- Score : 241009 msgs/S, 482018 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 208779 msgs/S, 417558 ctxswc/S
+--- Score : 208782 msgs/S, 417564 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 211235 msgs/S, 422470 ctxswc/S
+--- Score : 211238 msgs/S, 422476 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 860144 ctxswc/S
+--- Score : 860160 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 156817 threads/S
+--- Score : 156137 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 225862 threads/S
+--- Score : 225157 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
@@ -128,23 +128,23 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 493600 ctxswc/S
+--- Score : 493588 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 633788 bytes/S
+--- Score : 633812 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 561076 timers/S
+--- Score : 561090 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 862660 wait+signal/S
+--- Score : 862712 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 611196 lock+unlock/S
+--- Score : 606064 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

os/ports/GCC/ARMCMx/chcore_v6m.c

@@ -90,6 +90,7 @@ __attribute__((naked))
 #endif
 void _port_switch_from_isr(void) {
 
+  if (chSchIsRescRequiredExI())
     chSchDoRescheduleI();
 #if CORTEX_ALTERNATE_SWITCH
   SCB_ICSR = ICSR_PENDSVSET;
@@ -153,10 +154,9 @@ void _port_switch(Thread *ntp, Thread *otp) {
 void _port_irq_epilogue(regarm_t lr) {
 
   if (lr != (regarm_t)0xFFFFFFF1) {
-    port_lock_from_isr();
-    if (chSchIsRescRequiredExI()) {
     register struct extctx *ctxp;
 
+    port_lock_from_isr();
     /* Adding an artificial exception return context, there is no need to
        populate it fully.*/
     asm volatile ("mrs     %0, PSP" : "=r" (ctxp) : : "memory");
@@ -166,9 +166,6 @@ void _port_irq_epilogue(regarm_t lr) {
     ctxp->xpsr = (regarm_t)0x01000000;
     /* Note, returning without unlocking is intentional, this is done in
       order to keep the rest of the context switching atomic.*/
-      return;
-    }
-    port_unlock_from_isr();
   }
 }
 

os/ports/GCC/ARMCMx/chcore_v7m.c

@@ -110,12 +110,12 @@ void PendSVVector(void) {
 #endif /* CORTEX_SIMPLIFIED_PRIORITY */
 
 /**
- * @brief   Reschedule verification and setup after an IRQ.
+ * @brief   Exception exit redirection to _port_switch_from_isr().
  */
 void _port_irq_epilogue(void) {
 
   port_lock_from_isr();
-  if ((SCB_ICSR & ICSR_RETTOBASE) && chSchIsRescRequiredExI()) {
+  if ((SCB_ICSR & ICSR_RETTOBASE)) {
     register struct extctx *ctxp;
 
     /* Adding an artificial exception return context, there is no need to
@@ -129,7 +129,6 @@ void _port_irq_epilogue(void) {
        order to keep the rest of the context switching atomic.*/
     return;
   }
-  /* ISR exit without context switching.*/
   port_unlock_from_isr();
 }
 
@@ -142,6 +141,7 @@ __attribute__((naked))
 #endif
 void _port_switch_from_isr(void) {
 
+  if (chSchIsRescRequiredExI())
     chSchDoRescheduleI();
 #if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
   asm volatile ("svc     #0");

os/ports/IAR/ARMCMx/chcoreasm_v6m.s

@@ -110,7 +110,11 @@ PendSVVector:
  */
         PUBLIC  _port_switch_from_isr
 _port_switch_from_isr:
+        bl      chSchIsRescRequiredExI
+        cmp     r0, #0
+        beq     noresch
         bl      chSchDoRescheduleI
+noresch:
         ldr     r2, =SCB_ICSR
         movs    r3, #128
 #if CORTEX_ALTERNATE_SWITCH
@@ -129,17 +133,10 @@ waithere:
  */
         PUBLIC  _port_irq_epilogue
 _port_irq_epilogue:
-        push    {r3, lr}
+        push    {lr}
         adds    r0, r0, #15
-        beq     stillnested
+        beq     skipexit
         cpsid   i
-        bl      chSchIsRescRequiredExI
-        cmp     r0, #0
-        bne     doresch
-        cpsie   i
-stillnested
-        pop     {r3, pc}
-doresch
         mrs     r3, PSP
         subs    r3, r3, #32
         msr     PSP, r3
@@ -148,6 +145,7 @@ doresch
         movs    r2, #128
         lsls    r2, r2, #17
         str     r2, [r3, #28]
-        pop     {r3, pc}
+skipexit:
+        pop     {pc}
 
         END

os/ports/IAR/ARMCMx/chcoreasm_v7m.s

@@ -76,7 +76,10 @@ _port_thread_start:
  */
         PUBLIC  _port_switch_from_isr
 _port_switch_from_isr:
+        bl      chSchIsRescRequiredExI
+        cbz     r0, .L2
         bl      chSchDoRescheduleI
+.L2:
 #if CORTEX_SIMPLIFIED_PRIORITY
         mov     r3, #LWRD SCB_ICSR
         movt    r3, #HWRD SCB_ICSR
@@ -102,20 +105,16 @@ _port_irq_epilogue:
         mov     r3, #LWRD SCB_ICSR
         movt    r3, #HWRD SCB_ICSR
         ldr     r3, [r3, #0]
-        tst     r3, #ICSR_RETTOBASE
+        ands    r3, r3, #ICSR_RETTOBASE
-        bne     .L7
+        bne     .L8
 #if CORTEX_SIMPLIFIED_PRIORITY
         cpsie   i
 #else
-        movs    r3, #CORTEX_BASEPRI_DISABLED
+        /* Note, R3 is already zero.*/
         msr     BASEPRI, r3
 #endif
         bx      lr
-.L7:
+.L8:
-        push    {r3, lr}
-        bl      chSchIsRescRequiredExI
-        cmp     r0, #0
-        beq     .L4
         mrs     r3, PSP
         subs    r3, r3, #EXTCTX_SIZE
         msr     PSP, r3
@@ -123,15 +122,7 @@ _port_irq_epilogue:
         str     r2, [r3, #24]
         mov     r2, #0x01000000
         str     r2, [r3, #28]
-        pop     {r3, pc}
+        bx      lr
-.L4:
-#if CORTEX_SIMPLIFIED_PRIORITY
-        cpsie   i
-#else
-        movs    r3, #CORTEX_BASEPRI_DISABLED
-        msr     BASEPRI, r3
-#endif
-        pop     {r3, pc}
 
 /*
  * SVC vector.

os/ports/RVCT/ARMCMx/chcoreasm_v6m.s

@@ -109,7 +109,11 @@ PendSVVector       PROC
  */
                 EXPORT  _port_switch_from_isr
 _port_switch_from_isr PROC
+                bl      chSchIsRescRequiredExI
+                cmp     r0, #0
+                beq     noresch
                 bl      chSchDoRescheduleI
+noresch
                 ldr     r2, =SCB_ICSR
                 movs    r3, #128
 #if CORTEX_ALTERNATE_SWITCH
@@ -128,17 +132,10 @@ waithere        b       waithere
  */
                 EXPORT  _port_irq_epilogue
 _port_irq_epilogue PROC
-                push    {r3, lr}
+                push    {lr}
                 adds    r0, r0, #15
-                beq     stillnested
+                beq     skipexit
                 cpsid   i
-                bl      chSchIsRescRequiredExI
-                cmp     r0, #0
-                bne     doresch
-                cpsie   i
-stillnested
-                pop     {r3, pc}
-doresch
                 mrs     r3, PSP
                 subs    r3, r3, #32
                 msr     PSP, r3
@@ -147,7 +144,8 @@ doresch
                 movs    r2, #128
                 lsls    r2, r2, #17
                 str     r2, [r3, #28]
-                pop     {r3, pc}
+skipexit
+                pop     {pc}
                 ENDP
 
                 END

os/ports/RVCT/ARMCMx/chcoreasm_v7m.s

@@ -73,7 +73,10 @@ _port_thread_start PROC
  */
                 EXPORT  _port_switch_from_isr
 _port_switch_from_isr PROC
+                bl      chSchIsRescRequiredExI
+                cbz     r0, noreschedule
                 bl      chSchDoRescheduleI
+noreschedule
 #if CORTEX_SIMPLIFIED_PRIORITY
                 mov     r3, #SCB_ICSR :AND: 0xFFFF
                 movt    r3, #SCB_ICSR :SHR: 16
@@ -100,20 +103,16 @@ _port_irq_epilogue PROC
                 mov     r3, #SCB_ICSR :AND: 0xFFFF
                 movt    r3, #SCB_ICSR :SHR: 16
                 ldr     r3, [r3, #0]
-                tst     r3, #ICSR_RETTOBASE
+                ands    r3, r3, #ICSR_RETTOBASE
                 bne     skipexit
 #if CORTEX_SIMPLIFIED_PRIORITY
                 cpsie   i
 #else
-                movs    r3, #CORTEX_BASEPRI_DISABLED
+                /* Note, R3 is already zero.*/
                 msr     BASEPRI, r3
 #endif
                 bx      lr
 skipexit
-                push    {r3, lr}
-                bl      chSchIsRescRequiredExI
-                cmp     r0, #0
-                beq     noreschedule
                 mrs     r3, PSP
                 subs    r3, r3, #EXTCTX_SIZE
                 msr     PSP, r3
@@ -121,15 +120,7 @@ skipexit
                 str     r2, [r3, #24]
                 mov     r2, #0x01000000
                 str     r2, [r3, #28]
-                pop     {r3, pc}
+                bx      lr
-noreschedule
-#if CORTEX_SIMPLIFIED_PRIORITY
-                cpsie   i
-#else
-                movs    r3, #CORTEX_BASEPRI_DISABLED
-                msr     BASEPRI, r3
-#endif
-                pop     {r3, pc}
                 ENDP
 
 /*
@@ -146,6 +137,7 @@ SVCallVector    PROC
                 movs    r3, #CORTEX_BASEPRI_DISABLED
                 msr     BASEPRI, r3
                 bx      lr
+                nop
                 ENDP
 #endif
 

readme.txt

@@ -71,6 +71,8 @@
 *****************************************************************************
 
 *** 2.3.3 ***
+- FIX: Fixed race condition in Cortex-Mx ports (bug 3317500)(backported
+  to 2.2.6).
 - FIX: Fixed wrong macro check in STM32 UART driver (bug 3311999)(backported
   to 2.2.6).
 - FIX: Fixed wrong macro definition in ARMv6-M architecture files (bug