git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@82 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
d0cc4f2406
commit
50cd4e00ef
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@ -21,7 +21,6 @@
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#include "lpc214x.h"
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#include "lpc214x_serial.h"
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//#include "lpc214x_ssp.h"
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#include "mmcsd.h"
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#include "buzzer.h"
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#include "evtimer.h"
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@ -56,8 +55,9 @@ static t_msg Thread2(void *arg) {
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return 0;
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}
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static BYTE8 rwbuf[512];
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static void TimerHandler(t_eventid id) {
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// static BYTE8 sspbuf[16];
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t_msg TestThread(void *p);
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if (!(IO0PIN & 0x00018000)) { // Both buttons
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@ -68,16 +68,21 @@ static void TimerHandler(t_eventid id) {
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if (!(IO0PIN & 0x00008000)) // Button 1
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PlaySound(1000, 100);
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if (!(IO0PIN & 0x00010000)) { // Button 2
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// sspRW(sspbuf, (BYTE8 *)"Hello World!\r\n", 14);
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// chFDDWrite(&COM1, sspbuf, 14);
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MMCCSD data;
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chFDDWrite(&COM1, (BYTE8 *)"Hello World!\r\n", 14);
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if (!mmcInit())
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PlaySound(2000, 500);
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if (mmcInit())
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return;
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if (mmcGetSize(&data))
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return;
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if (mmcBlockRead(0x200000, rwbuf))
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return;
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PlaySound(2000, 100);
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}
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}
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}
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static BYTE8 waThread3[UserStackSize(64)];
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static BYTE8 waThread3[UserStackSize(128)];
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static EvTimer evt;
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static t_evhandler evhndl[1] = {
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TimerHandler
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@ -26,11 +26,64 @@
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static EventSource MMCInsertEventSource;
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/*
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* Subsystem initialization.
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*/
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void InitMMC(void) {
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chEvtInit(&MMCInsertEventSource);
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}
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static void sendhdr(BYTE8 cmd, ULONG32 arg) {
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BYTE8 buf[6];
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/*
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* Wait for the bus to become idle if a write operation was in progress.
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*/
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while (TRUE) {
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sspRW(buf, NULL, 1);
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if (buf[0] == 0xFF)
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break;
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#ifdef NICE_WAITING
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chThdSleep(1); /* Trying to be nice with the other threads.*/
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#endif
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}
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buf[0] = 0x40 | cmd;
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buf[1] = arg >> 24;
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buf[2] = arg >> 16;
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buf[3] = arg >> 8;
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buf[4] = arg;
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buf[5] = 0x95; /* Valid for CMD0 ingnored by other commands. */
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sspRW(NULL, buf, 6);
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}
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static BYTE8 recvr1(void) {
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int i;
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BYTE8 r1[1];
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for (i = 0; i < 9; i++) {
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sspRW(r1, NULL, 1);
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if (r1[0] != 0xFF)
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return r1[0];
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}
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return 0xFF; /* Timeout.*/
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}
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static BOOL getdata(BYTE8 *buf, ULONG32 n) {
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int i;
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for (i = 0; i < MMC_WAIT_DATA; i++) {
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sspRW(buf, NULL, 1);
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if (buf[0] == 0xFE) {
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sspRW(buf, NULL, n);
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sspRW(NULL, NULL, 2); /* CRC ignored.*/
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return FALSE;
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}
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}
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return TRUE; /* Timeout.*/
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}
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/*
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* Initializes a card after the power up by selecting the SPI mode.
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*/
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@ -47,7 +100,7 @@ BOOL mmcInit(void) {
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sspRW(NULL, NULL, 16); /* 128 clock pulses without ~CS asserted. */
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int i = 0;
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while (TRUE) {
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if (mmcSendCommand(0, 0) == 0x01)
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if (mmcSendCommand(CMDGOIDLE, 0) == 0x01)
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break;
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if (++i >= CMD0_RETRY)
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return TRUE;
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@ -59,7 +112,7 @@ BOOL mmcInit(void) {
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*/
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i = 0;
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while (TRUE) {
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BYTE8 b = mmcSendCommand(1, 0);
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BYTE8 b = mmcSendCommand(CMDINIT, 0);
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if (b == 0x00)
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break;
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if (b != 0x01)
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@ -76,32 +129,6 @@ BOOL mmcInit(void) {
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return FALSE;
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}
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static void sendhdr(BYTE8 cmd, ULONG32 arg) {
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BYTE8 buf[8];
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buf[0] = 0xFF;
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buf[1] = 0x40 | cmd;
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buf[2] = arg >> 24;
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buf[3] = arg >> 16;
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buf[4] = arg >> 8;
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buf[5] = arg;
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buf[6] = 0x95; /* Valid for CMD0 ingnored by other commands. */
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buf[7] = 0xFF;
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sspRW(NULL, buf, 8);
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}
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static BYTE8 recvr1(void) {
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int i;
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BYTE8 r1[1];
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for (i = 0; i < 8; i++) {
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sspRW(r1, NULL, 1);
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if (r1[0] != 0xFF)
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return r1[0];
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}
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return 0xFF;
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}
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/*
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* Sends a simple command and returns a R1-type response.
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*/
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@ -114,3 +141,100 @@ BYTE8 mmcSendCommand(BYTE8 cmd, ULONG32 arg) {
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sspReleaseBus();
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return r1;
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}
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/*
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* Reads the card info record.
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* @param data the pointer to a \p MMCCSD structure
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* @return \p TRUE if an error happened
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*/
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BOOL mmcGetSize(MMCCSD *data) {
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BYTE8 buf[16];
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sspAcquireBus();
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sendhdr(CMDREADCSD, 0);
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if (recvr1() != 0x00) {
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sspReleaseBus();
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return TRUE;
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}
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if (getdata(buf, 16)) {
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sspReleaseBus();
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return TRUE;
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}
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sspReleaseBus();
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/* csize * multiplier */
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data->csize = (((buf[6] & 3) << 10) | (buf[7] << 2) | (buf[8] >> 6)) *
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(1 << (2 + (((buf[9] & 3) << 1) | (buf[10] >> 7))));
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data->rdblklen = 1 << (buf[5] & 15);
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return FALSE;
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}
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/*
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* Reads a block.
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* @param blknum the block number
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* @param buf the pointer to the read buffer
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* @return \p TRUE if an error happened
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*/
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BOOL mmcBlockRead(ULONG32 blknum, BYTE8 *buf) {
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sspAcquireBus();
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sendhdr(CMDREAD, blknum << 8);
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if (recvr1() != 0x00) {
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sspReleaseBus();
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return TRUE;
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}
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if (getdata(buf, 512)) {
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sspReleaseBus();
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return TRUE;
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}
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sspReleaseBus();
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return FALSE;
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}
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/*
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* Writes a block.
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* @param blknum the block number
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* @param buf the pointer to the write buffer
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* @return \p TRUE if an error happened
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* @note The function DOES NOT wait for the SPI bus to become free after
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* sending the data, the bus check is done before sending commands to
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* the card, this allows to not make useless busy waiting. The invoking
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* thread can do other things while the data is being written.
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*/
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BOOL mmcBlockWrite(ULONG32 blknum, BYTE8 *buf) {
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static BYTE8 start[] = {0xFF, 0xFE};
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BYTE8 b[4];
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sspAcquireBus();
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sendhdr(CMDWRITE, blknum << 8);
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if (recvr1() != 0x00) {
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sspReleaseBus();
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return TRUE;
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}
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sspRW(NULL, start, 2); /* Data prologue.*/
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sspRW(NULL, buf, 512); /* Data.*/
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sspRW(NULL, NULL, 2); /* CRC ignored in this version.*/
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sspRW(b, NULL, 1);
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sspReleaseBus();
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if ((b[0] & 0x1E) != 0x05)
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return TRUE;
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return FALSE;
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}
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/*
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* Makes sure that pending operations are completed before returning.
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*/
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void mmcSynch(void) {
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BYTE8 buf[4];
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sspAcquireBus();
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while (TRUE) {
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sspRW(buf, NULL, 1);
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if (buf[0] == 0xFF)
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break;
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#ifdef NICE_WAITING
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chThdSleep(1); /* Trying to be nice with the other threads.*/
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#endif
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}
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sspReleaseBus();
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}
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@ -20,12 +20,33 @@
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#ifndef _MMCSD_H_
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#define _MMCSD_H_
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#define NICE_WAITING
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/* Following times are 10mS units.*/
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#define CMD0_RETRY 10
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#define CMD1_RETRY 100
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/* Byte transfer time units.*/
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#define MMC_WAIT_DATA 10000
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#define CMDGOIDLE 0
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#define CMDINIT 1
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#define CMDREADCSD 9
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#define CMDREAD 17
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#define CMDWRITE 24
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typedef struct {
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ULONG32 csize;
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ULONG32 rdblklen;
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} MMCCSD;
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void InitMMC(void);
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BOOL mmcInit(void);
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BYTE8 mmcSendCommand(BYTE8 cmd, ULONG32 arg);
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BOOL mmcGetSize(MMCCSD *data);
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BOOL mmcBlockRead(ULONG32 blknum, BYTE8 *buf);
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BOOL mmcBlockWrite(ULONG32 blknum, BYTE8 *buf);
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void mmcSynch(void);
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#endif /* _MMCSD_H_*/
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@ -60,6 +60,29 @@ typedef volatile unsigned int IOREG32;
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PCPWM0 | PCI2C0 | PCSPI0 | PCRTC | PCSPI1 | \
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PCAD0 | PCI2C1 | PCAD1 | PCUSB)
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#define EINT0 1
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#define EINT1 2
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#define EINT2 4
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#define EINT3 8
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#define EXTWAKE0 1
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#define EXTWAKE1 2
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#define EXTWAKE2 4
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#define EXTWAKE3 8
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#define USBWAKE 0x20
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#define BODWAKE 0x4000
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#define RTCWAKE 0x8000
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#define EXTMODE0 1
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#define EXTMODE1 2
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#define EXTMODE2 4
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#define EXTMODE3 8
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#define EXTPOLAR0 1
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#define EXTPOLAR1 2
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#define EXTPOLAR2 4
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#define EXTPOLAR3 8
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typedef struct {
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IOREG32 PLL0_CON;
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IOREG32 PLL0_CFG;
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@ -39,10 +39,10 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
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*****************************************************************************
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*** 0.3.6 ***
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- Added SSP (SPI1) definitions to the lpc214x.h file.
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- Added SSP (SPI1) and ext.interrupts definitions to the lpc214x.h file.
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- Added SSP driver for the LPC2148.
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- Added MMC/SD block driver to the LPC2148 demo in order to support file
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systems in future releases.
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- Added experimental MMC/SD block driver to the LPC2148 demo in order to
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support file systems.
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- Added missing chThdSuspend() declararion in threads.h.
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*** 0.3.5 ***
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