From 4fa5db982c206a4ab3f512d4651f15dd4367e08b Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Mon, 19 Nov 2012 13:45:34 +0000
Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4833
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/SPC560BCxx/hal_lld.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/os/hal/platforms/SPC560BCxx/hal_lld.c b/os/hal/platforms/SPC560BCxx/hal_lld.c
index 1f714bef0..b7e157dc5 100644
--- a/os/hal/platforms/SPC560BCxx/hal_lld.c
+++ b/os/hal/platforms/SPC560BCxx/hal_lld.c
@@ -116,6 +116,10 @@ void spc_clock_init(void) {
   while (!ME.GS.B.S_FIRC)
     ;
 
+  /* Oscillators dividers setup.*/
+  CGM.FIRC_CTL.B.RCDIV   = SPC5_IRCDIV_VALUE - 1;
+  CGM.FXOSC_CTL.B.OSCDIV = SPC5_XOSCDIV_VALUE - 1;
+
 #if !SPC5_NO_INIT
 
 #if defined(SPC5_OSC_BYPASS)
@@ -126,8 +130,8 @@ void spc_clock_init(void) {
 
   /* Initialization of the FMPLLs settings.*/
   CGM.FMPLL_CR.R = SPC5_FMPLL0_ODF |
-                      ((SPC5_FMPLL0_IDF_VALUE - 1) << 26) |
-                      (SPC5_FMPLL0_NDIV_VALUE << 16);
+                   ((SPC5_FMPLL0_IDF_VALUE - 1) << 26) |
+                   (SPC5_FMPLL0_NDIV_VALUE << 16);
   CGM.FMPLL_MR.R = 0;                           /* TODO: Add a setting.     */
 
   /* Run modes initialization.*/