git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3447 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2011-10-15 13:24:40 +00:00
parent 3b8a4c0720
commit 4e3f49400a
7 changed files with 1214 additions and 65 deletions

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@ -56,35 +56,35 @@
* in the initialization code. * in the initialization code.
* Please refer to the STM32 Reference Manual for details. * Please refer to the STM32 Reference Manual for details.
*/ */
#define PIN_MODE_INPUT(n) (0 << ((n) * 2)) #define PIN_MODE_INPUT(n) (0U << ((n) * 2))
#define PIN_MODE_OUTPUT(n) (1 << ((n) * 2)) #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
#define PIN_MODE_ALTERNATE(n) (2 << ((n) * 2)) #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
#define PIN_MODE_ANALOG(n) (3 << ((n) * 2)) #define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
#define PIN_OTYPE_PUSHPULL(n) (0 << (n)) #define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1 << (n)) #define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_400K(n) (0 << ((n) * 2)) #define PIN_OSPEED_400K(n) (0U << ((n) * 2))
#define PIN_OSPEED_2M(n) (1 << ((n) * 2)) #define PIN_OSPEED_2M(n) (1U << ((n) * 2))
#define PIN_OSPEED_10M(n) (2 << ((n) * 2)) #define PIN_OSPEED_10M(n) (2U << ((n) * 2))
#define PIN_OSPEED_40M(n) (3 << ((n) * 2)) #define PIN_OSPEED_40M(n) (3U << ((n) * 2))
#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2)) #define PIN_PUDR_FLOATING(n) (0U << ((n) * 2))
#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1U << ((n) * 2))
#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2))
#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4)) #define PIN_AFIO_AF0(n) (0U << ((n % 8) * 4))
#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4)) #define PIN_AFIO_AF1(n) (1U << ((n % 8) * 4))
#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4)) #define PIN_AFIO_AF2(n) (2U << ((n % 8) * 4))
#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4)) #define PIN_AFIO_AF3(n) (3U << ((n % 8) * 4))
#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4)) #define PIN_AFIO_AF4(n) (4U << ((n % 8) * 4))
#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4)) #define PIN_AFIO_AF5(n) (5U << ((n % 8) * 4))
#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4)) #define PIN_AFIO_AF6(n) (6U << ((n % 8) * 4))
#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4)) #define PIN_AFIO_AF7(n) (7U << ((n % 8) * 4))
#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4)) #define PIN_AFIO_AF8(n) (8U << ((n % 8) * 4))
#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4)) #define PIN_AFIO_AF9(n) (9U << ((n % 8) * 4))
#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4)) #define PIN_AFIO_AF10(n) (10U << ((n % 8) * 4))
#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4)) #define PIN_AFIO_AF11(n) (11U << ((n % 8) * 4))
#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4)) #define PIN_AFIO_AF12(n) (12U << ((n % 8) * 4))
#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4)) #define PIN_AFIO_AF13(n) (13U << ((n % 8) * 4))
#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4)) #define PIN_AFIO_AF14(n) (14U << ((n % 8) * 4))
#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4)) #define PIN_AFIO_AF15(n) (15U << ((n % 8) * 4))
/* /*
* Port A setup. * Port A setup.

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@ -826,11 +826,6 @@
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath> <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File> </File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\DMAv1\stm32_dma.c</FilePath>
</File>
<File> <File>
<FileName>uart_lld.c</FileName> <FileName>uart_lld.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
@ -876,11 +871,6 @@
<FileType>5</FileType> <FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath> <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File> </File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\DMAv1\stm32_dma.h</FilePath>
</File>
<File> <File>
<FileName>stm32f10x.h</FileName> <FileName>stm32f10x.h</FileName>
<FileType>5</FileType> <FileType>5</FileType>
@ -891,6 +881,16 @@
<FileType>5</FileType> <FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath> <FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
</File> </File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</FilePath>
</File>
</Files> </Files>
</Group> </Group>
<Group> <Group>

View File

@ -876,16 +876,6 @@
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath> <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
</File> </File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\DMAv1\stm32_dma.h</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\DMAv1\stm32_dma.c</FilePath>
</File>
<File> <File>
<FileName>pal_lld.h</FileName> <FileName>pal_lld.h</FileName>
<FileType>5</FileType> <FileType>5</FileType>
@ -931,6 +921,16 @@
<FileType>5</FileType> <FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</FilePath> <FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</FilePath>
</File> </File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</FilePath>
</File>
</Files> </Files>
</Group> </Group>
<Group> <Group>

View File

@ -0,0 +1,980 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Demo</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>STM32L152RB</Device>
<Vendor>STMicroelectronics</Vendor>
<Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"STARTUP\ST\STM32L1xx\startup_stm32l1xx_md.s" ("STM32L15xx Medium density Startup Code")</StartupFile>
<FlashDriverDll>ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000)</FlashDriverDll>
<DeviceId>5248</DeviceId>
<RegisterFile>stm32l1xx.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>SFD\ST\STM32L15x\STM32L15x.sfr</SFDFile>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>ST\STM32L1xx\</RegisterFilePath>
<DBRegisterFilePath>ST\STM32L1xx\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\obj\</OutputDirectory>
<OutputName>ch</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\lst\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
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</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>8</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>STLink\ST-LINKIII-KEIL.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>1</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x4000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x4000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x20004000</StartAddress>
<Size>0x1</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>4</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls></MiscControls>
<Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\os\hal\platforms\STM32L1xx;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\test</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls>--cpreproc</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx</IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>board</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.c</FilePath>
</File>
<File>
<FileName>board.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>port</GroupName>
<Files>
<File>
<FileName>cstartup.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\cstartup.s</FilePath>
</File>
<File>
<FileName>chcoreasm_v7m.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s</FilePath>
</File>
<File>
<FileName>chcore.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.c</FilePath>
</File>
<File>
<FileName>chcore_v7m.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c</FilePath>
</File>
<File>
<FileName>nvic.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.c</FilePath>
</File>
<File>
<FileName>chcore.h</FileName>
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</Group>
<Group>
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<Files>
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<FilePath>..\..\..\test\testthd.h</FilePath>
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<GroupName>demo</GroupName>
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<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\main.c</FilePath>
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<File>
<FileName>mcuconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\mcuconf.h</FilePath>
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<File>
<FileName>chconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\chconf.h</FilePath>
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<File>
<FileName>halconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\halconf.h</FilePath>
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</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

View File

@ -1,14 +1,17 @@
*************************************************************************** ***************************************************************************
Options: -O3 -Otime --apcs=interwork Options: -O3 -Otime --apcs=interwork
Settings: SYSCLK=24, ACR=0x10 (no wait states) Settings: SYSCLK=24, ACR=0x10 (no wait states)
Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation]. Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
*************************************************************************** ***************************************************************************
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.1.7unstable *** Kernel: 2.3.4unstable
*** Compiled: Oct 15 2011 - 14:58:38
*** Compiler: RVCT
*** Architecture: ARMv7-M *** Architecture: ARMv7-M
*** Core Variant: Cortex-M3 *** Core Variant: Cortex-M3
*** Port Info: Advanced kernel mode
*** Platform: STM32 Value Line Medium Density *** Platform: STM32 Value Line Medium Density
*** Test Board: ST STM32VL-Discovery *** Test Board: ST STM32VL-Discovery
@ -98,56 +101,56 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1) --- Test Case 11.1 (Benchmark, messages #1)
--- Score : 99090 msgs/S, 198180 ctxswc/S --- Score : 101071 msgs/S, 202142 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2) --- Test Case 11.2 (Benchmark, messages #2)
--- Score : 86522 msgs/S, 173044 ctxswc/S --- Score : 86737 msgs/S, 173474 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3) --- Test Case 11.3 (Benchmark, messages #3)
--- Score : 86522 msgs/S, 173044 ctxswc/S --- Score : 86737 msgs/S, 173474 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch) --- Test Case 11.4 (Benchmark, context switch)
--- Score : 343016 ctxswc/S --- Score : 340176 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle) --- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 65072 threads/S --- Score : 63779 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only) --- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 91152 threads/S --- Score : 91045 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 29264 reschedules/S, 175584 ctxswc/S --- Score : 29194 reschedules/S, 175164 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching) --- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 202360 ctxswc/S --- Score : 203860 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput) --- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 228520 bytes/S --- Score : 255612 bytes/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset) --- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 294828 timers/S --- Score : 311804 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal) --- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 454856 wait+signal/S --- Score : 454332 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock) --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 277668 lock+unlock/S --- Score : 274152 lock+unlock/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint) --- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 360 bytes --- System: 376 bytes
--- Thread: 68 bytes --- Thread: 72 bytes
--- Timer : 20 bytes --- Timer : 20 bytes
--- Semaph: 12 bytes --- Semaph: 12 bytes
--- EventS: 4 bytes --- EventS: 4 bytes

View File

@ -0,0 +1,165 @@
***************************************************************************
Options: -O3 -Otime --apcs=interwork
Settings: SYSCLK=24, ACR=0x10 (no wait states)
Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
***************************************************************************
*** ChibiOS/RT test suite
***
*** Kernel: 2.3.4unstable
*** Compiled: Oct 15 2011 - 15:19:16
*** Compiler: RVCT
*** Architecture: ARMv7-M
*** Core Variant: Cortex-M3
*** Port Info: Advanced kernel mode
*** Platform: STM32L Ultra Low Power Medium Density
*** Test Board: ST STM32L-Discovery
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Threads, enqueuing test #2)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Threads, priority change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.4 (Threads, delays)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.1 (Semaphores, enqueuing)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Semaphores, timeout)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Semaphores, atomic signal-wait)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.4 (Binary Semaphores, functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.1 (Mutexes, priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Mutexes, priority return)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.5 (Mutexes, status)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.6 (CondVar, signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.7 (CondVar, broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.8 (CondVar, boost test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.1 (Messages, loop)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.1 (Mailboxes, queuing and timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.1 (Events, registration and dispatch)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.2 (Events, wait and broadcast)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.3 (Events, timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.1 (Heap, allocation and fragmentation test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.3 (Dynamic APIs, registry and references)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Queues, output queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 123437 msgs/S, 246874 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 106869 msgs/S, 213738 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 106869 msgs/S, 213738 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 425360 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 78833 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 111359 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 35464 reschedules/S, 212784 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 243100 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 312000 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 361876 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 530708 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 324940 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 376 bytes
--- Thread: 72 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- EventS: 4 bytes
--- EventL: 12 bytes
--- Mutex : 16 bytes
--- CondV.: 8 bytes
--- Queue : 32 bytes
--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------
Final result: SUCCESS

View File

@ -83,6 +83,7 @@
Now makefiles and load script files are requirements and trigger a Now makefiles and load script files are requirements and trigger a
rebuild if touched. rebuild if touched.
- NEW: Updated AVR demos to use the new PAL driver. - NEW: Updated AVR demos to use the new PAL driver.
- NEW: Added Keil build files to the STM32L-Discovery demo.
- CHANGE: Moved the STM32 DMA helper drivers files under the sub-family - CHANGE: Moved the STM32 DMA helper drivers files under the sub-family
specific directories because documentation issues. specific directories because documentation issues.