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Documentation related fixes and updated all the mcuconf.h for the STM32. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3735 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2012-01-04 22:00:44 +00:00
parent 05b9194031
commit 45c0b7f9bc
54 changed files with 174 additions and 114 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h
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@ -44,6 +44,8 @@
#define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_ADCPRE STM32_ADCPRE_DIV2
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
demos/ARMCM3-STM32F103-FATFS/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
demos/ARMCM3-STM32F103-G++/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
demos/ARMCM3-STM32F103/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
demos/ARMCM3-STM32F107/mcuconf.h
View File

@ -52,6 +52,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3
#define STM32_MCO STM32_MCO_PLL3
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
demos/ARMCM3-STM32L152-DISCOVERY/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
os/hal/platforms/STM32F1xx/hal_lld.c
View File

@ -74,7 +74,7 @@ void hal_lld_init(void) {
dmaInit();
#endif
/* Programmable voltage detector enable. */
/* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);

16
os/hal/platforms/STM32F1xx/hal_lld.h
View File

@ -48,24 +48,26 @@
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name PWR_CR register bits definitions
* @{
*/
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Enables or disables the programmable voltage detector.
*/

24
os/hal/platforms/STM32F1xx/stm32_rcc.h
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@ -171,7 +171,7 @@
/** @} */
/**
* @brief ADC peripherals specific RCC operations
* @name ADC peripherals specific RCC operations
* @{
*/
/**
@ -203,7 +203,7 @@
/** @} */
/**
* @brief Backup domain interface specific RCC operations
* @name Backup domain interface specific RCC operations
* @{
*/
/**
@ -244,7 +244,7 @@
/** @} */
/**
* @brief PWR interface specific RCC operations
* @name PWR interface specific RCC operations
* @{
*/
/**
@ -276,7 +276,7 @@
/** @} */
/**
* @brief CAN peripherals specific RCC operations
* @name CAN peripherals specific RCC operations
* @{
*/
/**
@ -308,7 +308,7 @@
/** @} */
/**
* @brief DMA peripherals specific RCC operations
* @name DMA peripherals specific RCC operations
* @{
*/
/**
@ -369,7 +369,7 @@
/** @} */
/**
* @brief ETH peripheral specific RCC operations
* @name ETH peripheral specific RCC operations
* @{
*/
/**
@ -405,7 +405,7 @@
/** @} */
/**
* @brief I2C peripherals specific RCC operations
* @name I2C peripherals specific RCC operations
* @{
*/
/**
@ -464,7 +464,7 @@
/** @} */
/**
* @brief SDIO peripheral specific RCC operations
* @name SDIO peripheral specific RCC operations
* @{
*/
/**
@ -497,7 +497,7 @@
/** @} */
/**
* @brief SPI peripherals specific RCC operations
* @name SPI peripherals specific RCC operations
* @{
*/
/**
@ -583,7 +583,7 @@
/** @} */
/**
* @brief TIM peripherals specific RCC operations
* @name TIM peripherals specific RCC operations
* @{
*/
/**
@ -750,7 +750,7 @@
/** @} */
/**
* @brief USART/UART peripherals specific RCC operations
* @name USART/UART peripherals specific RCC operations
* @{
*/
/**
@ -890,7 +890,7 @@
/** @} */
/**
* @brief USB peripheral specific RCC operations
* @name USB peripheral specific RCC operations
* @{
*/
/**

2
os/hal/platforms/STM32F2xx/hal_lld.c
View File

@ -78,7 +78,7 @@ void hal_lld_init(void) {
dmaInit();
#endif
/* Programmable voltage detector enable. */
/* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);

14
os/hal/platforms/STM32F2xx/hal_lld.h
View File

@ -140,13 +140,13 @@
*/
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/**

14
os/hal/platforms/STM32F2xx/stm32_rcc.h
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@ -256,7 +256,7 @@
/** @} */
/**
* @brief ADC peripherals specific RCC operations
* @name ADC peripherals specific RCC operations
* @{
*/
/**
@ -336,7 +336,7 @@
/** @} */
/**
* @brief DMA peripheral specific RCC operations
* @name DMA peripheral specific RCC operations
* @{
*/
/**
@ -391,7 +391,7 @@
/** @} */
/**
* @brief PWR interface specific RCC operations
* @name PWR interface specific RCC operations
* @{
*/
/**
@ -423,7 +423,7 @@
/** @} */
/**
* @brief I2C peripherals specific RCC operations
* @name I2C peripherals specific RCC operations
* @{
*/
/**
@ -503,7 +503,7 @@
/** @} */
/**
* @brief SPI peripherals specific RCC operations
* @name SPI peripherals specific RCC operations
* @{
*/
/**
@ -583,7 +583,7 @@
/** @} */
/**
* @brief TIM peripherals specific RCC operations
* @name TIM peripherals specific RCC operations
* @{
*/
/**
@ -744,7 +744,7 @@
/** @} */
/**
* @brief USART/UART peripherals specific RCC operations
* @name USART/UART peripherals specific RCC operations
* @{
*/
/**

2
os/hal/platforms/STM32F4xx/hal_lld.c
View File

@ -78,7 +78,7 @@ void hal_lld_init(void) {
dmaInit();
#endif
/* Programmable voltage detector enable. */
/* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);

14
os/hal/platforms/STM32F4xx/hal_lld.h
View File

@ -139,13 +139,13 @@
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/**

14
os/hal/platforms/STM32F4xx/stm32_rcc.h
View File

@ -256,7 +256,7 @@
/** @} */
/**
* @brief ADC peripherals specific RCC operations
* @name ADC peripherals specific RCC operations
* @{
*/
/**
@ -336,7 +336,7 @@
/** @} */
/**
* @brief DMA peripheral specific RCC operations
* @name DMA peripheral specific RCC operations
* @{
*/
/**
@ -391,7 +391,7 @@
/** @} */
/**
* @brief PWR interface specific RCC operations
* @name PWR interface specific RCC operations
* @{
*/
/**
@ -423,7 +423,7 @@
/** @} */
/**
* @brief I2C peripherals specific RCC operations
* @name I2C peripherals specific RCC operations
* @{
*/
/**
@ -503,7 +503,7 @@
/** @} */
/**
* @brief SPI peripherals specific RCC operations
* @name SPI peripherals specific RCC operations
* @{
*/
/**
@ -583,7 +583,7 @@
/** @} */
/**
* @brief TIM peripherals specific RCC operations
* @name TIM peripherals specific RCC operations
* @{
*/
/**
@ -744,7 +744,7 @@
/** @} */
/**
* @brief USART/UART peripherals specific RCC operations
* @name USART/UART peripherals specific RCC operations
* @{
*/
/**

2
os/hal/platforms/STM32L1xx/hal_lld.c
View File

@ -75,7 +75,7 @@ void hal_lld_init(void) {
dmaInit();
#endif
/* Programmable voltage detector enable. */
/* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);

14
os/hal/platforms/STM32L1xx/hal_lld.h
View File

@ -69,13 +69,13 @@
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/**

16
os/hal/platforms/STM32L1xx/stm32_rcc.h
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@ -177,7 +177,7 @@
/** @} */
/**
* @brief ADC peripherals specific RCC operations
* @name ADC peripherals specific RCC operations
* @{
*/
/**
@ -207,7 +207,7 @@
/** @} */
/**
* @brief DMA peripheral specific RCC operations
* @name DMA peripheral specific RCC operations
* @{
*/
/**
@ -237,7 +237,7 @@
/** @} */
/**
* @brief PWR interface specific RCC operations
* @name PWR interface specific RCC operations
* @{
*/
/**
@ -269,7 +269,7 @@
/** @} */
/**
* @brief I2C peripherals specific RCC operations
* @name I2C peripherals specific RCC operations
* @{
*/
/**
@ -324,7 +324,7 @@
/** @} */
/**
* @brief SPI peripherals specific RCC operations
* @name SPI peripherals specific RCC operations
* @{
*/
/**
@ -379,7 +379,7 @@
/** @} */
/**
* @brief TIM peripherals specific RCC operations
* @name TIM peripherals specific RCC operations
* @{
*/
/**
@ -459,7 +459,7 @@
/** @} */
/**
* @brief USART/UART peripherals specific RCC operations
* @name USART/UART peripherals specific RCC operations
* @{
*/
/**
@ -539,7 +539,7 @@
/** @} */
/**
* @brief USB peripheral specific RCC operations
* @name USB peripheral specific RCC operations
* @{
*/
/**

1
readme.txt
View File

@ -79,6 +79,7 @@
- FIX: Fixed SYSCFG clock not started in STM32L1/F4 HALs (bug 3449139).
- FIX: Fixed wrong definitions in STM32L-Discovery board file (bug 3449076).
- OPT: Improved the exception exit code in the GCC Cortex-Mx ports.
- NEW: Added PVD support to the HAL of all STM32s, by Barthess.
- NEW: Added to the HAL driver the handling of an abstract realtime free
running counter, added the capability to all the STM32 HALs.
- NEW: Modified ARM and ARMCMx build rules to allow parallel build. Now the

2
testhal/STM32F1xx/ADC/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/CAN/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/EXT/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

10
testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
View File

@ -36,15 +36,17 @@
* HAL driver system settings.
*/
#define STM32_SW STM32_SW_HSI
//#define STM32_PLLSRC STM32_PLLSRC_HSE
//#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
//#define STM32_PLLMUL_VALUE 9
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV1
#define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_ADCPRE STM32_ADCPRE_DIV4
//#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/GPT/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/I2C/mcuconf.h
View File

@ -43,6 +43,8 @@
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/IRQ_STORM/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/MAC/mcuconf.h
View File

@ -52,6 +52,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3
#define STM32_MCO STM32_MCO_PLL3
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32F1xx/PVD/mcuconf.h
View File

@ -36,8 +36,6 @@
* HAL driver system settings.
*/
#define STM32_SW STM32_SW_PLL
#define STM32_PVD_ENABLE TRUE
#define STM32_PLS STM32_PLS_LEV7
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9
@ -47,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE TRUE
#define STM32_PLS STM32_PLS_LEV7
/*
* ADC driver system settings.

2
testhal/STM32F1xx/PWM-ICU/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/RTC/mcuconf.h
View File

@ -44,6 +44,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_RTC STM32_RTC_LSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/SDC/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/SPI/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/UART/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/USB_CDC/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

2
testhal/STM32F1xx/USB_MSC/mcuconf.h
View File

@ -45,6 +45,8 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/ADC/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/EXT/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE TRUE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/GPT/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

7
testhal/STM32F4xx/I2C/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED FALSE
#define STM32_HSE_ENABLED TRUE
@ -63,7 +60,9 @@
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_RTC STM32_RTC_LSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/IRQ_STORM/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/PWM-ICU/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/RTC/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED FALSE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/SPI/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

6
testhal/STM32F4xx/UART/mcuconf.h
View File

@ -36,9 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PLS STM32_PLS_LEV0
#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@ -62,6 +59,9 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/ADC/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/EXT/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/GPT/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/IRQ_STORM/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/PWM-ICU/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/SPI/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.

4
testhal/STM32L1xx/UART/mcuconf.h
View File

@ -36,7 +36,6 @@
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@ -55,6 +54,9 @@
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.