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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6493 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-11-19 13:59:52 +00:00
parent 5a0d462a55
commit 449f7b1fa6
5 changed files with 98 additions and 51 deletions
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6
os/common/ports/e200/compilers/GCC/rules.mk
View File

@ -37,9 +37,9 @@ endif
# Exceptions stack size # Exceptions stack size
ifeq ($(USE_EXCEPTIONS_STACKSIZE),) ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
LDOPT := $(LDOPT),--defsym=__main_stack_size__=0x400 LDOPT := $(LDOPT),--defsym=__irq_stack_size__=0x400
else else
LDOPT := $(LDOPT),--defsym=__main_stack_size__=$(USE_EXCEPTIONS_STACKSIZE) LDOPT := $(LDOPT),--defsym=__irq_stack_size__=$(USE_EXCEPTIONS_STACKSIZE)
endif endif
# Output directory and files # Output directory and files
@ -86,7 +86,7 @@ ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS) ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS) CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS) CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH),--script=$(LDSCRIPT),$(LDOPT) LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH),$(LDOPT),--script=$(LDSCRIPT)
# Generate dependency information # Generate dependency information
CFLAGS += -MD -MP -MF .dep/$(@F).d CFLAGS += -MD -MP -MF .dep/$(@F).d

2
os/common/ports/e200/compilers/GCC/rules_z4.ld
View File

@ -29,8 +29,6 @@ SECTIONS
. = ORIGIN(flash); . = ORIGIN(flash);
.boot0 : ALIGN(16) SUBALIGN(16) .boot0 : ALIGN(16) SUBALIGN(16)
{ {
. += ${conf.instance.runtime_settings.load_address[0]?trim};
. = ALIGN(0x10000);
__ivpr_base__ = .; __ivpr_base__ = .;
KEEP(*(.boot)) KEEP(*(.boot))
} > flash } > flash

2
os/rt/ports/ARMCMx/chcore_v7m.h
View File

@ -396,7 +396,7 @@ static inline void port_init(void) {
* @return The interrupts status. * @return The interrupts status.
*/ */
static inline syssts_t port_get_irq_status(void) { static inline syssts_t port_get_irq_status(void) {
register uint32_t sts; uint32_t sts;
#if !CORTEX_SIMPLIFIED_PRIORITY #if !CORTEX_SIMPLIFIED_PRIORITY
sts = __get_BASEPRI(); sts = __get_BASEPRI();

55
os/rt/ports/e200/chcore.c
View File

@ -28,34 +28,29 @@
#include "ch.h" #include "ch.h"
/** /*===========================================================================*/
* @brief Kernel port layer initialization. /* Module local definitions. */
* @details IVOR4 and IVOR10 initialization. /*===========================================================================*/
*/
void port_init(void) {
#if PPC_SUPPORTS_IVORS
/* The CPU supports IVOR registers, the kernel requires IVOR4 and IVOR10
and the initialization is performed here.*/
asm volatile ("li %%r3, _IVOR4@l \t\n"
"mtIVOR4 %%r3 \t\n"
"li %%r3, _IVOR10@l \t\n"
"mtIVOR10 %%r3" : : : "memory");
#endif
}
/** /*===========================================================================*/
* @brief Halts the system. /* Module exported variables. */
* @details This function is invoked by the operating system when an /*===========================================================================*/
* unrecoverable error is detected (for example because a programming
* error in the application code that triggers an assertion while
* in debug mode).
*/
void port_halt(void) {
port_disable(); /*===========================================================================*/
while (TRUE) { /* Module local types. */
} /*===========================================================================*/
}
/*===========================================================================*/
/* Module local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Module local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Module exported functions. */
/*===========================================================================*/
/** /**
* @brief Performs a context switch between two threads. * @brief Performs a context switch between two threads.
@ -65,9 +60,9 @@ void port_halt(void) {
* switch performance so optimize here as much as you can. * switch performance so optimize here as much as you can.
*/ */
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
__attribute__((naked)) __attribute__((naked, required))
#endif #endif
void port_dummy1(void) { static void port_dummy1(void) {
asm (".global _port_switch"); asm (".global _port_switch");
asm ("_port_switch:"); asm ("_port_switch:");
@ -96,9 +91,9 @@ void port_dummy1(void) {
* invoked. * invoked.
*/ */
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
__attribute__((naked)) __attribute__((naked, required))
#endif #endif
void port_dummy2(void) { static void port_dummy2(void) {
asm (".global _port_thread_start"); asm (".global _port_thread_start");
asm ("_port_thread_start:"); asm ("_port_thread_start:");

84
os/rt/ports/e200/chcore.h
View File

@ -190,9 +190,9 @@ typedef void *regppc_t;
/** /**
* @brief Mandatory part of a stack frame. * @brief Mandatory part of a stack frame.
*/ */
struct eabi_frame { struct port_eabi_frame {
regppc_t slink; /**< Stack back link. */ uint32_t slink; /**< Stack back link. */
regppc_t shole; /**< Stack hole for LR storage. */ uint32_t shole; /**< Stack hole for LR storage. */
}; };
/** /**
@ -202,8 +202,8 @@ struct eabi_frame {
* @note R2 and R13 are not saved because those are assumed to be immutable * @note R2 and R13 are not saved because those are assumed to be immutable
* during the system life cycle. * during the system life cycle.
*/ */
struct extctx { struct port_extctx {
struct eabi_frame frame; struct port_eabi_frame frame;
/* Start of the e_stmvsrrw frame (offset 8).*/ /* Start of the e_stmvsrrw frame (offset 8).*/
regppc_t pc; regppc_t pc;
regppc_t msr; regppc_t msr;
@ -236,7 +236,7 @@ struct extctx {
* @note LR is stored in the caller contex so it is not present in this * @note LR is stored in the caller contex so it is not present in this
* structure. * structure.
*/ */
struct intctx { struct port_intctx {
regppc_t cr; /* Part of it is not volatile... */ regppc_t cr; /* Part of it is not volatile... */
regppc_t r14; regppc_t r14;
regppc_t r15; regppc_t r15;
@ -262,10 +262,10 @@ struct intctx {
/** /**
* @brief Platform dependent part of the @p Thread structure. * @brief Platform dependent part of the @p Thread structure.
* @details This structure usually contains just the saved stack pointer * @details This structure usually contains just the saved stack pointer
* defined as a pointer to a @p intctx structure. * defined as a pointer to a @p port_intctx structure.
*/ */
struct context { struct context {
struct intctx *sp; struct port_intctx *sp;
}; };
#endif /* !defined(_FROM_ASM_) */ #endif /* !defined(_FROM_ASM_) */
@ -277,15 +277,15 @@ struct context {
/** /**
* @brief Platform dependent part of the @p chThdCreateI() API. * @brief Platform dependent part of the @p chThdCreateI() API.
* @details This code usually setup the context switching frame represented * @details This code usually setup the context switching frame represented
* by an @p intctx structure. * by an @p port_intctx structure.
*/ */
#define PORT_SETUP_CONTEXT(tp, workspace, wsize, pf, arg) { \ #define PORT_SETUP_CONTEXT(tp, workspace, wsize, pf, arg) { \
uint8_t *sp = (uint8_t *)(workspace) + \ uint8_t *sp = (uint8_t *)(workspace) + \
(wsize) - \ (wsize) - \
sizeof(struct eabi_frame); \ sizeof(struct port_eabi_frame); \
((struct eabi_frame *)sp)->slink = 0; \ ((struct port_eabi_frame *)sp)->slink = 0; \
((struct eabi_frame *)sp)->shole = _port_thread_start; \ ((struct port_eabi_frame *)sp)->shole = (uint32_t)_port_thread_start; \
(tp)->p_ctx.sp = (struct intctx *)(sp - sizeof(struct intctx)); \ (tp)->p_ctx.sp = (struct port_intctx *)(sp - sizeof(struct port_intctx)); \
(tp)->p_ctx.sp->r31 = (regppc_t)(arg); \ (tp)->p_ctx.sp->r31 = (regppc_t)(arg); \
(tp)->p_ctx.sp->r30 = (regppc_t)(pf); \ (tp)->p_ctx.sp->r30 = (regppc_t)(pf); \
} }
@ -340,7 +340,7 @@ struct context {
#define port_switch(ntp, otp) _port_switch(ntp, otp) #define port_switch(ntp, otp) _port_switch(ntp, otp)
#else #else
#define port_switch(ntp, otp) { \ #define port_switch(ntp, otp) { \
register struct intctx *sp asm ("%r1"); \ register struct port_intctx *sp asm ("%r1"); \
if ((stkalign_t *)(sp - 1) < otp->p_stklimit) \ if ((stkalign_t *)(sp - 1) < otp->p_stklimit) \
chDbgPanic("stack overflow"); \ chDbgPanic("stack overflow"); \
_port_switch(ntp, otp); \ _port_switch(ntp, otp); \
@ -363,7 +363,6 @@ struct context {
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void port_init(void);
void _port_switch(thread_t *ntp, thread_t *otp); void _port_switch(thread_t *ntp, thread_t *otp);
void _port_thread_start(void); void _port_thread_start(void);
#ifdef __cplusplus #ifdef __cplusplus
@ -378,6 +377,61 @@ extern "C" {
asm module.*/ asm module.*/
#if !defined(_FROM_ASM_) #if !defined(_FROM_ASM_)
/**
* @brief Kernel port layer initialization.
* @details IVOR4 and IVOR10 initialization.
*/
static inline void port_init(void) {
#if PPC_SUPPORTS_IVORS
/* The CPU supports IVOR registers, the kernel requires IVOR4 and IVOR10
and the initialization is performed here.*/
asm volatile ("li %%r3, _IVOR4@l \t\n"
"mtIVOR4 %%r3 \t\n"
"li %%r3, _IVOR10@l \t\n"
"mtIVOR10 %%r3" : : : "memory");
#endif
}
/**
* @brief Returns a word encoding the current interrupts status.
*
* @return The interrupts status.
*/
static inline syssts_t port_get_irq_status(void) {
uint32_t sts;
sts = 0;
return sts;
}
/**
* @brief Checks the interrupt status.
*
* @param[in] sts the interrupt status word
*
* @return The interrupt status.
* @retvel false the word specified a disabled interrupts status.
* @retvel true the word specified an enabled interrupts status.
*/
static inline bool port_irq_enabled(syssts_t sts) {
return (sts & 1) == 0;
}
/**
* @brief Determines the current execution context.
*
* @return The execution context.
* @retval false not running in ISR mode.
* @retval true running in ISR mode.
*/
static inline bool port_is_isr_context(void) {
// return (bool)((__get_IPSR() & 0x1FF) != 0);
return false;
}
/** /**
* @brief Kernel-lock action. * @brief Kernel-lock action.
* @note Implemented as global interrupt disable. * @note Implemented as global interrupt disable.