Completed PAL support for AT91SAM7X.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1057 35acf78f-673a-0410-8e92-d51de3d6d3f4

demos/ARM7-AT91SAM7X-GCC/Makefile

@@ -49,6 +49,7 @@ include ../../test/test.mk
 # C sources that can be compiled in ARM or THUMB mode depending on the global
 # setting.
 CSRC = ../../ports/ARM7/chcore.c \
+       ../../ports/ARM7-AT91SAM7X/pal_lld.c \
        ../../ports/ARM7-AT91SAM7X/sam7x_serial.c \
        ${KERNSRC} \
        ${TESTSRC} \

demos/ARM7-AT91SAM7X-GCC/board.c

@@ -57,6 +57,15 @@ static CH_IRQ_HANDLER(SYSIrqHandler) {
   CH_IRQ_EPILOGUE();
 }
 
+/*
+ * Digital I/O ports static configuration as defined in @p board.h.
+ */
+static const AT91SAM7XPIOConfig config =
+{
+  {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+  {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+};
+
 /*
  * Early initialization code.
  * This initialization is performed just after reset before BSS and DATA
@@ -100,7 +109,7 @@ void hwinit0(void) {
   /*
    * PIO initialization.
    */
-  palInit();
+  palInit(&config);
 }
 
 /*
@@ -126,24 +135,26 @@ void hwinit1(void) {
    * LCD pins setup.
    */
   palClearPad(IOPORT_B, PIOB_LCD_BL);
-  AT91C_BASE_PIOB->PIO_OER    = PIOB_LCD_BL_MASK;    // Configure as output.
+  palSetPadMode(IOPORT_B, PIOB_LCD_BL, PAL_MODE_OUTPUT_PUSHPULL);
-  AT91C_BASE_PIOB->PIO_PPUDR  = PIOB_LCD_BL_MASK;    // Disable internal pullup resistor.
 
   palSetPad(IOPORT_A, PIOA_LCD_RESET);
-  AT91C_BASE_PIOA->PIO_OER    = PIOA_LCD_RESET_MASK; // Configure as output.
+  palSetPadMode(IOPORT_A, PIOA_LCD_RESET, PAL_MODE_OUTPUT_PUSHPULL);
-  AT91C_BASE_PIOA->PIO_PPUDR  = PIOA_LCD_RESET_MASK; // Disable internal pullup resistor.
 
   /*
-   * Joystick and buttons, disable pullups, already inputs.
+   * Joystick and buttons setup.
    */
-  AT91C_BASE_PIOA->PIO_PPUDR = PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
+  palSetGroupMode(IOPORT_A,
-                               PIOA_B4_MASK | PIOA_B5_MASK;
+                  PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
-  AT91C_BASE_PIOB->PIO_PPUDR = PIOB_SW1_MASK | PIOB_SW2_MASK;
+                  PIOA_B4_MASK | PIOA_B5_MASK,
+                  PAL_MODE_INPUT);
+  palSetGroupMode(IOPORT_B, PIOB_SW1_MASK | PIOB_SW2_MASK, PAL_MODE_INPUT);
 
   /*
-   * MMC/SD slot, disable pullups, already inputs.
+   * MMC/SD slot setup.
    */
-  AT91C_BASE_SYS->PIOB_PPUDR = PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK;
+  palSetGroupMode(IOPORT_B,
+                  PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK,
+                  PAL_MODE_INPUT);
 
   /*
    * PIT Initialization.

demos/ARM7-AT91SAM7X-GCC/board.h

@@ -20,15 +20,24 @@
 #ifndef _BOARD_H_
 #define _BOARD_H_
 
-#ifndef AT91SAM7X256_H
 #include "at91lib/AT91SAM7X256.h"
-#endif
 
 #define BOARD_OLIMEX_SAM7_EX256
 
 #define CLK             18432000
 #define MCK             48054857
 
+/*
+ * Initial I/O setup.
+ */
+#define VAL_PIOA_ODSR           0x00000000      /* Output data. */
+#define VAL_PIOA_OSR            0x00000000      /* Direction. */
+#define VAL_PIOA_PUSR           0xFFFFFFFF      /* Pull-up. */
+
+#define VAL_PIOB_ODSR           0x00000000      /* Output data. */
+#define VAL_PIOB_OSR            0x00000000      /* Direction. */
+#define VAL_PIOB_PUSR           0xFFFFFFFF      /* Pull-up. */
+
 /*
  * I/O definitions.
  */

demos/ARM7-AT91SAM7X-WEB-GCC/Makefile

@@ -58,6 +58,7 @@ USRC = ../../ext/uip-1.0/uip/uip_arp.c \
 # C sources that can be compiled in ARM or THUMB mode depending on the global
 # setting.
 CSRC = ../../ports/ARM7/chcore.c \
+       ../../ports/ARM7-AT91SAM7X/pal_lld.c \
        ../../ports/ARM7-AT91SAM7X/sam7x_serial.c \
        ../../ports/ARM7-AT91SAM7X/sam7x_emac.c \
        ${KERNSRC} \

demos/ARM7-AT91SAM7X-WEB-GCC/board.c

@@ -58,6 +58,15 @@ static CH_IRQ_HANDLER(SYSIrqHandler) {
   CH_IRQ_EPILOGUE();
 }
 
+/*
+ * Digital I/O ports static configuration as defined in @p board.h.
+ */
+static const AT91SAM7XPIOConfig config =
+{
+  {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+  {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+};
+
 /*
  * Early initialization code.
  * This initialization is performed just after reset before BSS and DATA
@@ -101,7 +110,7 @@ void hwinit0(void) {
   /*
    * PIO initialization.
    */
-  palInit();
+  palInit(&config);
 }
 
 /*
@@ -127,24 +136,26 @@ void hwinit1(void) {
    * LCD pins setup.
    */
   palClearPad(IOPORT_B, PIOB_LCD_BL);
-  AT91C_BASE_PIOB->PIO_OER    = PIOB_LCD_BL_MASK;    // Configure as output.
+  palSetPadMode(IOPORT_B, PIOB_LCD_BL, PAL_MODE_OUTPUT_PUSHPULL);
-  AT91C_BASE_PIOB->PIO_PPUDR  = PIOB_LCD_BL_MASK;    // Disable internal pullup resistor.
 
   palSetPad(IOPORT_A, PIOA_LCD_RESET);
-  AT91C_BASE_PIOA->PIO_OER    = PIOA_LCD_RESET_MASK; // Configure as output.
+  palSetPadMode(IOPORT_A, PIOA_LCD_RESET, PAL_MODE_OUTPUT_PUSHPULL);
-  AT91C_BASE_PIOA->PIO_PPUDR  = PIOA_LCD_RESET_MASK; // Disable internal pullup resistor.
 
   /*
-   * Joystick and buttons, disable pullups, already inputs.
+   * Joystick and buttons setup.
    */
-  AT91C_BASE_PIOA->PIO_PPUDR = PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
+  palSetGroupMode(IOPORT_A,
-                               PIOA_B4_MASK | PIOA_B5_MASK;
+                  PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
-  AT91C_BASE_PIOB->PIO_PPUDR = PIOB_SW1_MASK | PIOB_SW2_MASK;
+                  PIOA_B4_MASK | PIOA_B5_MASK,
+                  PAL_MODE_INPUT);
+  palSetGroupMode(IOPORT_B, PIOB_SW1_MASK | PIOB_SW2_MASK, PAL_MODE_INPUT);
 
   /*
-   * MMC/SD slot, disable pullups, already inputs.
+   * MMC/SD slot setup.
    */
-  AT91C_BASE_SYS->PIOB_PPUDR = PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK;
+  palSetGroupMode(IOPORT_B,
+                  PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK,
+                  PAL_MODE_INPUT);
 
   /*
    * PIT Initialization.

demos/ARM7-AT91SAM7X-WEB-GCC/board.h

@@ -20,15 +20,24 @@
 #ifndef _BOARD_H_
 #define _BOARD_H_
 
-#ifndef AT91SAM7X256_H
 #include "at91lib/AT91SAM7X256.h"
-#endif
 
 #define BOARD_OLIMEX_SAM7_EX256
 
 #define CLK             18432000
 #define MCK             48054857
 
+/*
+ * Initial I/O setup.
+ */
+#define VAL_PIOA_ODSR           0x00000000      /* Output data. */
+#define VAL_PIOA_OSR            0x00000000      /* Direction. */
+#define VAL_PIOA_PUSR           0xFFFFFFFF      /* Pull-up. */
+
+#define VAL_PIOB_ODSR           0x00000000      /* Output data. */
+#define VAL_PIOB_OSR            0x00000000      /* Direction. */
+#define VAL_PIOB_PUSR           0xFFFFFFFF      /* Pull-up. */
+
 /*
  * I/O definitions.
  */

demos/ARMCM3-STM32F103-GCC/board.c

@@ -32,7 +32,7 @@ static const STM32GPIOConfig config =
   {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
   {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
   {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
-  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}
 };
 
 /*

ports/ARM7-AT91SAM7X/pal_lld.c

@@ -0,0 +1,116 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file ports/ARM7-AT91SAM7X/pal_lld.c
+ * @brief AT91SAM7X PIO low level driver code
+ * @addtogroup AT91SAM7X_PAL
+ * @{
+ */
+
+#include <ch.h>
+#include <pal.h>
+
+/**
+ * @brief AT91SAM7X I/O ports configuration.
+ * @details PIO registers initialization.
+ *
+ * @param[in] config the AT91SAM7X ports configuration
+ */
+void _pal_lld_init(const AT91SAM7XPIOConfig *config) {
+
+  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB);
+
+  /*
+   * PIOA setup.
+   */
+  AT91C_BASE_PIOA->PIO_OER  = config->P0Data.pusr;      /* Pull-up as spec.*/
+  AT91C_BASE_PIOA->PIO_ODR  = ~config->P0Data.pusr;
+  AT91C_BASE_PIOA->PIO_PER  = 0xFFFFFFFF;               /* PIO enabled.*/
+  AT91C_BASE_PIOA->PIO_ODSR = config->P0Data.odsr;      /* Data as specified.*/
+  AT91C_BASE_PIOA->PIO_OER  = config->P0Data.osr;       /* Dir. as specified.*/
+  AT91C_BASE_PIOA->PIO_ODR  = ~config->P0Data.osr;
+  AT91C_BASE_PIOA->PIO_IFDR = 0xFFFFFFFF;               /* Filter disabled.*/
+  AT91C_BASE_PIOA->PIO_IDR  = 0xFFFFFFFF;               /* Int. disabled.*/
+  AT91C_BASE_PIOA->PIO_MDDR = 0xFFFFFFFF;               /* Push Pull drive.*/
+  AT91C_BASE_PIOA->PIO_ASR  = 0xFFFFFFFF;               /* Peripheral A.*/
+  AT91C_BASE_PIOA->PIO_OWER = 0xFFFFFFFF;               /* Write enabled.*/
+
+  /*
+   * PIOB setup.
+   */
+  AT91C_BASE_PIOB->PIO_OER  = config->P0Data.pusr;      /* Pull-up as spec.*/
+  AT91C_BASE_PIOB->PIO_ODR  = ~config->P0Data.pusr;
+  AT91C_BASE_PIOB->PIO_PER  = 0xFFFFFFFF;               /* PIO enabled.*/
+  AT91C_BASE_PIOB->PIO_ODSR = config->P1Data.odsr;      /* Data as specified.*/
+  AT91C_BASE_PIOB->PIO_OER  = config->P1Data.osr;       /* Dir. as specified.*/
+  AT91C_BASE_PIOB->PIO_ODR  = ~config->P1Data.osr;
+  AT91C_BASE_PIOB->PIO_IFDR = 0xFFFFFFFF;               /* Filter disabled.*/
+  AT91C_BASE_PIOB->PIO_IDR  = 0xFFFFFFFF;               /* Int. disabled.*/
+  AT91C_BASE_PIOB->PIO_MDDR = 0xFFFFFFFF;               /* Push Pull drive.*/
+  AT91C_BASE_PIOB->PIO_ASR  = 0xFFFFFFFF;               /* Peripheral A.*/
+  AT91C_BASE_PIOB->PIO_OWER = 0xFFFFFFFF;               /* Write enabled.*/
+}
+
+/**
+ * @brief Pads mode setup.
+ * @details This function programs a pads group belonging to the same port
+ *          with the specified mode.
+ *
+ * @param[in] port the port identifier
+ * @param[in] mask the group mask
+ * @param[in] mode the mode
+ *
+ * @note This function is not meant to be invoked directly by the application
+ *       code.
+ * @note @p PAL_MODE_RESET is implemented as input with pull-up.
+ * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
+ *       state.
+ * @note @p PAL_MODE_OUTPUT_OPENDRAIN also enables the pull-up resistor.
+ */
+void _pal_lld_setgroupmode(ioportid_t port,
+                           ioportmask_t mask,
+                           uint_fast8_t mode) {
+
+  switch (mode & PAL_MODE_MASK) {
+  case PAL_MODE_RESET:
+  case PAL_MODE_INPUT_PULLUP:
+    port->PIO_PPUER = mask;
+    port->PIO_ODR = mask;
+    break;
+  case PAL_MODE_INPUT:
+    port->PIO_PPUDR = mask;
+    port->PIO_ODR = mask;
+    break;
+  case PAL_MODE_UNCONNECTED:
+    port->PIO_SODR = mask;
+    /* Falls in */
+  case PAL_MODE_OUTPUT_PUSHPULL:
+    port->PIO_PPUDR = mask;
+    port->PIO_OER = mask;
+    port->PIO_MDDR = mask;
+    break;
+  case PAL_MODE_OUTPUT_OPENDRAIN:
+    port->PIO_PPUER = mask;
+    port->PIO_OER = mask;
+    port->PIO_MDER = mask;
+  }
+}
+
+/** @} */

ports/ARM7-AT91SAM7X/pal_lld.h

@@ -19,7 +19,7 @@
 
 /**
  * @file ports/ARM7-AT91SAM7X/pal_lld.h
- * @brief AT91SAM7X PIO low level driver
+ * @brief AT91SAM7X PIO low level driver header
  * @addtogroup AT91SAM7X_PAL
  * @{
  */
@@ -27,14 +27,44 @@
 #ifndef _PAL_LLD_H_
 #define _PAL_LLD_H_
 
-#ifndef AT91SAM7X256_H
 #include "at91lib/AT91SAM7X256.h"
-#endif
+
+/*===========================================================================*/
+/* Unsupported modes and specific modes                                      */
+/*===========================================================================*/
+
+#undef PAL_MODE_INPUT_PULLDOWN
 
 /*===========================================================================*/
 /* I/O Ports Types and constants.                                            */
 /*===========================================================================*/
 
+/**
+ * @brief PIO port setup info.
+ */
+typedef struct {
+  /** Initial value for ODSR register (data).*/
+  uint32_t      odsr;
+  /** Initial value for OSR register (direction).*/
+  uint32_t      osr;
+  /** Initial value for PUSR register (Pull-ups).*/
+  uint32_t      pusr;
+} at91sam7x_pio_setup_t;
+
+/**
+ * @brief AT91SAM7X PIO static initializer.
+ * @details An instance of this structure must be passed to @p palInit() at
+ *          system startup time in order to initialized the digital I/O
+ *          subsystem. This represents only the initial setup, specific pads
+ *          or whole ports can be reprogrammed at later time.
+ */
+typedef struct {
+  /** @brief Port 0 setup data.*/
+  at91sam7x_pio_setup_t P0Data;
+  /** @brief Port 1 setup data.*/
+  at91sam7x_pio_setup_t P1Data;
+} AT91SAM7XPIOConfig;
+
 /**
  * @brief Width, in bits, of an I/O port.
  */
@@ -74,18 +104,8 @@ typedef AT91PS_PIO ioportid_t;
 
 /**
  * @brief Low level PAL subsystem initialization.
- * @details Clocks are enabled and both PIO ports are reset to a known state
- *          and all pads are enabled a digital I/Os.
- *
- * @note The other PIO registers are not modified, the PIOs are supposed to
- *       have just been reset. The PIO_PSR is cleared because its status
- *       after the reset is not very clear in the documentation.
  */
-#define pal_lld_init() {                                                \
+#define pal_lld_init(config) _pal_lld_init(config)
-  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB); \
-  AT91C_BASE_PIOA->PIO_PER  = 0xFFFFFFFF;                               \
-  AT91C_BASE_PIOB->PIO_PER  = 0xFFFFFFFF;                               \
-}
 
 /**
  * @brief Reads the physical I/O port states.
@@ -180,6 +200,23 @@ typedef AT91PS_PIO ioportid_t;
   (port)->PIO_OWDR = (mask) << (offset);                                \
 }
 
+/**
+ * @brief Pads group mode setup.
+ * @details This function programs a pads group belonging to the same port
+ *          with the specified mode.
+ *
+ * @param[in] port the port identifier
+ * @param[in] mask the group mask
+ * @param[in] mode the mode
+ *
+ * @note This function is not meant to be invoked directly by the application
+ *       code.
+ * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
+ *       state.
+ */
+#define pal_lld_setgroupmode(port, mask, mode) \
+  _pal_lld_setgroupmode(port, mask, mode)
+
 /**
  * @brief Writes a logical state on an output pad.
  *
@@ -192,6 +229,17 @@ typedef AT91PS_PIO ioportid_t;
  */
 #define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void _pal_lld_init(const AT91SAM7XPIOConfig *config);
+  void _pal_lld_setgroupmode(ioportid_t port,
+                             ioportmask_t mask,
+                             uint_fast8_t mode);
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* _PAL_LLD_H_ */
 
 /** @} */

ports/ARM7-AT91SAM7X/port.dox

@@ -39,8 +39,21 @@
  * - Output latched regardless of the pad setting.
  * - Direct read of input pads regardless of the pad setting.
  * .
- * The only non atomic operations are bit toggling and bus/group writing.
+ * <h2>Supported Setup Modes</h2>
+ * - @p PAL_MODE_RESET.
+ * - @p PAL_MODE_UNCONNECTED.
+ * - @p PAL_MODE_INPUT.
+ * - @p PAL_MODE_INPUT_PULLUP.
+ * - @p PAL_MODE_OUTPUT_PUSHPULL.
+ * - @p PAL_MODE_OUTPUT_OPENDRAIN.
+ * .
+ * Any attempt to setup an invalid mode is ignored.
  *
+ * <h2>Suboptimal Behavior</h2>
+ * Some PIO features are less than optimal:
+ * - Pad/port toggling operations are not atomic.
+ * - Pad/group mode setup is not atomic.
+ * .
  * @ingroup AT91SAM7X
  */
 

src/lib/pal.h

@@ -27,6 +27,13 @@
 #ifndef _PAL_H_
 #define _PAL_H_
 
+/**
+ * @brief Bits in a mode word dedicated as mode selector.
+ * @details The other bits are not defined and may be used as device-specific
+ *          option bits.
+ */
+#define PAL_MODE_MASK                   0xF
+
 /**
  * @brief After reset state.
  * @details The state itself is not specified and is architecture dependent,