git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1054 35acf78f-673a-0410-8e92-d51de3d6d3f4
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file ports/ARM7-LPC214x/pal_lld.c
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* @brief LPC214x FIO low level driver code
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* @addtogroup LPC214x_PAL
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* @{
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*/
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#include <ch.h>
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#include <pal.h>
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/**
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* @brief LPC214x I/O ports configuration.
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* @details Ports A-D clocks enabled, AFIO clock enabled.
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*
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* @param[in] config the LPC214x ports configuration
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*/
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void _pal_lld_init(const LPC214xFIOConfig *config) {
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}
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/**
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* @brief Pads mode setup.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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*
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* @param[in] port the port identifier
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* @param[in] mask the group mask
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* @param[in] mode the mode
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched data
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* is used for the resistor selection.
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*/
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void _pal_lld_setgroupmode(ioportid_t port,
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ioportmask_t mask,
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uint_fast8_t mode) {
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}
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/** @} */
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@ -19,7 +19,7 @@
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/**
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* @file ports/ARM7-LPC214x/pal_lld.h
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* @brief LPC214x FIO low level driver
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* @brief LPC214x FIO low level driver header
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* @addtogroup LPC214x_PAL
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* @{
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*/
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@ -31,10 +31,32 @@
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#include "lpc214x.h"
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#endif
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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#undef PAL_MODE_INPUT_PULLUP
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#undef PAL_MODE_INPUT_PULLDOWN
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#undef PAL_MODE_OUTPUT_OPENDRAIN
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/**
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* @brief LPC214x FIO static initializer.
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* @details An instance of this structure must be passed to @p palInit() at
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* system startup time in order to initialized the digital I/O
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* subsystem. This represents only the initial setup, specific pads
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* or whole ports can be reprogrammed at later time.
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*/
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typedef struct {
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/** @brief Port 0 setup data.*/
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ioportmask_t P0Data;
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/** @brief Port 1 setup data.*/
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ioportmask_t P1Data;
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} LPC214xFIOConfig;
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/**
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* @brief Width, in bits, of an I/O port.
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*/
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@ -183,6 +205,17 @@ typedef FIO * ioportid_t;
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(port)->FIO_DIR = (dir); \
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}
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#ifdef __cplusplus
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extern "C" {
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#endif
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void _pal_lld_init(const LPC214xFIOConfig *config);
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void _pal_lld_setgroupmode(ioportid_t port,
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ioportmask_t mask,
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uint_fast8_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _PAL_LLD_H_ */
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/** @} */
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@ -0,0 +1,164 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file ports/ARMCM3-STM32F103/pal_lld.c
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* @brief STM32 GPIO low level driver code
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* @addtogroup STM32F103_PAL
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* @{
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*/
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#include <ch.h>
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#include <pal.h>
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/**
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* @brief STM32 I/O ports configuration.
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* @details Ports A-D clocks enabled, AFIO clock enabled.
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*
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* @param[in] config the STM32 ports configuration
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*/
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void _pal_lld_init(const STM32GPIOConfig *config) {
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uint32_t clocks = RCC_APB2ENR_AFIOEN;
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#if defined(_GPIOA)
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clocks |= RCC_APB2ENR_IOPAEN;
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#endif
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#if defined(_GPIOB)
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clocks |= RCC_APB2ENR_IOPBEN;
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#endif
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#if defined(_GPIOC)
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clocks |= RCC_APB2ENR_IOPCEN;
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#endif
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#if defined(_GPIOD)
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clocks |= RCC_APB2ENR_IOPDEN;
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#endif
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#if defined(_GPIOE)
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clocks |= RCC_APB2ENR_IOPEEN;
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#endif
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RCC->APB2ENR |= clocks;
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/*
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* Resets the GPIO ports and AFIO.
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*/
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RCC->APB2RSTR = RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST |
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RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST |
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RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST |
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RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST;
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RCC->APB2RSTR = 0;
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#if defined(_GPIOA)
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IOPORT_A->ODR = config->PAData.odr;
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IOPORT_A->CRH = config->PAData.crh;
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IOPORT_A->CRL = config->PAData.crl;
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#endif
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#if defined(_GPIOB)
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IOPORT_B->ODR = config->PBData.odr;
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IOPORT_B->CRH = config->PBData.crh;
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IOPORT_B->CRL = config->PBData.crl;
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#endif
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#if defined(_GPIOC)
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IOPORT_C->ODR = config->PCData.odr;
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IOPORT_C->CRH = config->PCData.crh;
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IOPORT_C->CRL = config->PCData.crl;
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#endif
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#if defined(_GPIOD)
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IOPORT_D->ODR = config->PDData.odr;
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IOPORT_D->CRH = config->PDData.crh;
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IOPORT_D->CRL = config->PDData.crl;
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#endif
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#if defined(_GPIOE)
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IOPORT_E->ODR = config->PEData.odr;
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IOPORT_E->CRH = config->PEData.crh;
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IOPORT_E->CRL = config->PEData.crl;
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#endif
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#if defined(_GPIOF)
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IOPORT_F->ODR = config->PFData.odr;
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IOPORT_F->CRH = config->PFData.crh;
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IOPORT_F->CRL = config->PFData.crl;
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#endif
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#if defined(_GPIOG)
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IOPORT_G->ODR = config->PGData.odr;
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IOPORT_G->CRH = config->PGData.crh;
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IOPORT_G->CRL = config->PGData.crl;
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#endif
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}
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/**
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* @brief Pads mode setup.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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*
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* @param[in] port the port identifier
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* @param[in] mask the group mask
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* @param[in] mode the mode
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output at 2MHz.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched data
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* is used for the resistor selection.
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*/
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void _pal_lld_setgroupmode(ioportid_t port,
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ioportmask_t mask,
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uint_fast8_t mode) {
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static const uint8_t cfgtab[] = {
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4, /* PAL_MODE_RESET, implemented as input.*/
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2, /* PAL_MODE_UNCONNECTED, implemented as push pull output 2MHz.*/
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4, /* PAL_MODE_INPUT */
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8, /* PAL_MODE_INPUT_PULLUP */
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8, /* PAL_MODE_INPUT_PULLDOWN */
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3, /* PAL_MODE_OUTPUT_PUSHPULL, 50MHz.*/
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7, /* PAL_MODE_OUTPUT_OPENDRAIN, 50MHz.*/
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};
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uint32_t mh, ml, crh, crl, cfg;
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unsigned i;
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if (mode == PAL_MODE_INPUT_PULLUP)
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port->BSRR = mask;
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else if (mode == PAL_MODE_INPUT_PULLDOWN)
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port->BRR = mask;
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cfg = cfgtab[mode];
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mh = ml = crh = crl = 0;
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for (i = 0; i < 8; i++) {
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ml <<= 4;
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mh <<= 4;
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crl <<= 4;
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crh <<= 4;
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if ((mask & 1) == 0)
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ml |= 0xf;
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else
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crl |= cfg;
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if ((mask & 0x10000) == 0)
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mh |= 0xf;
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else
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crh |= cfg;
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mask >>= 1;
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}
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port->CRH = (port->CRH & mh) | crh;
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port->CRL = (port->CRL & ml) | crl;
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}
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/** @} */
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#ifndef _PAL_LLD_H_
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#define _PAL_LLD_H_
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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*/
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#define pal_lld_setpadmode(port, pad, mode)
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#ifdef __cplusplus
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extern "C" {
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#endif
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ioportmask_t palReadBus(IOBus *bus);
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void palWriteBus(IOBus *bus, ioportmask_t bits);
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void palSetBusMode(IOBus *bus, uint_fast8_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _PAL_LLD_H_ */
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/** @} */
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