GCC Cortex-Mx ports optimization.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3659 35acf78f-673a-0410-8e92-d51de3d6d3f4

docs/reports/STM32F407-168-GCC.txt

@@ -6,7 +6,7 @@ Settings: SYSCLK=168, ACR=0x705 (5 wait states)
 *** ChibiOS/RT test suite
 ***
 *** Kernel:       2.3.5unstable
-*** Compiled:     Dec 24 2011 - 17:38:24
+*** Compiled:     Dec 26 2011 - 11:39:07
 *** Compiler:     GCC 4.6.2
 *** Architecture: ARMv7-ME
 *** Core Variant: Cortex-M4
@@ -100,51 +100,51 @@ Settings: SYSCLK=168, ACR=0x705 (5 wait states)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 749296 msgs/S, 1498592 ctxswc/S
+--- Score : 749359 msgs/S, 1498718 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 617068 msgs/S, 1234136 ctxswc/S
+--- Score : 617119 msgs/S, 1234238 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 617068 msgs/S, 1234136 ctxswc/S
+--- Score : 617119 msgs/S, 1234238 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 2491208 ctxswc/S
+--- Score : 2491424 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 451196 threads/S
+--- Score : 451234 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 635777 threads/S
+--- Score : 635830 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 193099 reschedules/S, 1158594 ctxswc/S
+--- Score : 193114 reschedules/S, 1158684 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 1367356 ctxswc/S
+--- Score : 1367460 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 1804812 bytes/S
+--- Score : 1804932 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 2124666 timers/S
+--- Score : 2124810 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 2685552 wait+signal/S
+--- Score : 2685732 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 1885928 lock+unlock/S
+--- Score : 1886044 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

os/ports/GCC/ARMCMx/chcore_v6m.h

@@ -349,6 +349,23 @@ struct context {
 }
 #endif
 
+/**
+ * @brief   Excludes the default @p chSchIsPreemptionRequired()implementation.
+ */
+#define PORT_OPTIMIZED_ISPREEMPTIONREQUIRED
+
+#if (CH_TIME_QUANTUM > 0) || defined(__DOXYGEN__)
+/**
+ * @brief   Inlineable version of this kernel function.
+ */
+#define chSchIsPreemptionRequired()                                         \
+  (rlist.r_preempt ? firstprio(&rlist.r_queue) > currp->p_prio :            \
+                     firstprio(&rlist.r_queue) >= currp->p_prio)
+#else /* CH_TIME_QUANTUM == 0 */
+#define chSchIsPreemptionRequired()                                         \
+  (firstprio(&rlist.r_queue) > currp->p_prio)
+#endif /* CH_TIME_QUANTUM == 0 */
+
 #ifdef __cplusplus
 extern "C" {
 #endif

os/ports/GCC/ARMCMx/chcore_v7m.c

@@ -163,7 +163,7 @@ void _port_unlock(void) {
 void _port_irq_epilogue(void) {
 
   port_lock_from_isr();
-  if ((SCB_ICSR & ICSR_RETTOBASE)) {
+  if ((SCB_ICSR & ICSR_RETTOBASE) != 0) {
     struct extctx *ctxp;
 
     /* Current PSP value.*/

os/ports/GCC/ARMCMx/chcore_v7m.h

@@ -486,6 +486,23 @@ struct context {
 }
 #endif
 
+/**
+ * @brief   Excludes the default @p chSchIsPreemptionRequired()implementation.
+ */
+#define PORT_OPTIMIZED_ISPREEMPTIONREQUIRED
+
+#if (CH_TIME_QUANTUM > 0) || defined(__DOXYGEN__)
+/**
+ * @brief   Inlineable version of this kernel function.
+ */
+#define chSchIsPreemptionRequired()                                         \
+  (rlist.r_preempt ? firstprio(&rlist.r_queue) > currp->p_prio :            \
+                     firstprio(&rlist.r_queue) >= currp->p_prio)
+#else /* CH_TIME_QUANTUM == 0 */
+#define chSchIsPreemptionRequired()                                         \
+  (firstprio(&rlist.r_queue) > currp->p_prio)
+#endif /* CH_TIME_QUANTUM == 0 */
+
 #ifdef __cplusplus
 extern "C" {
 #endif

readme.txt

@@ -77,6 +77,7 @@
 - FIX: Fixed PWM with TIM1 and TIM8 broken in STM32 HAL (bug 3458947).
 - FIX: Fixed SYSCFG clock not started in STM32L1/F4 HALs (bug 3449139).
 - FIX: Fixed wrong definitions in STM32L-Discovery board file (bug 3449076).
+- OPT: Improved the exception exit code in the GCC Cortex-Mx ports.
 - NEW: Updated STM32F2xx support by inheriting the work done on the STM32F4xx,
   the whole thing is untested because lack of hardware.
 - NEW: Files nvic.c and nvic.h moved under ./os/ports/common/ARMCMx, removed