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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7817 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
Giovanni Di Sirio 2015-03-27 10:27:41 +00:00
parent 25c944f87f
commit 3eb264f5b9
9 changed files with 148 additions and 34 deletions
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24
demos/various/RT-ARM7-GENERIC/ch.ld
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@ -15,15 +15,29 @@
*/
/*
* Generic device memory setup, customize it for your device.
* LPC2148 memory setup.
*/
MEMORY
{
flash : org = 0x00000000, len = 512k - 12k
ram : org = 0x40000200, len = 32k - 0x200 - 288
ram1 : org = 0, len = 0
ram2 : org = 0, len = 0
ram3 : org = 0, len = 0
ram0 : org = 0x40000200, len = 32k - 0x200 - 288
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
ram3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0
}
/* RAM region to be used for stacks. This stack accommodates the processing
of all exceptions and interrupts*/
REGION_ALIAS("STACKS_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
INCLUDE rules.ld

4
os/common/ports/ARM/compilers/GCC/crt0.s
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@ -38,7 +38,7 @@
.set I_BIT, 0x80
.set F_BIT, 0x40
.text
.section .startup
.code 32
.balign 4
@ -50,7 +50,7 @@ Reset_Handler:
/*
* Stack pointers initialization.
*/
ldr r0, =___stacks_end__
ldr r0, =__stacks_end__
/* Undefined */
msr CPSR_c, #MODE_UND | I_BIT | F_BIT
mov sp, r0

22
os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld
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@ -20,10 +20,24 @@
MEMORY
{
flash : org = 0x00000000, len = 512k - 12k
ram : org = 0x40000200, len = 32k - 0x200 - 288
ram1 : org = 0, len = 0
ram2 : org = 0, len = 0
ram3 : org = 0, len = 0
ram0 : org = 0x40000200, len = 32k - 0x200 - 288
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
ram3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0
}
/* RAM region to be used for stacks. This stack accommodates the processing
of all exceptions and interrupts*/
REGION_ALIAS("STACKS_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
INCLUDE rules.ld

119
os/common/ports/ARM/compilers/GCC/rules.ld
View File

@ -18,11 +18,10 @@
*/
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
__main_thread_stack_base__ = __ram_start__;
__ram_start__ = ORIGIN(ram);
__ram_size__ = LENGTH(ram);
__ram_end__ = __ram_start__ + __ram_size__;
__ram0_start__ = ORIGIN(ram0);
__ram0_size__ = LENGTH(ram0);
__ram0_end__ = __ram0_start__ + __ram0_size__;
__ram1_start__ = ORIGIN(ram1);
__ram1_size__ = LENGTH(ram1);
__ram1_end__ = __ram1_start__ + __ram1_size__;
@ -32,6 +31,18 @@ __ram2_end__ = __ram2_start__ + __ram2_size__;
__ram3_start__ = ORIGIN(ram3);
__ram3_size__ = LENGTH(ram3);
__ram3_end__ = __ram3_start__ + __ram3_size__;
__ram4_start__ = ORIGIN(ram4);
__ram4_size__ = LENGTH(ram4);
__ram4_end__ = __ram4_start__ + __ram4_size__;
__ram5_start__ = ORIGIN(ram5);
__ram5_size__ = LENGTH(ram5);
__ram5_end__ = __ram5_start__ + __ram5_size__;
__ram6_start__ = ORIGIN(ram6);
__ram6_size__ = LENGTH(ram6);
__ram6_end__ = __ram6_start__ + __ram6_size__;
__ram7_start__ = ORIGIN(ram7);
__ram7_size__ = LENGTH(ram7);
__ram7_end__ = __ram7_start__ + __ram7_size__;
ENTRY(Reset_Handler)
@ -42,7 +53,7 @@ SECTIONS
startup : ALIGN(16) SUBALIGN(16)
{
KEEP(*(vectors))
KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
@ -63,6 +74,8 @@ SECTIONS
.text : ALIGN(16) SUBALIGN(16)
{
*(.startup)
*(.startup.*)
*(.text)
*(.text.*)
*(.rodata)
@ -105,13 +118,13 @@ SECTIONS
.stacks :
{
. = ALIGN(8);
___stacks_base__ = .;
__stacks_base__ = .;
. += __stacks_total_size__;
. = ALIGN(8);
___stacks_end__ = .;
} > ram
__stacks_end__ = .;
} > STACKS_RAM
.data ALIGN(4) : ALIGN(4)
.data : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_data = .);
@ -120,9 +133,9 @@ SECTIONS
*(.ramtext)
. = ALIGN(4);
PROVIDE(_edata = .);
} > ram AT > flash
} > DATA_RAM AT > flash
.bss ALIGN(4) : ALIGN(4)
.bss : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
@ -131,11 +144,83 @@ SECTIONS
*(COMMON)
. = ALIGN(4);
PROVIDE(_bss_end = .);
} > ram
PROVIDE(end = .);
} > BSS_RAM
.ram0 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram0)
*(.ram0.*)
. = ALIGN(4);
__ram0_free__ = .;
} > ram0
.ram1 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram1)
*(.ram1.*)
. = ALIGN(4);
__ram1_free__ = .;
} > ram1
.ram2 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram2)
*(.ram2.*)
. = ALIGN(4);
__ram2_free__ = .;
} > ram2
.ram3 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram3)
*(.ram3.*)
. = ALIGN(4);
__ram3_free__ = .;
} > ram3
.ram4 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram4)
*(.ram4.*)
. = ALIGN(4);
__ram4_free__ = .;
} > ram4
.ram5 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram5)
*(.ram5.*)
. = ALIGN(4);
__ram5_free__ = .;
} > ram5
.ram6 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram6)
*(.ram6.*)
. = ALIGN(4);
__ram6_free__ = .;
} > ram6
.ram7 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
*(.ram7)
*(.ram7.*)
. = ALIGN(4);
__ram7_free__ = .;
} > ram7
}
PROVIDE(end = .);
_end = .;
__heap_base__ = _end;
__heap_end__ = __ram_end__;
/* Heap default boundaries, it is defaulted to be the non-used part
of ram0 region.*/
__heap_base__ = __ram0_free__;
__heap_end__ = __ram0_end__;

2
os/common/ports/ARM/compilers/GCC/vectors.s
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@ -40,7 +40,7 @@ void _unhandled_exception(void) {}
#if !defined(__DOXYGEN__)
.section vectors, "ax"
.section .vectors, "ax"
.code 32
.balign 4

2
os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s
View File

@ -108,7 +108,7 @@
.fpu softvfp
.thumb
.text
.section .startup
/*
* Reset handler.

2
os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s
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@ -148,7 +148,7 @@
#endif
.thumb
.text
.section .startup
/*
* Reset handler.

5
os/common/ports/ARMCMx/compilers/GCC/rules.ld
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@ -51,7 +51,7 @@ SECTIONS
startup : ALIGN(16) SUBALIGN(16)
{
KEEP(*(vectors))
KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
@ -72,7 +72,8 @@ SECTIONS
.text : ALIGN(16) SUBALIGN(16)
{
*(.text.startup.*)
*(.startup)
*(.startup.*)
*(.text)
*(.text.*)
*(.rodata)

2
os/common/ports/ARMCMx/compilers/GCC/vectors.c
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@ -462,7 +462,7 @@ void Vector3FC(void) __attribute__((weak, alias("_unhandled_exception")));
* @brief STM32 vectors table.
*/
#if !defined(__DOXYGEN__)
__attribute__ ((used, section("vectors")))
__attribute__ ((used, section(".vectors")))
#endif
/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
vectors_t _vectors = {