SPI for STM32F3xx, not working yet.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4875 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
d501fe85d1
commit
3e27095da1
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@ -23,8 +23,7 @@
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#include "test.h"
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/*
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* This is a periodic thread that does absolutely nothing except flashing
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* a LED.
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* This is a periodic thread that does absolutely nothing except flashing LEDs.
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*/
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static WORKING_AREA(waThread1, 128);
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static msg_t Thread1(void *arg) {
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@ -50,7 +50,7 @@
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE1 STM32_PPRE1_DIV2
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#define STM32_PPRE2 STM32_PPRE2_DIV1
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
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#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
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@ -84,7 +84,7 @@
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_USE_SPI1 TRUE
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#define STM32_SPI_USE_SPI1 FALSE
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#define STM32_SPI_USE_SPI2 FALSE
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#define STM32_SPI_USE_SPI3 FALSE
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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@ -189,7 +189,7 @@
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#else /* !defined(STM32F0XX) */
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/* Fixed streams for platforms using the old DMA peripheral, the values are
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valid for both STM32F1xx and STM32L1xx.*/
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valid for both STM32F1xx, STM32L1xx and STM32F3xx.*/
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#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
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#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
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#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
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@ -567,7 +567,7 @@
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* @brief APB2 prescaler value.
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*/
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#if !defined(STM32_PPRE2) || defined(__DOXYGEN__)
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#define STM32_PPRE2 STM32_PPRE2_DIV1
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#endif
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/**
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@ -389,6 +389,33 @@
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* @api
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*/
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#define rccResetSPI2() rccResetAPB1(RCC_APB1RSTR_SPI2RST)
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/**
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* @brief Enables the SPI3 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableSPI3(lp) rccEnableAPB1(RCC_APB1ENR_SPI3EN, lp)
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/**
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* @brief Disables the SPI3 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp)
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/**
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* @brief Resets the SPI3 peripheral.
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*
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* @api
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*/
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#define rccResetSPI3() rccResetAPB1(RCC_APB1RSTR_SPI3RST)
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/** @} */
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/**
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