git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8610 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
d2e8ef6bfe
commit
3e15ae6226
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@ -39,6 +39,15 @@
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* @name Configuration options
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* @{
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*/
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/**
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* @brief SDMMC driver enable switch.
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* @details If set to @p TRUE the support for SDMMC1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SDC_USE_SDMMC1) || defined(__DOXYGEN__)
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#define STM32_SDC_USE_SDMMC1 FALSE
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#endif
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/**
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* @brief Support for unaligned transfers.
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* @note Unaligned transfers are much slower.
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@ -1935,7 +1935,7 @@
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#if (STM32_CLK48SEL == STM32_CLK48SEL_NOCLK) || defined(__DOXYGEN__)
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#define STM32_48CLK 0
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#elif STM32_CLK48SEL == STM32_CLK48SEL_PLLSAI1
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#define STM32_48CLK (STM32_PLLVCO / STM32_PLLSAI1Q_VALUE)
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#define STM32_48CLK (STM32_PLLSAI1VCO / STM32_PLLSAI1Q_VALUE)
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#elif STM32_CLK48SEL == STM32_CLK48SEL_PLL
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#define STM32_48CLK (STM32_PLLVCO / STM32_PLLQ_VALUE)
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#elif STM32_CLK48SEL == STM32_CLK48SEL_MSI
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@ -1984,7 +1984,7 @@
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/**
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* @brief SDMMC frequency.
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*/
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#define STM32_SDMMCCLK STM32_48CLK
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#define STM32_SDMMCCLK STM32_48CLK
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/**
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* @brief Clock of timers connected to APB1
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@ -31,6 +31,9 @@ endif
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ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
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endif
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ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c
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endif
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ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c
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endif
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@ -66,6 +69,7 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c \
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@ -87,6 +91,7 @@ PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2 \
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