diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 10a6ed0e8..9209b441d 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..f5e7cc1ed --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c new file mode 100644 index 000000000..d3c7a6521 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -0,0 +1,326 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOB, GPIOB_LED4); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } + chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 1 and GPT drivers 2 and 3. + */ + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32L1xx/IRQ_STORM/main.lst b/testhal/STM32L1xx/IRQ_STORM/main.lst new file mode 100644 index 000000000..7b4c43cc3 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/main.lst @@ -0,0 +1,6048 @@ +ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 1 + + + 1 .syntax unified + 2 .cpu cortex-m3 + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 18, 4 + 12 .thumb + 13 .file "main.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .section .text.println,"ax",%progbits + 18 .align 2 + 19 .p2align 4,,15 + 20 .thumb + 21 .thumb_func + 22 .type println, %function + 23 println: + 24 .LFB66: + 25 .file 1 "main.c" + 26 .loc 1 177 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 38B5 push {r3, r4, r5, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 14, -4 + 35 .cfi_offset 5, -8 + 36 .cfi_offset 4, -12 + 37 .cfi_offset 3, -16 + 38 .loc 1 179 0 + 39 0002 0178 ldrb r1, [r0, #0] @ zero_extendqisi2 + 40 0004 0A4D ldr r5, .L8 + 41 0006 0446 mov r4, r0 + 42 0008 49B1 cbz r1, .L2 + 43 .LVL1: + 44 .L3: + 45 .loc 1 180 0 + 46 000a 2B68 ldr r3, [r5, #0] + 47 000c 0848 ldr r0, .L8 + 48 000e 1B69 ldr r3, [r3, #16] + 49 0010 4FF0FF32 mov r2, #-1 + 50 0014 9847 blx r3 + 51 .loc 1 179 0 + 52 0016 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 53 001a 0029 cmp r1, #0 + 54 001c F5D1 bne .L3 + 55 .L2: + 56 .loc 1 182 0 + 57 001e 2B68 ldr r3, [r5, #0] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 2 + + + 58 0020 0449 ldr r1, .L8+4 + 59 0022 9C69 ldr r4, [r3, #24] + 60 0024 0222 movs r2, #2 + 61 0026 4FF0FF33 mov r3, #-1 + 62 002a 0148 ldr r0, .L8 + 63 002c A047 blx r4 + 64 .loc 1 183 0 + 65 002e 38BD pop {r3, r4, r5, pc} + 66 .L9: + 67 .align 2 + 68 .L8: + 69 0030 00000000 .word SD1 + 70 0034 00000000 .word .LC0 + 71 .cfi_endproc + 72 .LFE66: + 73 .size println, .-println + 74 0038 AFF30080 .section .text.gpt3cb,"ax",%progbits + 74 AFF30080 + 75 .align 2 + 76 .p2align 4,,15 + 77 .thumb + 78 .thumb_func + 79 .type gpt3cb, %function + 80 gpt3cb: + 81 .LFB64: + 82 .loc 1 138 0 + 83 .cfi_startproc + 84 @ args = 0, pretend = 0, frame = 0 + 85 @ frame_needed = 0, uses_anonymous_args = 0 + 86 .LVL2: + 87 0000 08B5 push {r3, lr} + 88 .LCFI1: + 89 .cfi_def_cfa_offset 8 + 90 .cfi_offset 14, -4 + 91 .cfi_offset 3, -8 + 92 .LBB34: + 93 .loc 1 142 0 + 94 0002 2023 movs r3, #32 + 95 .LVL3: + 96 @ 142 "main.c" 1 + 97 0004 83F31188 msr BASEPRI, r3 + 98 @ 0 "" 2 + 99 .LVL4: + 100 .thumb + 101 .LBE34: + 102 .loc 1 143 0 + 103 0008 0548 ldr r0, .L12 + 104 .LVL5: + 105 000a 0021 movs r1, #0 + 106 000c FFF7FEFF bl chMBPostI + 107 .LVL6: + 108 .loc 1 144 0 + 109 0010 10B1 cbz r0, .L11 + 110 .loc 1 145 0 + 111 0012 044B ldr r3, .L12+4 + 112 0014 0122 movs r2, #1 + 113 0016 1A60 str r2, [r3, #0] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 3 + + + 114 .L11: + 115 .LBB35: + 116 .loc 1 146 0 + 117 0018 0023 movs r3, #0 + 118 .LVL7: + 119 @ 146 "main.c" 1 + 120 001a 83F31188 msr BASEPRI, r3 + 121 @ 0 "" 2 + 122 .LVL8: + 123 .thumb + 124 .LBE35: + 125 .loc 1 147 0 + 126 001e 08BD pop {r3, pc} + 127 .L13: + 128 .align 2 + 129 .L12: + 130 0020 78000000 .word .LANCHOR0+120 + 131 0024 00000000 .word .LANCHOR1 + 132 .cfi_endproc + 133 .LFE64: + 134 .size gpt3cb, .-gpt3cb + 135 0028 AFF30080 .section .text.gpt2cb,"ax",%progbits + 135 AFF30080 + 136 .align 2 + 137 .p2align 4,,15 + 138 .thumb + 139 .thumb_func + 140 .type gpt2cb, %function + 141 gpt2cb: + 142 .LFB63: + 143 .loc 1 124 0 + 144 .cfi_startproc + 145 @ args = 0, pretend = 0, frame = 0 + 146 @ frame_needed = 0, uses_anonymous_args = 0 + 147 .LVL9: + 148 0000 08B5 push {r3, lr} + 149 .LCFI2: + 150 .cfi_def_cfa_offset 8 + 151 .cfi_offset 14, -4 + 152 .cfi_offset 3, -8 + 153 .LBB36: + 154 .loc 1 128 0 + 155 0002 2023 movs r3, #32 + 156 .LVL10: + 157 @ 128 "main.c" 1 + 158 0004 83F31188 msr BASEPRI, r3 + 159 @ 0 "" 2 + 160 .LVL11: + 161 .thumb + 162 .LBE36: + 163 .loc 1 129 0 + 164 0008 0548 ldr r0, .L16 + 165 .LVL12: + 166 000a 0121 movs r1, #1 + 167 000c FFF7FEFF bl chMBPostI + 168 .LVL13: + 169 .loc 1 130 0 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 4 + + + 170 0010 10B1 cbz r0, .L15 + 171 .loc 1 131 0 + 172 0012 044B ldr r3, .L16+4 + 173 0014 0122 movs r2, #1 + 174 0016 1A60 str r2, [r3, #0] + 175 .L15: + 176 .LBB37: + 177 .loc 1 132 0 + 178 0018 0023 movs r3, #0 + 179 .LVL14: + 180 @ 132 "main.c" 1 + 181 001a 83F31188 msr BASEPRI, r3 + 182 @ 0 "" 2 + 183 .LVL15: + 184 .thumb + 185 .LBE37: + 186 .loc 1 133 0 + 187 001e 08BD pop {r3, pc} + 188 .L17: + 189 .align 2 + 190 .L16: + 191 0020 00000000 .word .LANCHOR0 + 192 0024 00000000 .word .LANCHOR1 + 193 .cfi_endproc + 194 .LFE63: + 195 .size gpt2cb, .-gpt2cb + 196 0028 AFF30080 .section .text.WorkerThread,"ax",%progbits + 196 AFF30080 + 197 .align 2 + 198 .p2align 4,,15 + 199 .thumb + 200 .thumb_func + 201 .type WorkerThread, %function + 202 WorkerThread: + 203 .LFB62: + 204 .loc 1 65 0 + 205 .cfi_startproc + 206 @ args = 0, pretend = 0, frame = 8 + 207 @ frame_needed = 0, uses_anonymous_args = 0 + 208 .LVL16: + 209 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 210 .LCFI3: + 211 .cfi_def_cfa_offset 36 + 212 .cfi_offset 14, -4 + 213 .cfi_offset 11, -8 + 214 .cfi_offset 10, -12 + 215 .cfi_offset 9, -16 + 216 .cfi_offset 8, -20 + 217 .cfi_offset 7, -24 + 218 .cfi_offset 6, -28 + 219 .cfi_offset 5, -32 + 220 .cfi_offset 4, -36 + 221 .loc 1 73 0 + 222 0004 244B ldr r3, .L31 + 223 0006 DFF8A0B0 ldr fp, .L31+16 + 224 000a DB69 ldr r3, [r3, #28] + 225 000c 234E ldr r6, .L31+4 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 5 + + + 226 000e 244A ldr r2, .L31+8 + 227 .loc 1 78 0 + 228 0010 00EB8007 add r7, r0, r0, lsl #2 + 229 0014 234C ldr r4, .L31+12 + 230 .loc 1 65 0 + 231 0016 83B0 sub sp, sp, #12 + 232 .LCFI4: + 233 .cfi_def_cfa_offset 48 + 234 .loc 1 73 0 + 235 0018 9A61 str r2, [r3, #24] + 236 001a 0509 lsrs r5, r0, #4 + 237 001c 00F1FF39 add r9, r0, #-1 + 238 0020 00F10108 add r8, r0, #1 + 239 .loc 1 78 0 + 240 0024 0BEBC707 add r7, fp, r7, lsl #3 + 241 .loc 1 113 0 + 242 0028 B246 mov sl, r6 + 243 .LVL17: + 244 .L29: + 245 .loc 1 78 0 + 246 002a 3846 mov r0, r7 + 247 .LVL18: + 248 002c 01A9 add r1, sp, #4 + 249 002e 4FF0FF32 mov r2, #-1 + 250 0032 FFF7FEFF bl chMBFetch + 251 .LVL19: + 252 .loc 1 93 0 + 253 0036 2DB1 cbz r5, .L20 + 254 0038 2B46 mov r3, r5 + 255 .LVL20: + 256 .L21: + 257 .loc 1 94 0 + 258 003a 2268 ldr r2, [r4, #0] + 259 003c 0132 adds r2, r2, #1 + 260 .loc 1 93 0 + 261 003e 013B subs r3, r3, #1 + 262 .loc 1 94 0 + 263 0040 2260 str r2, [r4, #0] + 264 .loc 1 93 0 + 265 0042 FAD1 bne .L21 + 266 .L20: + 267 .loc 1 99 0 + 268 0044 0199 ldr r1, [sp, #4] + 269 .loc 1 100 0 + 270 0046 0029 cmp r1, #0 + 271 0048 14BF ite ne + 272 004a 4346 movne r3, r8 + 273 004c 4B46 moveq r3, r9 + 274 .LVL21: + 275 .loc 1 104 0 + 276 004e 032B cmp r3, #3 + 277 0050 11D9 bls .L30 + 278 .loc 1 113 0 + 279 0052 3368 ldr r3, [r6, #0] + 280 .LVL22: + 281 0054 0133 adds r3, r3, #1 + 282 0056 B3F5FA7F cmp r3, #500 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 6 + + + 283 005a 3360 str r3, [r6, #0] + 284 005c E5D3 bcc .L29 + 285 .loc 1 114 0 + 286 005e 0022 movs r2, #0 + 287 .loc 1 115 0 + 288 0060 4FF48063 mov r3, #1024 + 289 .loc 1 114 0 + 290 0064 CAF80020 str r2, [sl, #0] + 291 .loc 1 115 0 + 292 0068 C4F20203 movt r3, 16386 + 293 006c 5A69 ldr r2, [r3, #20] + 294 006e 82F04002 eor r2, r2, #64 + 295 0072 5A61 str r2, [r3, #20] + 296 0074 D9E7 b .L29 + 297 .LVL23: + 298 .L30: + 299 .loc 1 107 0 + 300 0076 03EB8303 add r3, r3, r3, lsl #2 + 301 .LVL24: + 302 007a 0BEBC300 add r0, fp, r3, lsl #3 + 303 007e 0022 movs r2, #0 + 304 0080 FFF7FEFF bl chMBPost + 305 0084 0190 str r0, [sp, #4] + 306 .loc 1 108 0 + 307 0086 0028 cmp r0, #0 + 308 0088 CFD0 beq .L29 + 309 .loc 1 109 0 + 310 008a 40F20002 movw r2, #:lower16:.LANCHOR1 + 311 008e 0123 movs r3, #1 + 312 0090 C0F20002 movt r2, #:upper16:.LANCHOR1 + 313 0094 1360 str r3, [r2, #0] + 314 0096 C8E7 b .L29 + 315 .L32: + 316 .align 2 + 317 .L31: + 318 0098 00000000 .word rlist + 319 009c 00000000 .word .LANCHOR3 + 320 00a0 04000000 .word .LC1 + 321 00a4 00000000 .word .LANCHOR2 + 322 00a8 00000000 .word .LANCHOR0 + 323 .cfi_endproc + 324 .LFE62: + 325 .size WorkerThread, .-WorkerThread + 326 00ac AFF30080 .section .text.printn,"ax",%progbits + 327 .align 2 + 328 .p2align 4,,15 + 329 .thumb + 330 .thumb_func + 331 .type printn, %function + 332 printn: + 333 .LFB67: + 334 .loc 1 185 0 + 335 .cfi_startproc + 336 @ args = 0, pretend = 0, frame = 16 + 337 @ frame_needed = 0, uses_anonymous_args = 0 + 338 .LVL25: + 339 0000 70B5 push {r4, r5, r6, lr} + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 7 + + + 340 .LCFI5: + 341 .cfi_def_cfa_offset 16 + 342 .cfi_offset 14, -4 + 343 .cfi_offset 6, -8 + 344 .cfi_offset 5, -12 + 345 .cfi_offset 4, -16 + 346 0002 84B0 sub sp, sp, #16 + 347 .LCFI6: + 348 .cfi_def_cfa_offset 32 + 349 .loc 1 188 0 + 350 0004 0028 cmp r0, #0 + 351 0006 24D0 beq .L39 + 352 .loc 1 193 0 + 353 0008 4CF6CD42 movw r2, #52429 + 354 .LBB40: + 355 .LBB41: + 356 .loc 1 191 0 + 357 000c 6D46 mov r5, sp + 358 .LBE41: + 359 .LBE40: + 360 .loc 1 188 0 + 361 000e 6C46 mov r4, sp + 362 .loc 1 193 0 + 363 0010 CCF6CC42 movt r2, 52428 + 364 .LVL26: + 365 .L36: + 366 0014 A2FB0013 umull r1, r3, r2, r0 + 367 0018 DB08 lsrs r3, r3, #3 + 368 001a 03EB8301 add r1, r3, r3, lsl #2 + 369 001e A0EB4101 sub r1, r0, r1, lsl #1 + 370 0022 3031 adds r1, r1, #48 + 371 0024 C9B2 uxtb r1, r1 + 372 .loc 1 192 0 + 373 0026 1846 mov r0, r3 + 374 .loc 1 193 0 + 375 0028 04F8011B strb r1, [r4], #1 + 376 .LVL27: + 377 .loc 1 192 0 + 378 002c 002B cmp r3, #0 + 379 002e F1D1 bne .L36 + 380 .loc 1 194 0 + 381 0030 AC42 cmp r4, r5 + 382 0032 0CD9 bls .L33 + 383 0034 0B4E ldr r6, .L41 + 384 .loc 1 185 0 + 385 0036 013C subs r4, r4, #1 + 386 .LVL28: + 387 0038 01E0 b .L37 + 388 .LVL29: + 389 .L40: + 390 .loc 1 194 0 + 391 003a 14F8011D ldrb r1, [r4, #-1]! @ zero_extendqisi2 + 392 .L37: + 393 .loc 1 195 0 + 394 003e 3368 ldr r3, [r6, #0] + 395 0040 0848 ldr r0, .L41 + 396 0042 1B69 ldr r3, [r3, #16] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 8 + + + 397 0044 4FF0FF32 mov r2, #-1 + 398 0048 9847 blx r3 + 399 .loc 1 194 0 + 400 004a AC42 cmp r4, r5 + 401 004c F5D1 bne .L40 + 402 .L33: + 403 .loc 1 197 0 + 404 004e 04B0 add sp, sp, #16 + 405 0050 70BD pop {r4, r5, r6, pc} + 406 .LVL30: + 407 .L39: + 408 .LBB43: + 409 .LBB42: + 410 .loc 1 189 0 + 411 0052 0448 ldr r0, .L41 + 412 .LVL31: + 413 0054 3021 movs r1, #48 + 414 0056 0368 ldr r3, [r0, #0] + 415 0058 4FF0FF32 mov r2, #-1 + 416 005c 1B69 ldr r3, [r3, #16] + 417 005e 9847 blx r3 + 418 0060 F5E7 b .L33 + 419 .L42: + 420 0062 00BF .align 2 + 421 .L41: + 422 0064 00000000 .word SD1 + 423 .LBE42: + 424 .LBE43: + 425 .cfi_endproc + 426 .LFE67: + 427 .size printn, .-printn + 428 0068 AFF30080 .section .text.startup.main,"ax",%progbits + 428 AFF30080 + 429 .align 2 + 430 .p2align 4,,15 + 431 .global main + 432 .thumb + 433 .thumb_func + 434 .type main, %function + 435 main: + 436 .LFB68: + 437 .loc 1 202 0 + 438 .cfi_startproc + 439 @ args = 0, pretend = 0, frame = 8 + 440 @ frame_needed = 0, uses_anonymous_args = 0 + 441 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, sl, lr} + 442 .LCFI7: + 443 .cfi_def_cfa_offset 32 + 444 .cfi_offset 14, -4 + 445 .cfi_offset 10, -8 + 446 .cfi_offset 9, -12 + 447 .cfi_offset 8, -16 + 448 .cfi_offset 7, -20 + 449 .cfi_offset 6, -24 + 450 .cfi_offset 5, -28 + 451 .cfi_offset 4, -32 + 452 0004 84B0 sub sp, sp, #16 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 9 + + + 453 .LCFI8: + 454 .cfi_def_cfa_offset 48 + 455 .loc 1 213 0 + 456 0006 FFF7FEFF bl halInit + 457 .loc 1 214 0 + 458 000a FFF7FEFF bl chSysInit + 459 .loc 1 219 0 + 460 000e 9048 ldr r0, .L84 + 461 0010 0021 movs r1, #0 + 462 0012 FFF7FEFF bl sdStart + 463 .loc 1 220 0 + 464 0016 0020 movs r0, #0 + 465 0018 C4F20200 movt r0, 16386 + 466 001c 4FF40071 mov r1, #512 + 467 0020 40F28232 movw r2, #898 + 468 0024 FFF7FEFF bl _pal_lld_setgroupmode + 469 .loc 1 221 0 + 470 0028 0020 movs r0, #0 + 471 002a 40F28232 movw r2, #898 + 472 002e C4F20200 movt r0, 16386 + 473 0032 4FF48061 mov r1, #1024 + 474 0036 FFF7FEFF bl _pal_lld_setgroupmode + 475 .loc 1 222 0 + 476 003a 8648 ldr r0, .L84+4 + 477 003c 8649 ldr r1, .L84+8 + 478 003e FFF7FEFF bl gptStart + 479 .loc 1 223 0 + 480 0042 8648 ldr r0, .L84+12 + 481 0044 8649 ldr r1, .L84+16 + 482 0046 FFF7FEFF bl gptStart + 483 .LVL32: + 484 .loc 1 229 0 + 485 004a 864E ldr r6, .L84+20 + 486 .loc 1 230 0 + 487 004c 864D ldr r5, .L84+24 + 488 004e 874F ldr r7, .L84+28 + 489 .loc 1 228 0 + 490 0050 0024 movs r4, #0 + 491 .LVL33: + 492 .L44: + 493 .loc 1 229 0 discriminator 2 + 494 0052 04EB8400 add r0, r4, r4, lsl #2 + 495 0056 3146 mov r1, r6 + 496 0058 0422 movs r2, #4 + 497 005a 07EBC000 add r0, r7, r0, lsl #3 + 498 005e FFF7FEFF bl chMBInit + 499 .loc 1 230 0 discriminator 2 + 500 0062 0094 str r4, [sp, #0] + 501 0064 2846 mov r0, r5 + 502 0066 2C22 movs r2, #44 + 503 0068 4FF49071 mov r1, #288 + 504 006c 804B ldr r3, .L84+32 + 505 .loc 1 228 0 discriminator 2 + 506 006e 0134 adds r4, r4, #1 + 507 .loc 1 230 0 discriminator 2 + 508 0070 FFF7FEFF bl chThdCreateStatic + 509 .LVL34: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 10 + + + 510 .loc 1 228 0 discriminator 2 + 511 0074 1036 adds r6, r6, #16 + 512 0076 042C cmp r4, #4 + 513 0078 05F59075 add r5, r5, #288 + 514 007c E9D1 bne .L44 + 515 .loc 1 237 0 + 516 007e 7D48 ldr r0, .L84+36 + 517 0080 FFF7FEFF bl println + 518 .loc 1 238 0 + 519 0084 7C48 ldr r0, .L84+40 + 520 0086 FFF7FEFF bl println + 521 .loc 1 239 0 + 522 008a 7C4C ldr r4, .L84+44 + 523 .LVL35: + 524 008c 7C48 ldr r0, .L84+48 + 525 008e 704D ldr r5, .L84 + 526 0090 FFF7FEFF bl println + 527 .LVL36: + 528 .loc 1 172 0 + 529 0094 2A21 movs r1, #42 + 530 .LVL37: + 531 .L45: + 532 .LBB44: + 533 .LBB45: + 534 .loc 1 173 0 + 535 0096 2B68 ldr r3, [r5, #0] + 536 0098 6D48 ldr r0, .L84 + 537 009a 1B69 ldr r3, [r3, #16] + 538 009c 4FF0FF32 mov r2, #-1 + 539 00a0 9847 blx r3 + 540 .loc 1 172 0 + 541 00a2 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 542 00a6 0029 cmp r1, #0 + 543 00a8 F5D1 bne .L45 + 544 .LBE45: + 545 .LBE44: + 546 .loc 1 241 0 + 547 00aa 7648 ldr r0, .L84+52 + 548 00ac 764C ldr r4, .L84+56 + 549 00ae FFF7FEFF bl println + 550 .LVL38: + 551 .loc 1 172 0 + 552 00b2 2A21 movs r1, #42 + 553 .LVL39: + 554 .L46: + 555 .LBB46: + 556 .LBB47: + 557 .loc 1 173 0 + 558 00b4 2B68 ldr r3, [r5, #0] + 559 00b6 6648 ldr r0, .L84 + 560 00b8 1B69 ldr r3, [r3, #16] + 561 00ba 4FF0FF32 mov r2, #-1 + 562 00be 9847 blx r3 + 563 .loc 1 172 0 + 564 00c0 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 565 00c4 0029 cmp r1, #0 + 566 00c6 F5D1 bne .L46 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 11 + + + 567 .LBE47: + 568 .LBE46: + 569 .loc 1 244 0 + 570 00c8 7048 ldr r0, .L84+60 + 571 00ca 714C ldr r4, .L84+64 + 572 00cc FFF7FEFF bl println + 573 .LVL40: + 574 .loc 1 172 0 + 575 00d0 2A21 movs r1, #42 + 576 .LVL41: + 577 .L47: + 578 .LBB48: + 579 .LBB49: + 580 .loc 1 173 0 + 581 00d2 2B68 ldr r3, [r5, #0] + 582 00d4 5E48 ldr r0, .L84 + 583 00d6 1B69 ldr r3, [r3, #16] + 584 00d8 4FF0FF32 mov r2, #-1 + 585 00dc 9847 blx r3 + 586 .loc 1 172 0 + 587 00de 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 588 00e2 0029 cmp r1, #0 + 589 00e4 F5D1 bne .L47 + 590 .LBE49: + 591 .LBE48: + 592 .loc 1 247 0 + 593 00e6 6B48 ldr r0, .L84+68 + 594 00e8 6B4C ldr r4, .L84+72 + 595 00ea FFF7FEFF bl println + 596 .LVL42: + 597 .loc 1 172 0 + 598 00ee 2A21 movs r1, #42 + 599 .LVL43: + 600 .L48: + 601 .LBB50: + 602 .LBB51: + 603 .loc 1 173 0 + 604 00f0 2B68 ldr r3, [r5, #0] + 605 00f2 5748 ldr r0, .L84 + 606 00f4 1B69 ldr r3, [r3, #16] + 607 00f6 4FF0FF32 mov r2, #-1 + 608 00fa 9847 blx r3 + 609 .loc 1 172 0 + 610 00fc 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 611 0100 0029 cmp r1, #0 + 612 0102 F5D1 bne .L48 + 613 .LBE51: + 614 .LBE50: + 615 .loc 1 250 0 + 616 0104 6548 ldr r0, .L84+76 + 617 0106 664C ldr r4, .L84+80 + 618 0108 FFF7FEFF bl println + 619 .LVL44: + 620 .loc 1 172 0 + 621 010c 2A21 movs r1, #42 + 622 .LVL45: + 623 .L49: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 12 + + + 624 .LBB52: + 625 .LBB53: + 626 .loc 1 173 0 + 627 010e 2B68 ldr r3, [r5, #0] + 628 0110 4F48 ldr r0, .L84 + 629 0112 1B69 ldr r3, [r3, #16] + 630 0114 4FF0FF32 mov r2, #-1 + 631 0118 9847 blx r3 + 632 .loc 1 172 0 + 633 011a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 634 011e 0029 cmp r1, #0 + 635 0120 F5D1 bne .L49 + 636 .LBE53: + 637 .LBE52: + 638 .loc 1 254 0 + 639 0122 6048 ldr r0, .L84+84 + 640 0124 604C ldr r4, .L84+88 + 641 0126 FFF7FEFF bl println + 642 .LVL46: + 643 .loc 1 172 0 + 644 012a 2A21 movs r1, #42 + 645 .LVL47: + 646 .L50: + 647 .LBB54: + 648 .LBB55: + 649 .loc 1 173 0 + 650 012c 2B68 ldr r3, [r5, #0] + 651 012e 4848 ldr r0, .L84 + 652 0130 1B69 ldr r3, [r3, #16] + 653 0132 4FF0FF32 mov r2, #-1 + 654 0136 9847 blx r3 + 655 .loc 1 172 0 + 656 0138 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 657 013c 0029 cmp r1, #0 + 658 013e F5D1 bne .L50 + 659 .LBE55: + 660 .LBE54: + 661 .loc 1 258 0 + 662 0140 5A48 ldr r0, .L84+92 + 663 0142 FFF7FEFF bl println + 664 .loc 1 260 0 + 665 0146 5A4C ldr r4, .L84+96 + 666 0148 4D48 ldr r0, .L84+48 + 667 014a FFF7FEFF bl println + 668 .LVL48: + 669 .loc 1 172 0 + 670 014e 2A21 movs r1, #42 + 671 .LVL49: + 672 .L51: + 673 .LBB56: + 674 .LBB57: + 675 .loc 1 173 0 + 676 0150 2B68 ldr r3, [r5, #0] + 677 0152 3F48 ldr r0, .L84 + 678 0154 1B69 ldr r3, [r3, #16] + 679 0156 4FF0FF32 mov r2, #-1 + 680 015a 9847 blx r3 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 13 + + + 681 .loc 1 172 0 + 682 015c 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 683 0160 0029 cmp r1, #0 + 684 0162 F5D1 bne .L51 + 685 .LBE57: + 686 .LBE56: + 687 .loc 1 262 0 + 688 0164 4FF49040 mov r0, #18432 + 689 0168 C0F2E810 movt r0, 488 + 690 016c FFF7FEFF bl printn + 691 .loc 1 263 0 + 692 0170 504C ldr r4, .L84+100 + 693 0172 4048 ldr r0, .L84+36 + 694 0174 FFF7FEFF bl println + 695 .LVL50: + 696 .loc 1 172 0 + 697 0178 2A21 movs r1, #42 + 698 .LVL51: + 699 .L52: + 700 .LBB58: + 701 .LBB59: + 702 .loc 1 173 0 + 703 017a 2B68 ldr r3, [r5, #0] + 704 017c 3448 ldr r0, .L84 + 705 017e 1B69 ldr r3, [r3, #16] + 706 0180 4FF0FF32 mov r2, #-1 + 707 0184 9847 blx r3 + 708 .loc 1 172 0 + 709 0186 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 710 018a 0029 cmp r1, #0 + 711 018c F5D1 bne .L52 + 712 .LBE59: + 713 .LBE58: + 714 .loc 1 265 0 + 715 018e 6420 movs r0, #100 + 716 0190 FFF7FEFF bl printn + 717 .loc 1 266 0 + 718 0194 484C ldr r4, .L84+104 + 719 0196 3748 ldr r0, .L84+36 + 720 0198 FFF7FEFF bl println + 721 .LVL52: + 722 .loc 1 172 0 + 723 019c 2A21 movs r1, #42 + 724 .LVL53: + 725 .L53: + 726 .LBB60: + 727 .LBB61: + 728 .loc 1 173 0 + 729 019e 2B68 ldr r3, [r5, #0] + 730 01a0 2B48 ldr r0, .L84 + 731 01a2 1B69 ldr r3, [r3, #16] + 732 01a4 4FF0FF32 mov r2, #-1 + 733 01a8 9847 blx r3 + 734 .loc 1 172 0 + 735 01aa 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 736 01ae 0029 cmp r1, #0 + 737 01b0 F5D1 bne .L53 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 14 + + + 738 .LBE61: + 739 .LBE60: + 740 .loc 1 268 0 + 741 01b2 0846 mov r0, r1 + 742 01b4 FFF7FEFF bl printn + 743 .loc 1 269 0 + 744 01b8 404C ldr r4, .L84+108 + 745 01ba 2E48 ldr r0, .L84+36 + 746 01bc FFF7FEFF bl println + 747 .LVL54: + 748 .loc 1 172 0 + 749 01c0 2A21 movs r1, #42 + 750 .LVL55: + 751 .L54: + 752 .LBB62: + 753 .LBB63: + 754 .loc 1 173 0 + 755 01c2 2B68 ldr r3, [r5, #0] + 756 01c4 2248 ldr r0, .L84 + 757 01c6 1B69 ldr r3, [r3, #16] + 758 01c8 4FF0FF32 mov r2, #-1 + 759 01cc 9847 blx r3 + 760 .loc 1 172 0 + 761 01ce 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 762 01d2 0029 cmp r1, #0 + 763 01d4 F5D1 bne .L54 + 764 .LBE63: + 765 .LBE62: + 766 .loc 1 271 0 + 767 01d6 0420 movs r0, #4 + 768 01d8 FFF7FEFF bl printn + 769 .loc 1 272 0 + 770 01dc 2548 ldr r0, .L84+36 + 771 01de FFF7FEFF bl println + 772 .LVL56: + 773 01e2 374C ldr r4, .L84+112 + 774 .loc 1 172 0 + 775 01e4 2A26 movs r6, #42 + 776 .LVL57: + 777 .L55: + 778 .LBB64: + 779 .LBB65: + 780 .loc 1 173 0 + 781 01e6 2B68 ldr r3, [r5, #0] + 782 01e8 3146 mov r1, r6 + 783 01ea 1B69 ldr r3, [r3, #16] + 784 01ec 1848 ldr r0, .L84 + 785 01ee 4FF0FF32 mov r2, #-1 + 786 01f2 9847 blx r3 + 787 .loc 1 172 0 + 788 01f4 14F8016F ldrb r6, [r4, #1]! @ zero_extendqisi2 + 789 01f8 002E cmp r6, #0 + 790 01fa F4D1 bne .L55 + 791 .LBE65: + 792 .LBE64: + 793 .loc 1 274 0 + 794 01fc 0420 movs r0, #4 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 15 + + + 795 01fe FFF7FEFF bl printn + 796 .loc 1 275 0 + 797 0202 1C48 ldr r0, .L84+36 + 798 0204 FFF7FEFF bl println + 799 .loc 1 277 0 + 800 0208 1A48 ldr r0, .L84+36 + 801 020a FFF7FEFF bl println + 802 .LVL58: + 803 .loc 1 285 0 + 804 020e 4CF6CD48 movw r8, #52429 + 805 0212 2C4F ldr r7, .L84+116 + 806 .loc 1 278 0 + 807 0214 B246 mov sl, r6 + 808 .loc 1 279 0 + 809 0216 4FF00109 mov r9, #1 + 810 .loc 1 285 0 + 811 021a CCF6CC48 movt r8, 52428 + 812 .LVL59: + 813 .L56: + 814 .loc 1 279 0 + 815 021e 2A4C ldr r4, .L84+120 + 816 .loc 1 172 0 + 817 0220 4921 movs r1, #73 + 818 .LVL60: + 819 .L57: + 820 .LBB66: + 821 .LBB67: + 822 .loc 1 173 0 + 823 0222 2B68 ldr r3, [r5, #0] + 824 0224 0A48 ldr r0, .L84 + 825 0226 1B69 ldr r3, [r3, #16] + 826 0228 4FF0FF32 mov r2, #-1 + 827 022c 9847 blx r3 + 828 .loc 1 172 0 + 829 022e 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 830 0232 0029 cmp r1, #0 + 831 0234 F5D1 bne .L57 + 832 .LBE67: + 833 .LBE66: + 834 .loc 1 281 0 + 835 0236 4846 mov r0, r9 + 836 0238 0391 str r1, [sp, #12] + 837 023a FFF7FEFF bl printn + 838 .loc 1 282 0 + 839 023e 0D48 ldr r0, .L84+36 + 840 0240 FFF7FEFF bl println + 841 .loc 1 284 0 + 842 0244 0399 ldr r1, [sp, #12] + 843 .loc 1 285 0 + 844 0246 4FF4FA66 mov r6, #2000 + 845 .loc 1 284 0 + 846 024a 0C46 mov r4, r1 + 847 .loc 1 283 0 + 848 024c 3960 str r1, [r7, #0] + 849 .LVL61: + 850 024e 48E0 b .L60 + 851 .L85: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 16 + + + 852 .align 2 + 853 .L84: + 854 0250 00000000 .word SD1 + 855 0254 00000000 .word GPTD2 + 856 0258 00000000 .word .LANCHOR4 + 857 025c 00000000 .word GPTD3 + 858 0260 00000000 .word .LANCHOR5 + 859 0264 00000000 .word .LANCHOR6 + 860 0268 00000000 .word .LANCHOR7 + 861 026c 00000000 .word .LANCHOR0 + 862 0270 00000000 .word WorkerThread + 863 0274 0C000000 .word .LC2 + 864 0278 10000000 .word .LC3 + 865 027c 40000000 .word .LC5 + 866 0280 3C000000 .word .LC4 + 867 0284 54000000 .word .LC6 + 868 0288 64000000 .word .LC7 + 869 028c 78000000 .word .LC8 + 870 0290 80000000 .word .LC9 + 871 0294 94000000 .word .LC10 + 872 0298 9C000000 .word .LC11 + 873 029c B0000000 .word .LC12 + 874 02a0 BC000000 .word .LC13 + 875 02a4 D0000000 .word .LC14 + 876 02a8 F8000000 .word .LC15 + 877 02ac 0C010000 .word .LC16 + 878 02b0 20010000 .word .LC17 + 879 02b4 34010000 .word .LC18 + 880 02b8 48010000 .word .LC19 + 881 02bc 5C010000 .word .LC20 + 882 02c0 70010000 .word .LC21 + 883 02c4 00000000 .word .LANCHOR1 + 884 02c8 98010000 .word .LC24 + 885 .LVL62: + 886 .L83: + 887 .LBB68: + 888 .LBB69: + 889 .loc 1 173 0 + 890 02cc 2B68 ldr r3, [r5, #0] + 891 02ce 2E21 movs r1, #46 + 892 02d0 1B69 ldr r3, [r3, #16] + 893 02d2 9847 blx r3 + 894 .LVL63: + 895 .LBE69: + 896 .LBE68: + 897 .loc 1 285 0 + 898 02d4 A8FB0623 umull r2, r3, r8, r6 + 899 02d8 A6EBD306 sub r6, r6, r3, lsr #3 + 900 02dc B6B2 uxth r6, r6 + 901 .LVL64: + 902 02de 132E cmp r6, #19 + 903 02e0 27D9 bls .L82 + 904 .LVL65: + 905 .L60: + 906 .loc 1 286 0 + 907 02e2 711E subs r1, r6, #1 + 908 02e4 89B2 uxth r1, r1 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 17 + + + 909 02e6 3748 ldr r0, .L86 + 910 02e8 FFF7FEFF bl gptStartContinuous + 911 .loc 1 287 0 + 912 02ec 711C adds r1, r6, #1 + 913 02ee 89B2 uxth r1, r1 + 914 02f0 3548 ldr r0, .L86+4 + 915 02f2 FFF7FEFF bl gptStartContinuous + 916 .loc 1 288 0 + 917 02f6 4FF47A70 mov r0, #1000 + 918 02fa FFF7FEFF bl chThdSleep + 919 .loc 1 289 0 + 920 02fe 3148 ldr r0, .L86 + 921 0300 FFF7FEFF bl gptStopTimer + 922 .loc 1 290 0 + 923 0304 3048 ldr r0, .L86+4 + 924 0306 FFF7FEFF bl gptStopTimer + 925 .loc 1 291 0 + 926 030a 3B68 ldr r3, [r7, #0] + 927 .LBB70: + 928 .LBB71: + 929 .loc 1 173 0 + 930 030c 2F48 ldr r0, .L86+8 + 931 030e 2321 movs r1, #35 + 932 0310 4FF0FF32 mov r2, #-1 + 933 .LBE71: + 934 .LBE70: + 935 .loc 1 291 0 + 936 0314 002B cmp r3, #0 + 937 0316 D9D0 beq .L83 + 938 .LVL66: + 939 .LBB74: + 940 .LBB72: + 941 .loc 1 173 0 + 942 0318 2B68 ldr r3, [r5, #0] + 943 .LBE72: + 944 .LBE74: + 945 .loc 1 295 0 + 946 031a 002C cmp r4, #0 + 947 031c 08BF it eq + 948 031e 3446 moveq r4, r6 + 949 .LBB75: + 950 .LBB73: + 951 .loc 1 173 0 + 952 0320 1B69 ldr r3, [r3, #16] + 953 0322 9847 blx r3 + 954 .LVL67: + 955 .LBE73: + 956 .LBE75: + 957 .loc 1 285 0 + 958 0324 A8FB0623 umull r2, r3, r8, r6 + 959 0328 A6EBD306 sub r6, r6, r3, lsr #3 + 960 032c B6B2 uxth r6, r6 + 961 .LVL68: + 962 032e 132E cmp r6, #19 + 963 0330 D7D8 bhi .L60 + 964 .LVL69: + 965 .L82: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 18 + + + 966 .loc 1 301 0 + 967 0332 1420 movs r0, #20 + 968 0334 FFF7FEFF bl chThdSleep + 969 .loc 1 302 0 + 970 0338 254E ldr r6, .L86+12 + 971 033a 2648 ldr r0, .L86+16 + 972 033c FFF7FEFF bl println + 973 .LVL70: + 974 .loc 1 172 0 + 975 0340 5321 movs r1, #83 + 976 .LVL71: + 977 .L61: + 978 .LBB76: + 979 .LBB77: + 980 .loc 1 173 0 + 981 0342 2B68 ldr r3, [r5, #0] + 982 0344 2148 ldr r0, .L86+8 + 983 0346 1B69 ldr r3, [r3, #16] + 984 0348 4FF0FF32 mov r2, #-1 + 985 034c 9847 blx r3 + 986 .loc 1 172 0 + 987 034e 16F8011F ldrb r1, [r6, #1]! @ zero_extendqisi2 + 988 0352 0029 cmp r1, #0 + 989 0354 F5D1 bne .L61 + 990 .LBE77: + 991 .LBE76: + 992 .loc 1 304 0 + 993 0356 2046 mov r0, r4 + 994 0358 FFF7FEFF bl printn + 995 .loc 1 305 0 + 996 035c 1E48 ldr r0, .L86+20 + 997 035e FFF7FEFF bl println + 998 .loc 1 279 0 + 999 0362 09F10109 add r9, r9, #1 + 1000 .loc 1 306 0 + 1001 0366 1B48 ldr r0, .L86+16 + 1002 0368 5445 cmp r4, sl + 1003 036a 28BF it cs + 1004 036c A246 movcs sl, r4 + 1005 036e FFF7FEFF bl println + 1006 .loc 1 279 0 + 1007 0372 B9F1650F cmp r9, #101 + 1008 .loc 1 306 0 + 1009 0376 1FFA8AFA uxth sl, sl + 1010 .LVL72: + 1011 .loc 1 279 0 + 1012 037a 7FF450AF bne .L56 + 1013 .loc 1 310 0 + 1014 037e 1148 ldr r0, .L86 + 1015 0380 FFF7FEFF bl gptStopTimer + 1016 .loc 1 311 0 + 1017 0384 154C ldr r4, .L86+24 + 1018 0386 1048 ldr r0, .L86+4 + 1019 0388 FFF7FEFF bl gptStopTimer + 1020 .LVL73: + 1021 .loc 1 172 0 + 1022 038c 5721 movs r1, #87 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 19 + + + 1023 .LVL74: + 1024 .L63: + 1025 .LBB78: + 1026 .LBB79: + 1027 .loc 1 173 0 + 1028 038e 2B68 ldr r3, [r5, #0] + 1029 0390 0E48 ldr r0, .L86+8 + 1030 0392 1B69 ldr r3, [r3, #16] + 1031 0394 4FF0FF32 mov r2, #-1 + 1032 0398 9847 blx r3 + 1033 .loc 1 172 0 + 1034 039a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 1035 039e 0029 cmp r1, #0 + 1036 03a0 F5D1 bne .L63 + 1037 .LBE79: + 1038 .LBE78: + 1039 .loc 1 314 0 + 1040 03a2 5046 mov r0, sl + 1041 03a4 FFF7FEFF bl printn + 1042 .loc 1 315 0 + 1043 03a8 0B48 ldr r0, .L86+20 + 1044 03aa FFF7FEFF bl println + 1045 .loc 1 316 0 + 1046 03ae 0948 ldr r0, .L86+16 + 1047 03b0 FFF7FEFF bl println + 1048 .loc 1 317 0 + 1049 03b4 0A48 ldr r0, .L86+28 + 1050 03b6 FFF7FEFF bl println + 1051 .L64: + 1052 .loc 1 323 0 discriminator 1 + 1053 03ba 41F28830 movw r0, #5000 + 1054 03be FFF7FEFF bl chThdSleep + 1055 03c2 FAE7 b .L64 + 1056 .L87: + 1057 .align 2 + 1058 .L86: + 1059 03c4 00000000 .word GPTD2 + 1060 03c8 00000000 .word GPTD3 + 1061 03cc 00000000 .word SD1 + 1062 03d0 84010000 .word .LC22 + 1063 03d4 0C000000 .word .LC2 + 1064 03d8 94010000 .word .LC23 + 1065 03dc A4010000 .word .LC25 + 1066 03e0 B4010000 .word .LC26 + 1067 .cfi_endproc + 1068 .LFE68: + 1069 .size main, .-main + 1070 03e4 AFF30080 .section .rodata.gpt2cfg,"a",%progbits + 1070 AFF30080 + 1070 AFF30080 + 1071 .align 2 + 1072 .set .LANCHOR4,. + 0 + 1073 .type gpt2cfg, %object + 1074 .size gpt2cfg, 8 + 1075 gpt2cfg: + 1076 0000 40420F00 .word 1000000 + 1077 0004 00000000 .word gpt2cb + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 20 + + + 1078 .section .bss.waWorkerThread,"aw",%nobits + 1079 .align 3 + 1080 .set .LANCHOR7,. + 0 + 1081 .type waWorkerThread, %object + 1082 .size waWorkerThread, 1152 + 1083 waWorkerThread: + 1084 0000 00000000 .space 1152 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1085 .section .bss.saturated,"aw",%nobits + 1086 .align 2 + 1087 .set .LANCHOR1,. + 0 + 1088 .type saturated, %object + 1089 .size saturated, 4 + 1090 saturated: + 1091 0000 00000000 .space 4 + 1092 .section .rodata.gpt3cfg,"a",%progbits + 1093 .align 2 + 1094 .set .LANCHOR5,. + 0 + 1095 .type gpt3cfg, %object + 1096 .size gpt3cfg, 8 + 1097 gpt3cfg: + 1098 0000 40420F00 .word 1000000 + 1099 0004 00000000 .word gpt3cb + 1100 .section .rodata.str1.4,"aMS",%progbits,1 + 1101 .align 2 + 1102 .LC0: + 1103 0000 0D0A00 .ascii "\015\012\000" + 1104 0003 00 .space 1 + 1105 .LC1: + 1106 0004 776F726B .ascii "worker\000" + 1106 657200 + 1107 000b 00 .space 1 + 1108 .LC2: + 1109 000c 00 .ascii "\000" + 1110 000d 000000 .space 3 + 1111 .LC3: + 1112 0010 2A2A2A20 .ascii "*** ChibiOS/RT IRQ-STORM long duration test\000" + 1112 43686962 + 1112 694F532F + 1112 52542049 + 1112 52512D53 + 1113 .LC4: + 1114 003c 2A2A2A00 .ascii "***\000" + 1115 .LC5: + 1116 0040 2A2A2A20 .ascii "*** Kernel: \000" + 1116 4B65726E + 1116 656C3A20 + 1116 20202020 + 1116 202000 + 1117 0053 00 .space 1 + 1118 .LC6: + 1119 0054 322E332E .ascii "2.3.3unstable\000" + 1119 33756E73 + 1119 7461626C + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 21 + + + 1119 6500 + 1120 0062 0000 .space 2 + 1121 .LC7: + 1122 0064 2A2A2A20 .ascii "*** GCC Version: \000" + 1122 47434320 + 1122 56657273 + 1122 696F6E3A + 1122 202000 + 1123 0077 00 .space 1 + 1124 .LC8: + 1125 0078 342E362E .ascii "4.6.0\000" + 1125 3000 + 1126 007e 0000 .space 2 + 1127 .LC9: + 1128 0080 2A2A2A20 .ascii "*** Architecture: \000" + 1128 41726368 + 1128 69746563 + 1128 74757265 + 1128 3A2000 + 1129 0093 00 .space 1 + 1130 .LC10: + 1131 0094 41524D76 .ascii "ARMv7-M\000" + 1131 372D4D00 + 1132 .LC11: + 1133 009c 2A2A2A20 .ascii "*** Core Variant: \000" + 1133 436F7265 + 1133 20566172 + 1133 69616E74 + 1133 3A2000 + 1134 00af 00 .space 1 + 1135 .LC12: + 1136 00b0 436F7274 .ascii "Cortex-M3\000" + 1136 65782D4D + 1136 3300 + 1137 00ba 0000 .space 2 + 1138 .LC13: + 1139 00bc 2A2A2A20 .ascii "*** Platform: \000" + 1139 506C6174 + 1139 666F726D + 1139 3A202020 + 1139 202000 + 1140 00cf 00 .space 1 + 1141 .LC14: + 1142 00d0 53544D33 .ascii "STM32L Ultra Low Power Medium Density\000" + 1142 324C2055 + 1142 6C747261 + 1142 204C6F77 + 1142 20506F77 + 1143 00f6 0000 .space 2 + 1144 .LC15: + 1145 00f8 2A2A2A20 .ascii "*** Test Board: \000" + 1145 54657374 + 1145 20426F61 + 1145 72643A20 + 1145 202000 + 1146 010b 00 .space 1 + 1147 .LC16: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 22 + + + 1148 010c 53542053 .ascii "ST STM32L-Discovery\000" + 1148 544D3332 + 1148 4C2D4469 + 1148 73636F76 + 1148 65727900 + 1149 .LC17: + 1150 0120 2A2A2A20 .ascii "*** System Clock: \000" + 1150 53797374 + 1150 656D2043 + 1150 6C6F636B + 1150 3A2000 + 1151 0133 00 .space 1 + 1152 .LC18: + 1153 0134 2A2A2A20 .ascii "*** Iterations: \000" + 1153 49746572 + 1153 6174696F + 1153 6E733A20 + 1153 202000 + 1154 0147 00 .space 1 + 1155 .LC19: + 1156 0148 2A2A2A20 .ascii "*** Randomize: \000" + 1156 52616E64 + 1156 6F6D697A + 1156 653A2020 + 1156 202000 + 1157 015b 00 .space 1 + 1158 .LC20: + 1159 015c 2A2A2A20 .ascii "*** Threads: \000" + 1159 54687265 + 1159 6164733A + 1159 20202020 + 1159 202000 + 1160 016f 00 .space 1 + 1161 .LC21: + 1162 0170 2A2A2A20 .ascii "*** Mailbox size: \000" + 1162 4D61696C + 1162 626F7820 + 1162 73697A65 + 1162 3A2000 + 1163 0183 00 .space 1 + 1164 .LC22: + 1165 0184 53617475 .ascii "Saturated at \000" + 1165 72617465 + 1165 64206174 + 1165 2000 + 1166 0192 0000 .space 2 + 1167 .LC23: + 1168 0194 20755300 .ascii " uS\000" + 1169 .LC24: + 1170 0198 49746572 .ascii "Iteration \000" + 1170 6174696F + 1170 6E2000 + 1171 01a3 00 .space 1 + 1172 .LC25: + 1173 01a4 576F7273 .ascii "Worst case at \000" + 1173 74206361 + 1173 73652061 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 23 + + + 1173 742000 + 1174 01b3 00 .space 1 + 1175 .LC26: + 1176 01b4 54657374 .ascii "Test Complete\000" + 1176 20436F6D + 1176 706C6574 + 1176 6500 + 1177 01c2 0000 .section .bss.mb,"aw",%nobits + 1178 .align 2 + 1179 .set .LANCHOR0,. + 0 + 1180 .type mb, %object + 1181 .size mb, 160 + 1182 mb: + 1183 0000 00000000 .space 160 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1184 .section .bss.b,"aw",%nobits + 1185 .align 2 + 1186 .set .LANCHOR6,. + 0 + 1187 .type b, %object + 1188 .size b, 64 + 1189 b: + 1190 0000 00000000 .space 64 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1191 .section .bss.x.3441,"aw",%nobits + 1192 .align 2 + 1193 .set .LANCHOR2,. + 0 + 1194 .type x.3441, %object + 1195 .size x.3441, 4 + 1196 x.3441: + 1197 0000 00000000 .space 4 + 1198 .section .bss.cnt.3442,"aw",%nobits + 1199 .align 2 + 1200 .set .LANCHOR3,. + 0 + 1201 .type cnt.3442, %object + 1202 .size cnt.3442, 4 + 1203 cnt.3442: + 1204 0000 00000000 .space 4 + 1205 .text + 1206 .Letext0: + 1207 .file 2 "c:\\programmi\\yagarto\\bin\\../lib/gcc/arm-none-eabi/4.6.0/include/stddef.h" + 1208 .file 3 "c:/programmi/yagarto/lib/gcc/../../arm-none-eabi/sys-include/stdint.h" + 1209 .file 4 "../../../os/ports/GCC/ARMCMx/chtypes.h" + 1210 .file 5 "../../../os/kernel/include/chlists.h" + 1211 .file 6 "../../../os/kernel/include/chthreads.h" + 1212 .file 7 "../../../os/ports/GCC/ARMCMx/chcore_v7m.h" + 1213 .file 8 "../../../os/ports/GCC/ARMCMx/chcore.h" + 1214 .file 9 "../../../os/kernel/include/chschd.h" + 1215 .file 10 "../../../os/kernel/include/chsem.h" + 1216 .file 11 "../../../os/kernel/include/chmtx.h" + 1217 .file 12 "../../../os/kernel/include/chevents.h" + 1218 .file 13 "../../../os/kernel/include/chmboxes.h" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 24 + + + 1219 .file 14 "../../../os/kernel/include/chqueues.h" + 1220 .file 15 "../../../os/kernel/include/chioch.h" + 1221 .file 16 "../../../os/hal/platforms/STM32L1xx/stm32l1xx.h" + 1222 .file 17 "../../../os/hal/platforms/STM32/GPIOv2/pal_lld.h" + 1223 .file 18 "../../../os/hal/include/gpt.h" + 1224 .file 19 "../../../os/hal/platforms/STM32/gpt_lld.h" + 1225 .file 20 "../../../os/hal/include/serial.h" + 1226 .file 21 "../../../os/ports/common/ARMCMx/CMSIS/include/core_cm3.h" + 1227 .file 22 "../../../os/hal/platforms/STM32/serial_lld.h" + 1228 .section .debug_info,"",%progbits + 1229 .Ldebug_info0: + 1230 0000 1F130000 .4byte 0x131f + 1231 0004 0200 .2byte 0x2 + 1232 0006 00000000 .4byte .Ldebug_abbrev0 + 1233 000a 04 .byte 0x4 + 1234 000b 01 .uleb128 0x1 + 1235 000c 15000000 .4byte .LASF191 + 1236 0010 01 .byte 0x1 + 1237 0011 ED030000 .4byte .LASF192 + 1238 0015 80040000 .4byte .LASF193 + 1239 0019 00000000 .4byte 0 + 1240 001d 00000000 .4byte 0 + 1241 0021 50000000 .4byte .Ldebug_ranges0+0x50 + 1242 0025 00000000 .4byte .Ldebug_line0 + 1243 0029 02 .uleb128 0x2 + 1244 002a 51020000 .4byte .LASF10 + 1245 002e 02 .byte 0x2 + 1246 002f D4 .byte 0xd4 + 1247 0030 34000000 .4byte 0x34 + 1248 0034 03 .uleb128 0x3 + 1249 0035 04 .byte 0x4 + 1250 0036 07 .byte 0x7 + 1251 0037 88020000 .4byte .LASF0 + 1252 003b 03 .uleb128 0x3 + 1253 003c 01 .byte 0x1 + 1254 003d 06 .byte 0x6 + 1255 003e 07010000 .4byte .LASF1 + 1256 0042 03 .uleb128 0x3 + 1257 0043 01 .byte 0x1 + 1258 0044 08 .byte 0x8 + 1259 0045 CF040000 .4byte .LASF2 + 1260 0049 03 .uleb128 0x3 + 1261 004a 02 .byte 0x2 + 1262 004b 05 .byte 0x5 + 1263 004c 0F050000 .4byte .LASF3 + 1264 0050 03 .uleb128 0x3 + 1265 0051 02 .byte 0x2 + 1266 0052 07 .byte 0x7 + 1267 0053 12020000 .4byte .LASF4 + 1268 0057 04 .uleb128 0x4 + 1269 0058 04 .byte 0x4 + 1270 0059 05 .byte 0x5 + 1271 005a 696E7400 .ascii "int\000" + 1272 005e 03 .uleb128 0x3 + 1273 005f 08 .byte 0x8 + 1274 0060 05 .byte 0x5 + 1275 0061 F9000000 .4byte .LASF5 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 25 + + + 1276 0065 03 .uleb128 0x3 + 1277 0066 08 .byte 0x8 + 1278 0067 07 .byte 0x7 + 1279 0068 86000000 .4byte .LASF6 + 1280 006c 03 .uleb128 0x3 + 1281 006d 04 .byte 0x4 + 1282 006e 05 .byte 0x5 + 1283 006f A4010000 .4byte .LASF7 + 1284 0073 05 .uleb128 0x5 + 1285 0074 04 .byte 0x4 + 1286 0075 03 .uleb128 0x3 + 1287 0076 04 .byte 0x4 + 1288 0077 07 .byte 0x7 + 1289 0078 B1050000 .4byte .LASF8 + 1290 007c 06 .uleb128 0x6 + 1291 007d 04 .byte 0x4 + 1292 007e 82000000 .4byte 0x82 + 1293 0082 03 .uleb128 0x3 + 1294 0083 01 .byte 0x1 + 1295 0084 08 .byte 0x8 + 1296 0085 D2050000 .4byte .LASF9 + 1297 0089 06 .uleb128 0x6 + 1298 008a 04 .byte 0x4 + 1299 008b 8F000000 .4byte 0x8f + 1300 008f 07 .uleb128 0x7 + 1301 0090 82000000 .4byte 0x82 + 1302 0094 02 .uleb128 0x2 + 1303 0095 A6060000 .4byte .LASF11 + 1304 0099 03 .byte 0x3 + 1305 009a 2A .byte 0x2a + 1306 009b 42000000 .4byte 0x42 + 1307 009f 02 .uleb128 0x2 + 1308 00a0 95020000 .4byte .LASF12 + 1309 00a4 03 .byte 0x3 + 1310 00a5 36 .byte 0x36 + 1311 00a6 50000000 .4byte 0x50 + 1312 00aa 02 .uleb128 0x2 + 1313 00ab C7040000 .4byte .LASF13 + 1314 00af 03 .byte 0x3 + 1315 00b0 4F .byte 0x4f + 1316 00b1 6C000000 .4byte 0x6c + 1317 00b5 02 .uleb128 0x2 + 1318 00b6 75050000 .4byte .LASF14 + 1319 00ba 03 .byte 0x3 + 1320 00bb 50 .byte 0x50 + 1321 00bc 75000000 .4byte 0x75 + 1322 00c0 02 .uleb128 0x2 + 1323 00c1 0C000000 .4byte .LASF15 + 1324 00c5 03 .byte 0x3 + 1325 00c6 78 .byte 0x78 + 1326 00c7 65000000 .4byte 0x65 + 1327 00cb 02 .uleb128 0x2 + 1328 00cc 78000000 .4byte .LASF16 + 1329 00d0 03 .byte 0x3 + 1330 00d1 A6 .byte 0xa6 + 1331 00d2 34000000 .4byte 0x34 + 1332 00d6 02 .uleb128 0x2 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 26 + + + 1333 00d7 1D010000 .4byte .LASF17 + 1334 00db 04 .byte 0x4 + 1335 00dc 27 .byte 0x27 + 1336 00dd AA000000 .4byte 0xaa + 1337 00e1 02 .uleb128 0x2 + 1338 00e2 C9060000 .4byte .LASF18 + 1339 00e6 04 .byte 0x4 + 1340 00e7 28 .byte 0x28 + 1341 00e8 94000000 .4byte 0x94 + 1342 00ec 02 .uleb128 0x2 + 1343 00ed BE010000 .4byte .LASF19 + 1344 00f1 04 .byte 0x4 + 1345 00f2 29 .byte 0x29 + 1346 00f3 94000000 .4byte 0x94 + 1347 00f7 02 .uleb128 0x2 + 1348 00f8 1B040000 .4byte .LASF20 + 1349 00fc 04 .byte 0x4 + 1350 00fd 2A .byte 0x2a + 1351 00fe 94000000 .4byte 0x94 + 1352 0102 02 .uleb128 0x2 + 1353 0103 70040000 .4byte .LASF21 + 1354 0107 04 .byte 0x4 + 1355 0108 2B .byte 0x2b + 1356 0109 B5000000 .4byte 0xb5 + 1357 010d 02 .uleb128 0x2 + 1358 010e 0C030000 .4byte .LASF22 + 1359 0112 04 .byte 0x4 + 1360 0113 2C .byte 0x2c + 1361 0114 AA000000 .4byte 0xaa + 1362 0118 02 .uleb128 0x2 + 1363 0119 4A030000 .4byte .LASF23 + 1364 011d 04 .byte 0x4 + 1365 011e 2E .byte 0x2e + 1366 011f B5000000 .4byte 0xb5 + 1367 0123 02 .uleb128 0x2 + 1368 0124 16060000 .4byte .LASF24 + 1369 0128 04 .byte 0x4 + 1370 0129 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.uleb128 0x11 + 4112 01b0 01 .uleb128 0x1 + 4113 01b1 12 .uleb128 0x12 + 4114 01b2 01 .uleb128 0x1 + 4115 01b3 00 .byte 0 + 4116 01b4 00 .byte 0 + 4117 01b5 24 .uleb128 0x24 + 4118 01b6 2E .uleb128 0x2e + 4119 01b7 01 .byte 0x1 + 4120 01b8 03 .uleb128 0x3 + 4121 01b9 0E .uleb128 0xe + 4122 01ba 3A .uleb128 0x3a + 4123 01bb 0B .uleb128 0xb + 4124 01bc 3B .uleb128 0x3b + 4125 01bd 0B .uleb128 0xb + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 75 + + + 4126 01be 27 .uleb128 0x27 + 4127 01bf 0C .uleb128 0xc + 4128 01c0 49 .uleb128 0x49 + 4129 01c1 13 .uleb128 0x13 + 4130 01c2 11 .uleb128 0x11 + 4131 01c3 01 .uleb128 0x1 + 4132 01c4 12 .uleb128 0x12 + 4133 01c5 01 .uleb128 0x1 + 4134 01c6 40 .uleb128 0x40 + 4135 01c7 06 .uleb128 0x6 + 4136 01c8 01 .uleb128 0x1 + 4137 01c9 13 .uleb128 0x13 + 4138 01ca 00 .byte 0 + 4139 01cb 00 .byte 0 + 4140 01cc 25 .uleb128 0x25 + 4141 01cd 34 .uleb128 0x34 + 4142 01ce 00 .byte 0 + 4143 01cf 03 .uleb128 0x3 + 4144 01d0 0E .uleb128 0xe + 4145 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0 + 4182 01f6 31 .uleb128 0x31 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 76 + + + 4183 01f7 13 .uleb128 0x13 + 4184 01f8 02 .uleb128 0x2 + 4185 01f9 0A .uleb128 0xa + 4186 01fa 00 .byte 0 + 4187 01fb 00 .byte 0 + 4188 01fc 29 .uleb128 0x29 + 4189 01fd 34 .uleb128 0x34 + 4190 01fe 00 .byte 0 + 4191 01ff 31 .uleb128 0x31 + 4192 0200 13 .uleb128 0x13 + 4193 0201 02 .uleb128 0x2 + 4194 0202 06 .uleb128 0x6 + 4195 0203 00 .byte 0 + 4196 0204 00 .byte 0 + 4197 0205 2A .uleb128 0x2a + 4198 0206 1D .uleb128 0x1d + 4199 0207 01 .byte 0x1 + 4200 0208 31 .uleb128 0x31 + 4201 0209 13 .uleb128 0x13 + 4202 020a 52 .uleb128 0x52 + 4203 020b 01 .uleb128 0x1 + 4204 020c 55 .uleb128 0x55 + 4205 020d 06 .uleb128 0x6 + 4206 020e 58 .uleb128 0x58 + 4207 020f 0B .uleb128 0xb + 4208 0210 59 .uleb128 0x59 + 4209 0211 0B .uleb128 0xb + 4210 0212 00 .byte 0 + 4211 0213 00 .byte 0 + 4212 0214 2B .uleb128 0x2b + 4213 0215 0B .uleb128 0xb + 4214 0216 01 .byte 0x1 + 4215 0217 55 .uleb128 0x55 + 4216 0218 06 .uleb128 0x6 + 4217 0219 00 .byte 0 + 4218 021a 00 .byte 0 + 4219 021b 2C .uleb128 0x2c + 4220 021c 34 .uleb128 0x34 + 4221 021d 00 .byte 0 + 4222 021e 31 .uleb128 0x31 + 4223 021f 13 .uleb128 0x13 + 4224 0220 00 .byte 0 + 4225 0221 00 .byte 0 + 4226 0222 2D .uleb128 0x2d + 4227 0223 05 .uleb128 0x5 + 4228 0224 00 .byte 0 + 4229 0225 31 .uleb128 0x31 + 4230 0226 13 .uleb128 0x13 + 4231 0227 00 .byte 0 + 4232 0228 00 .byte 0 + 4233 0229 2E .uleb128 0x2e + 4234 022a 2E .uleb128 0x2e + 4235 022b 01 .byte 0x1 + 4236 022c 3F .uleb128 0x3f + 4237 022d 0C .uleb128 0xc + 4238 022e 03 .uleb128 0x3 + 4239 022f 0E .uleb128 0xe + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 77 + + + 4240 0230 3A .uleb128 0x3a + 4241 0231 0B .uleb128 0xb + 4242 0232 3B .uleb128 0x3b + 4243 0233 0B .uleb128 0xb + 4244 0234 27 .uleb128 0x27 + 4245 0235 0C .uleb128 0xc + 4246 0236 49 .uleb128 0x49 + 4247 0237 13 .uleb128 0x13 + 4248 0238 11 .uleb128 0x11 + 4249 0239 01 .uleb128 0x1 + 4250 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0xb + 4320 0280 59 .uleb128 0x59 + 4321 0281 05 .uleb128 0x5 + 4322 0282 00 .byte 0 + 4323 0283 00 .byte 0 + 4324 0284 33 .uleb128 0x33 + 4325 0285 34 .uleb128 0x34 + 4326 0286 00 .byte 0 + 4327 0287 03 .uleb128 0x3 + 4328 0288 0E .uleb128 0xe + 4329 0289 3A .uleb128 0x3a + 4330 028a 0B .uleb128 0xb + 4331 028b 3B .uleb128 0x3b + 4332 028c 0B .uleb128 0xb + 4333 028d 49 .uleb128 0x49 + 4334 028e 13 .uleb128 0x13 + 4335 028f 3F .uleb128 0x3f + 4336 0290 0C .uleb128 0xc + 4337 0291 3C .uleb128 0x3c + 4338 0292 0C .uleb128 0xc + 4339 0293 00 .byte 0 + 4340 0294 00 .byte 0 + 4341 0295 34 .uleb128 0x34 + 4342 0296 34 .uleb128 0x34 + 4343 0297 00 .byte 0 + 4344 0298 03 .uleb128 0x3 + 4345 0299 0E .uleb128 0xe + 4346 029a 3A .uleb128 0x3a + 4347 029b 0B .uleb128 0xb + 4348 029c 3B .uleb128 0x3b + 4349 029d 05 .uleb128 0x5 + 4350 029e 49 .uleb128 0x49 + 4351 029f 13 .uleb128 0x13 + 4352 02a0 3F .uleb128 0x3f + 4353 02a1 0C .uleb128 0xc + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 79 + + + 4354 02a2 3C .uleb128 0x3c + 4355 02a3 0C .uleb128 0xc + 4356 02a4 00 .byte 0 + 4357 02a5 00 .byte 0 + 4358 02a6 35 .uleb128 0x35 + 4359 02a7 34 .uleb128 0x34 + 4360 02a8 00 .byte 0 + 4361 02a9 03 .uleb128 0x3 + 4362 02aa 08 .uleb128 0x8 + 4363 02ab 3A .uleb128 0x3a + 4364 02ac 0B .uleb128 0xb + 4365 02ad 3B .uleb128 0x3b + 4366 02ae 0B .uleb128 0xb + 4367 02af 49 .uleb128 0x49 + 4368 02b0 13 .uleb128 0x13 + 4369 02b1 3F .uleb128 0x3f + 4370 02b2 0C .uleb128 0xc + 4371 02b3 3C .uleb128 0x3c + 4372 02b4 0C .uleb128 0xc + 4373 02b5 00 .byte 0 + 4374 02b6 00 .byte 0 + 4375 02b7 36 .uleb128 0x36 + 4376 02b8 34 .uleb128 0x34 + 4377 02b9 00 .byte 0 + 4378 02ba 03 .uleb128 0x3 + 4379 02bb 0E .uleb128 0xe + 4380 02bc 3A .uleb128 0x3a + 4381 02bd 0B .uleb128 0xb + 4382 02be 3B .uleb128 0x3b + 4383 02bf 0B .uleb128 0xb + 4384 02c0 49 .uleb128 0x49 + 4385 02c1 13 .uleb128 0x13 + 4386 02c2 02 .uleb128 0x2 + 4387 02c3 0A .uleb128 0xa + 4388 02c4 00 .byte 0 + 4389 02c5 00 .byte 0 + 4390 02c6 00 .byte 0 + 4391 .section .debug_loc,"",%progbits + 4392 .Ldebug_loc0: + 4393 .LLST0: + 4394 0000 00000000 .4byte .LFB66 + 4395 0004 02000000 .4byte .LCFI0 + 4396 0008 0200 .2byte 0x2 + 4397 000a 7D .byte 0x7d + 4398 000b 00 .sleb128 0 + 4399 000c 02000000 .4byte .LCFI0 + 4400 0010 38000000 .4byte .LFE66 + 4401 0014 0200 .2byte 0x2 + 4402 0016 7D .byte 0x7d + 4403 0017 10 .sleb128 16 + 4404 0018 00000000 .4byte 0 + 4405 001c 00000000 .4byte 0 + 4406 .LLST1: + 4407 0020 00000000 .4byte .LVL0 + 4408 0024 0A000000 .4byte .LVL1 + 4409 0028 0100 .2byte 0x1 + 4410 002a 50 .byte 0x50 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 80 + + + 4411 002b 00000000 .4byte 0 + 4412 002f 00000000 .4byte 0 + 4413 .LLST2: + 4414 0033 00000000 .4byte .LFB64 + 4415 0037 02000000 .4byte .LCFI1 + 4416 003b 0200 .2byte 0x2 + 4417 003d 7D .byte 0x7d + 4418 003e 00 .sleb128 0 + 4419 003f 02000000 .4byte .LCFI1 + 4420 0043 28000000 .4byte .LFE64 + 4421 0047 0200 .2byte 0x2 + 4422 0049 7D .byte 0x7d + 4423 004a 08 .sleb128 8 + 4424 004b 00000000 .4byte 0 + 4425 004f 00000000 .4byte 0 + 4426 .LLST3: + 4427 0053 00000000 .4byte .LVL2 + 4428 0057 0A000000 .4byte .LVL5 + 4429 005b 0100 .2byte 0x1 + 4430 005d 50 .byte 0x50 + 4431 005e 00000000 .4byte 0 + 4432 0062 00000000 .4byte 0 + 4433 .LLST4: + 4434 0066 08000000 .4byte .LVL4 + 4435 006a 0F000000 .4byte .LVL6-1 + 4436 006e 0100 .2byte 0x1 + 4437 0070 53 .byte 0x53 + 4438 0071 00000000 .4byte 0 + 4439 0075 00000000 .4byte 0 + 4440 .LLST5: + 4441 0079 1E000000 .4byte .LVL8 + 4442 007d 28000000 .4byte .LFE64 + 4443 0081 0100 .2byte 0x1 + 4444 0083 53 .byte 0x53 + 4445 0084 00000000 .4byte 0 + 4446 0088 00000000 .4byte 0 + 4447 .LLST6: + 4448 008c 00000000 .4byte .LFB63 + 4449 0090 02000000 .4byte .LCFI2 + 4450 0094 0200 .2byte 0x2 + 4451 0096 7D .byte 0x7d + 4452 0097 00 .sleb128 0 + 4453 0098 02000000 .4byte .LCFI2 + 4454 009c 28000000 .4byte .LFE63 + 4455 00a0 0200 .2byte 0x2 + 4456 00a2 7D .byte 0x7d + 4457 00a3 08 .sleb128 8 + 4458 00a4 00000000 .4byte 0 + 4459 00a8 00000000 .4byte 0 + 4460 .LLST7: + 4461 00ac 00000000 .4byte .LVL9 + 4462 00b0 0A000000 .4byte .LVL12 + 4463 00b4 0100 .2byte 0x1 + 4464 00b6 50 .byte 0x50 + 4465 00b7 00000000 .4byte 0 + 4466 00bb 00000000 .4byte 0 + 4467 .LLST8: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 81 + + + 4468 00bf 08000000 .4byte .LVL11 + 4469 00c3 0F000000 .4byte .LVL13-1 + 4470 00c7 0100 .2byte 0x1 + 4471 00c9 53 .byte 0x53 + 4472 00ca 00000000 .4byte 0 + 4473 00ce 00000000 .4byte 0 + 4474 .LLST9: + 4475 00d2 1E000000 .4byte .LVL15 + 4476 00d6 28000000 .4byte .LFE63 + 4477 00da 0100 .2byte 0x1 + 4478 00dc 53 .byte 0x53 + 4479 00dd 00000000 .4byte 0 + 4480 00e1 00000000 .4byte 0 + 4481 .LLST10: + 4482 00e5 00000000 .4byte .LFB62 + 4483 00e9 04000000 .4byte .LCFI3 + 4484 00ed 0200 .2byte 0x2 + 4485 00ef 7D .byte 0x7d + 4486 00f0 00 .sleb128 0 + 4487 00f1 04000000 .4byte .LCFI3 + 4488 00f5 18000000 .4byte .LCFI4 + 4489 00f9 0200 .2byte 0x2 + 4490 00fb 7D .byte 0x7d + 4491 00fc 24 .sleb128 36 + 4492 00fd 18000000 .4byte .LCFI4 + 4493 0101 AC000000 .4byte .LFE62 + 4494 0105 0200 .2byte 0x2 + 4495 0107 7D .byte 0x7d + 4496 0108 30 .sleb128 48 + 4497 0109 00000000 .4byte 0 + 4498 010d 00000000 .4byte 0 + 4499 .LLST11: + 4500 0111 00000000 .4byte .LVL16 + 4501 0115 2A000000 .4byte .LVL17 + 4502 0119 0100 .2byte 0x1 + 4503 011b 50 .byte 0x50 + 4504 011c 2A000000 .4byte .LVL17 + 4505 0120 AC000000 .4byte .LFE62 + 4506 0124 0300 .2byte 0x3 + 4507 0126 79 .byte 0x79 + 4508 0127 01 .sleb128 1 + 4509 0128 9F .byte 0x9f + 4510 0129 00000000 .4byte 0 + 4511 012d 00000000 .4byte 0 + 4512 .LLST13: + 4513 0131 4E000000 .4byte .LVL21 + 4514 0135 54000000 .4byte .LVL22 + 4515 0139 0100 .2byte 0x1 + 4516 013b 53 .byte 0x53 + 4517 013c 76000000 .4byte .LVL23 + 4518 0140 7A000000 .4byte .LVL24 + 4519 0144 0100 .2byte 0x1 + 4520 0146 53 .byte 0x53 + 4521 0147 00000000 .4byte 0 + 4522 014b 00000000 .4byte 0 + 4523 .LLST14: + 4524 014f 36000000 .4byte .LVL19 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 82 + + + 4525 0153 3A000000 .4byte .LVL20 + 4526 0157 0300 .2byte 0x3 + 4527 0159 75 .byte 0x75 + 4528 015a 7F .sleb128 -1 + 4529 015b 9F .byte 0x9f + 4530 015c 00000000 .4byte 0 + 4531 0160 00000000 .4byte 0 + 4532 .LLST15: + 4533 0164 2A000000 .4byte .LVL17 + 4534 0168 2C000000 .4byte .LVL18 + 4535 016c 0100 .2byte 0x1 + 4536 016e 50 .byte 0x50 + 4537 016f 2C000000 .4byte .LVL18 + 4538 0173 AC000000 .4byte .LFE62 + 4539 0177 0200 .2byte 0x2 + 4540 0179 91 .byte 0x91 + 4541 017a 54 .sleb128 -44 + 4542 017b 00000000 .4byte 0 + 4543 017f 00000000 .4byte 0 + 4544 .LLST16: + 4545 0183 00000000 .4byte .LFB67 + 4546 0187 02000000 .4byte .LCFI5 + 4547 018b 0200 .2byte 0x2 + 4548 018d 7D .byte 0x7d + 4549 018e 00 .sleb128 0 + 4550 018f 02000000 .4byte .LCFI5 + 4551 0193 04000000 .4byte .LCFI6 + 4552 0197 0200 .2byte 0x2 + 4553 0199 7D .byte 0x7d + 4554 019a 10 .sleb128 16 + 4555 019b 04000000 .4byte .LCFI6 + 4556 019f 68000000 .4byte .LFE67 + 4557 01a3 0200 .2byte 0x2 + 4558 01a5 7D .byte 0x7d + 4559 01a6 20 .sleb128 32 + 4560 01a7 00000000 .4byte 0 + 4561 01ab 00000000 .4byte 0 + 4562 .LLST17: + 4563 01af 00000000 .4byte .LVL25 + 4564 01b3 14000000 .4byte .LVL26 + 4565 01b7 0100 .2byte 0x1 + 4566 01b9 50 .byte 0x50 + 4567 01ba 2C000000 .4byte .LVL27 + 4568 01be 3A000000 .4byte .LVL29 + 4569 01c2 0100 .2byte 0x1 + 4570 01c4 53 .byte 0x53 + 4571 01c5 52000000 .4byte .LVL30 + 4572 01c9 54000000 .4byte .LVL31 + 4573 01cd 0100 .2byte 0x1 + 4574 01cf 50 .byte 0x50 + 4575 01d0 00000000 .4byte 0 + 4576 01d4 00000000 .4byte 0 + 4577 .LLST18: + 4578 01d8 2C000000 .4byte .LVL27 + 4579 01dc 38000000 .4byte .LVL28 + 4580 01e0 0100 .2byte 0x1 + 4581 01e2 54 .byte 0x54 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 83 + + + 4582 01e3 38000000 .4byte .LVL28 + 4583 01e7 3A000000 .4byte .LVL29 + 4584 01eb 0300 .2byte 0x3 + 4585 01ed 74 .byte 0x74 + 4586 01ee 01 .sleb128 1 + 4587 01ef 9F .byte 0x9f + 4588 01f0 00000000 .4byte 0 + 4589 01f4 00000000 .4byte 0 + 4590 .LLST19: + 4591 01f8 00000000 .4byte .LFB68 + 4592 01fc 04000000 .4byte .LCFI7 + 4593 0200 0200 .2byte 0x2 + 4594 0202 7D .byte 0x7d + 4595 0203 00 .sleb128 0 + 4596 0204 04000000 .4byte .LCFI7 + 4597 0208 06000000 .4byte .LCFI8 + 4598 020c 0200 .2byte 0x2 + 4599 020e 7D .byte 0x7d + 4600 020f 20 .sleb128 32 + 4601 0210 06000000 .4byte .LCFI8 + 4602 0214 E4030000 .4byte .LFE68 + 4603 0218 0200 .2byte 0x2 + 4604 021a 7D .byte 0x7d + 4605 021b 30 .sleb128 48 + 4606 021c 00000000 .4byte 0 + 4607 0220 00000000 .4byte 0 + 4608 .LLST20: + 4609 0224 4A000000 .4byte .LVL32 + 4610 0228 52000000 .4byte .LVL33 + 4611 022c 0200 .2byte 0x2 + 4612 022e 30 .byte 0x30 + 4613 022f 9F .byte 0x9f + 4614 0230 74000000 .4byte .LVL34 + 4615 0234 8C000000 .4byte .LVL35 + 4616 0238 0100 .2byte 0x1 + 4617 023a 54 .byte 0x54 + 4618 023b 0E020000 .4byte .LVL58 + 4619 023f 1E020000 .4byte .LVL59 + 4620 0243 0200 .2byte 0x2 + 4621 0245 31 .byte 0x31 + 4622 0246 9F .byte 0x9f + 4623 0247 7A030000 .4byte .LVL72 + 4624 024b E4030000 .4byte .LFE68 + 4625 024f 0100 .2byte 0x1 + 4626 0251 59 .byte 0x59 + 4627 0252 00000000 .4byte 0 + 4628 0256 00000000 .4byte 0 + 4629 .LLST21: + 4630 025a 4E020000 .4byte .LVL61 + 4631 025e CC020000 .4byte .LVL62 + 4632 0262 0400 .2byte 0x4 + 4633 0264 0A .byte 0xa + 4634 0265 D007 .2byte 0x7d0 + 4635 0267 9F .byte 0x9f + 4636 0268 DE020000 .4byte .LVL64 + 4637 026c E2020000 .4byte .LVL65 + 4638 0270 0100 .2byte 0x1 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 84 + + + 4639 0272 56 .byte 0x56 + 4640 0273 2E030000 .4byte .LVL68 + 4641 0277 32030000 .4byte .LVL69 + 4642 027b 0100 .2byte 0x1 + 4643 027d 56 .byte 0x56 + 4644 027e 00000000 .4byte 0 + 4645 0282 00000000 .4byte 0 + 4646 .LLST22: + 4647 0286 4E020000 .4byte .LVL61 + 4648 028a CC020000 .4byte .LVL62 + 4649 028e 0200 .2byte 0x2 + 4650 0290 30 .byte 0x30 + 4651 0291 9F .byte 0x9f + 4652 0292 D4020000 .4byte .LVL63 + 4653 0296 E2020000 .4byte .LVL65 + 4654 029a 0100 .2byte 0x1 + 4655 029c 54 .byte 0x54 + 4656 029d 24030000 .4byte .LVL67 + 4657 02a1 32030000 .4byte .LVL69 + 4658 02a5 0100 .2byte 0x1 + 4659 02a7 54 .byte 0x54 + 4660 02a8 00000000 .4byte 0 + 4661 02ac 00000000 .4byte 0 + 4662 .LLST23: + 4663 02b0 0E020000 .4byte .LVL58 + 4664 02b4 1E020000 .4byte .LVL59 + 4665 02b8 0200 .2byte 0x2 + 4666 02ba 30 .byte 0x30 + 4667 02bb 9F .byte 0x9f + 4668 02bc 7A030000 .4byte .LVL72 + 4669 02c0 E4030000 .4byte .LFE68 + 4670 02c4 0100 .2byte 0x1 + 4671 02c6 5A .byte 0x5a + 4672 02c7 00000000 .4byte 0 + 4673 02cb 00000000 .4byte 0 + 4674 .LLST24: + 4675 02cf 94000000 .4byte .LVL36 + 4676 02d3 96000000 .4byte .LVL37 + 4677 02d7 0600 .2byte 0x6 + 4678 02d9 03 .byte 0x3 + 4679 02da 40000000 .4byte .LC5 + 4680 02de 9F .byte 0x9f + 4681 02df 00000000 .4byte 0 + 4682 02e3 00000000 .4byte 0 + 4683 .LLST25: + 4684 02e7 B2000000 .4byte .LVL38 + 4685 02eb B4000000 .4byte .LVL39 + 4686 02ef 0600 .2byte 0x6 + 4687 02f1 03 .byte 0x3 + 4688 02f2 64000000 .4byte .LC7 + 4689 02f6 9F .byte 0x9f + 4690 02f7 00000000 .4byte 0 + 4691 02fb 00000000 .4byte 0 + 4692 .LLST26: + 4693 02ff D0000000 .4byte .LVL40 + 4694 0303 D2000000 .4byte .LVL41 + 4695 0307 0600 .2byte 0x6 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 85 + + + 4696 0309 03 .byte 0x3 + 4697 030a 80000000 .4byte .LC9 + 4698 030e 9F .byte 0x9f + 4699 030f 00000000 .4byte 0 + 4700 0313 00000000 .4byte 0 + 4701 .LLST27: + 4702 0317 EE000000 .4byte .LVL42 + 4703 031b F0000000 .4byte .LVL43 + 4704 031f 0600 .2byte 0x6 + 4705 0321 03 .byte 0x3 + 4706 0322 9C000000 .4byte .LC11 + 4707 0326 9F .byte 0x9f + 4708 0327 00000000 .4byte 0 + 4709 032b 00000000 .4byte 0 + 4710 .LLST28: + 4711 032f 0C010000 .4byte .LVL44 + 4712 0333 0E010000 .4byte .LVL45 + 4713 0337 0600 .2byte 0x6 + 4714 0339 03 .byte 0x3 + 4715 033a BC000000 .4byte .LC13 + 4716 033e 9F .byte 0x9f + 4717 033f 00000000 .4byte 0 + 4718 0343 00000000 .4byte 0 + 4719 .LLST29: + 4720 0347 2A010000 .4byte .LVL46 + 4721 034b 2C010000 .4byte .LVL47 + 4722 034f 0600 .2byte 0x6 + 4723 0351 03 .byte 0x3 + 4724 0352 F8000000 .4byte .LC15 + 4725 0356 9F .byte 0x9f + 4726 0357 00000000 .4byte 0 + 4727 035b 00000000 .4byte 0 + 4728 .LLST30: + 4729 035f 4E010000 .4byte .LVL48 + 4730 0363 50010000 .4byte .LVL49 + 4731 0367 0600 .2byte 0x6 + 4732 0369 03 .byte 0x3 + 4733 036a 20010000 .4byte .LC17 + 4734 036e 9F .byte 0x9f + 4735 036f 00000000 .4byte 0 + 4736 0373 00000000 .4byte 0 + 4737 .LLST31: + 4738 0377 78010000 .4byte .LVL50 + 4739 037b 7A010000 .4byte .LVL51 + 4740 037f 0600 .2byte 0x6 + 4741 0381 03 .byte 0x3 + 4742 0382 34010000 .4byte .LC18 + 4743 0386 9F .byte 0x9f + 4744 0387 00000000 .4byte 0 + 4745 038b 00000000 .4byte 0 + 4746 .LLST32: + 4747 038f 9C010000 .4byte .LVL52 + 4748 0393 9E010000 .4byte .LVL53 + 4749 0397 0600 .2byte 0x6 + 4750 0399 03 .byte 0x3 + 4751 039a 48010000 .4byte .LC19 + 4752 039e 9F .byte 0x9f + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 86 + + + 4753 039f 00000000 .4byte 0 + 4754 03a3 00000000 .4byte 0 + 4755 .LLST33: + 4756 03a7 C0010000 .4byte .LVL54 + 4757 03ab C2010000 .4byte .LVL55 + 4758 03af 0600 .2byte 0x6 + 4759 03b1 03 .byte 0x3 + 4760 03b2 5C010000 .4byte .LC20 + 4761 03b6 9F .byte 0x9f + 4762 03b7 00000000 .4byte 0 + 4763 03bb 00000000 .4byte 0 + 4764 .LLST34: + 4765 03bf E2010000 .4byte .LVL56 + 4766 03c3 E6010000 .4byte .LVL57 + 4767 03c7 0600 .2byte 0x6 + 4768 03c9 03 .byte 0x3 + 4769 03ca 70010000 .4byte .LC21 + 4770 03ce 9F .byte 0x9f + 4771 03cf 00000000 .4byte 0 + 4772 03d3 00000000 .4byte 0 + 4773 .LLST35: + 4774 03d7 1E020000 .4byte .LVL59 + 4775 03db 22020000 .4byte .LVL60 + 4776 03df 0600 .2byte 0x6 + 4777 03e1 03 .byte 0x3 + 4778 03e2 98010000 .4byte .LC24 + 4779 03e6 9F .byte 0x9f + 4780 03e7 00000000 .4byte 0 + 4781 03eb 00000000 .4byte 0 + 4782 .LLST38: + 4783 03ef 40030000 .4byte .LVL70 + 4784 03f3 42030000 .4byte .LVL71 + 4785 03f7 0600 .2byte 0x6 + 4786 03f9 03 .byte 0x3 + 4787 03fa 84010000 .4byte .LC22 + 4788 03fe 9F .byte 0x9f + 4789 03ff 00000000 .4byte 0 + 4790 0403 00000000 .4byte 0 + 4791 .LLST39: + 4792 0407 8C030000 .4byte .LVL73 + 4793 040b 8E030000 .4byte .LVL74 + 4794 040f 0600 .2byte 0x6 + 4795 0411 03 .byte 0x3 + 4796 0412 A4010000 .4byte .LC25 + 4797 0416 9F .byte 0x9f + 4798 0417 00000000 .4byte 0 + 4799 041b 00000000 .4byte 0 + 4800 .section .debug_aranges,"",%progbits + 4801 0000 44000000 .4byte 0x44 + 4802 0004 0200 .2byte 0x2 + 4803 0006 00000000 .4byte .Ldebug_info0 + 4804 000a 04 .byte 0x4 + 4805 000b 00 .byte 0 + 4806 000c 0000 .2byte 0 + 4807 000e 0000 .2byte 0 + 4808 0010 00000000 .4byte .LFB66 + 4809 0014 38000000 .4byte .LFE66-.LFB66 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 87 + + + 4810 0018 00000000 .4byte .LFB64 + 4811 001c 28000000 .4byte .LFE64-.LFB64 + 4812 0020 00000000 .4byte .LFB63 + 4813 0024 28000000 .4byte .LFE63-.LFB63 + 4814 0028 00000000 .4byte .LFB62 + 4815 002c AC000000 .4byte .LFE62-.LFB62 + 4816 0030 00000000 .4byte .LFB67 + 4817 0034 68000000 .4byte .LFE67-.LFB67 + 4818 0038 00000000 .4byte .LFB68 + 4819 003c E4030000 .4byte .LFE68-.LFB68 + 4820 0040 00000000 .4byte 0 + 4821 0044 00000000 .4byte 0 + 4822 .section .debug_ranges,"",%progbits + 4823 .Ldebug_ranges0: + 4824 0000 0C000000 .4byte .LBB40 + 4825 0004 0E000000 .4byte .LBE40 + 4826 0008 52000000 .4byte .LBB43 + 4827 000c 68000000 .4byte .LBE43 + 4828 0010 00000000 .4byte 0 + 4829 0014 00000000 .4byte 0 + 4830 0018 0C000000 .4byte .LBB41 + 4831 001c 0E000000 .4byte .LBE41 + 4832 0020 52000000 .4byte .LBB42 + 4833 0024 68000000 .4byte .LBE42 + 4834 0028 00000000 .4byte 0 + 4835 002c 00000000 .4byte 0 + 4836 0030 0C030000 .4byte .LBB70 + 4837 0034 14030000 .4byte .LBE70 + 4838 0038 18030000 .4byte .LBB74 + 4839 003c 1A030000 .4byte .LBE74 + 4840 0040 20030000 .4byte .LBB75 + 4841 0044 24030000 .4byte .LBE75 + 4842 0048 00000000 .4byte 0 + 4843 004c 00000000 .4byte 0 + 4844 0050 00000000 .4byte .LFB66 + 4845 0054 38000000 .4byte .LFE66 + 4846 0058 00000000 .4byte .LFB64 + 4847 005c 28000000 .4byte .LFE64 + 4848 0060 00000000 .4byte .LFB63 + 4849 0064 28000000 .4byte .LFE63 + 4850 0068 00000000 .4byte .LFB62 + 4851 006c AC000000 .4byte .LFE62 + 4852 0070 00000000 .4byte .LFB67 + 4853 0074 68000000 .4byte .LFE67 + 4854 0078 00000000 .4byte .LFB68 + 4855 007c E4030000 .4byte .LFE68 + 4856 0080 00000000 .4byte 0 + 4857 0084 00000000 .4byte 0 + 4858 .section .debug_line,"",%progbits + 4859 .Ldebug_line0: + 4860 0000 55040000 .section .debug_str,"MS",%progbits,1 + 4860 02009402 + 4860 00000201 + 4860 FB0E0D00 + 4860 01010101 + 4861 .LASF99: + 4862 0000 44494552 .ascii "DIER\000" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 88 + + + 4862 00 + 4863 .LASF79: + 4864 0005 7264796D .ascii "rdymsg\000" + 4864 736700 + 4865 .LASF15: + 4866 000c 75696E74 .ascii "uint64_t\000" + 4866 36345F74 + 4866 00 + 4867 .LASF191: + 4868 0015 474E5520 .ascii "GNU C 4.6.0\000" + 4868 4320342E + 4868 362E3000 + 4869 .LASF93: + 4870 0021 4F757470 .ascii "OutputQueue\000" + 4870 75745175 + 4870 65756500 + 4871 .LASF130: + 4872 002d 4F545950 .ascii "OTYPER\000" + 4872 455200 + 4873 .LASF143: + 4874 0034 4750545F .ascii "GPT_ONESHOT\000" + 4874 4F4E4553 + 4874 484F5400 + 4875 .LASF76: + 4876 0040 6D625F66 .ascii "mb_fullsem\000" + 4876 756C6C73 + 4876 656D00 + 4877 .LASF138: + 4878 004b 696F706F .ascii "ioportmask_t\000" + 4878 72746D61 + 4878 736B5F74 + 4878 00 + 4879 .LASF126: + 4880 0058 54494D5F .ascii "TIM_TypeDef\000" + 4880 54797065 + 4880 44656600 + 4881 .LASF87: + 4882 0064 715F746F .ascii "q_top\000" + 4882 7000 + 4883 .LASF78: + 4884 006a 4D61696C .ascii "Mailbox\000" + 4884 626F7800 + 4885 .LASF129: + 4886 0072 4D4F4445 .ascii "MODER\000" + 4886 5200 + 4887 .LASF16: + 4888 0078 75696E74 .ascii "uint_fast16_t\000" + 4888 5F666173 + 4888 7431365F + 4888 7400 + 4889 .LASF6: + 4890 0086 6C6F6E67 .ascii "long long unsigned int\000" + 4890 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696E7463 .ascii "intctx\000" + 5207 747800 + 5208 .LASF157: + 5209 065e 53445F52 .ascii "SD_READY\000" + 5209 45414459 + 5209 00 + 5210 .LASF59: + 5211 0667 53656D61 .ascii "Semaphore\000" + 5211 70686F72 + 5211 6500 + 5212 .LASF113: + 5213 0671 43435231 .ascii "CCR1\000" + 5213 00 + 5214 .LASF115: + 5215 0676 43435232 .ascii "CCR2\000" + 5215 00 + 5216 .LASF117: + 5217 067b 43435233 .ascii "CCR3\000" + 5217 00 + 5218 .LASF119: + 5219 0680 43435234 .ascii "CCR4\000" + 5219 00 + 5220 .LASF71: + 5221 0685 65735F6E .ascii "es_next\000" + 5221 65787400 + 5222 .LASF58: + 5223 068d 52656164 .ascii "ReadyList\000" + 5223 794C6973 + 5223 7400 + 5224 .LASF90: + 5225 0697 715F6E6F .ascii "q_notify\000" + 5225 74696679 + 5225 00 + 5226 .LASF183: + 5227 06a0 726C6973 .ascii "rlist\000" + 5227 7400 + 5228 .LASF11: + 5229 06a6 75696E74 .ascii "uint8_t\000" + 5229 385F7400 + 5230 .LASF161: + 5231 06ae 666C6167 .ascii "flags\000" + 5231 7300 + 5232 .LASF66: + 5233 06b4 4576656E .ascii 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page 101 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:18 .text.println:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:23 .text.println:00000000 println +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:69 .text.println:00000030 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:75 .text.gpt3cb:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:80 .text.gpt3cb:00000000 gpt3cb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:130 .text.gpt3cb:00000020 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:136 .text.gpt2cb:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:141 .text.gpt2cb:00000000 gpt2cb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:191 .text.gpt2cb:00000020 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:197 .text.WorkerThread:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:202 .text.WorkerThread:00000000 WorkerThread +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1087 .bss.saturated:00000000 .LANCHOR1 +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:318 .text.WorkerThread:00000098 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:327 .text.printn:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:332 .text.printn:00000000 printn +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:422 .text.printn:00000064 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:429 .text.startup.main:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:435 .text.startup.main:00000000 main +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:854 .text.startup.main:00000250 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:890 .text.startup.main:000002cc $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1059 .text.startup.main:000003c4 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1071 .rodata.gpt2cfg:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1075 .rodata.gpt2cfg:00000000 gpt2cfg +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1079 .bss.waWorkerThread:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1083 .bss.waWorkerThread:00000000 waWorkerThread +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1086 .bss.saturated:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1090 .bss.saturated:00000000 saturated +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1093 .rodata.gpt3cfg:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1097 .rodata.gpt3cfg:00000000 gpt3cfg +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1101 .rodata.str1.4:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1178 .bss.mb:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1182 .bss.mb:00000000 mb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1185 .bss.b:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1189 .bss.b:00000000 b +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1192 .bss.x.3441:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1196 .bss.x.3441:00000000 x.3441 +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1199 .bss.cnt.3442:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1203 .bss.cnt.3442:00000000 cnt.3442 + .debug_frame:00000010 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:74 .text.println:00000038 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:135 .text.gpt3cb:00000028 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:196 .text.gpt2cb:00000028 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:326 .text.WorkerThread:000000ac $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:428 .text.printn:00000068 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1070 .text.startup.main:000003e4 $t + +UNDEFINED SYMBOLS +SD1 +chMBPostI +chMBFetch +chMBPost +rlist +halInit +chSysInit +sdStart + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 102 + + +_pal_lld_setgroupmode +gptStart +chMBInit +chThdCreateStatic +GPTD2 +GPTD3 +gptStartContinuous +chThdSleep +gptStopTimer diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..5839ef86a --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..f55cf8471 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx PWM-ICU drivers. + +** Board Setup ** + +- Remove the LCD module. +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index 10a6ed0e8..9209b441d 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT).