zcy
/
tinySA
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5108 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-02-04 10:21:25 +00:00
parent 2290c04561
commit 3950ddaed2
8 changed files with 2028 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

71
os/ports/GCC/PPC/SPC56ELxx/bam.s Normal file
View File

@ -0,0 +1,71 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file SPC56ELxx/bam.s
* @brief SPC56ELxx boot assistant record.
*
* @addtogroup PPC_CORE
* @{
*/
#if !defined(__DOXYGEN__)
/* BAM info, SWT off, WTE off, VLE from settings.*/
.section .bam, "ax"
.long 0x015A0000
.long .clear_ecc
/* RAM clearing, this device requires a write to all RAM location in
order to initialize the ECC detection hardware, this is going to
slow down the startup but there is no way around.*/
.clear_ecc:
xor %r16, %r16, %r16
xor %r17, %r17, %r17
xor %r18, %r18, %r18
xor %r19, %r19, %r19
xor %r20, %r20, %r20
xor %r21, %r21, %r21
xor %r22, %r22, %r22
xor %r23, %r23, %r23
xor %r24, %r24, %r24
xor %r25, %r25, %r25
xor %r26, %r26, %r26
xor %r27, %r27, %r27
xor %r28, %r28, %r28
xor %r29, %r29, %r29
xor %r30, %r30, %r30
xor %r31, %r31, %r31
lis %r4, __ram_start__@h
ori %r4, %r4, __ram_start__@l
lis %r5, __ram_end__@h
ori %r5, %r5, __ram_end__@l
.cleareccloop:
cmpl cr0, %r4, %r5
bge cr0, .cleareccend
stmw %r16, 0(%r4)
addi %r4, %r4, 64
b .cleareccloop
.cleareccend:
b _boot_address
#endif /* !defined(__DOXYGEN__) */
/** @} */

258
os/ports/GCC/PPC/SPC56ELxx/ivor.s Normal file
View File

@ -0,0 +1,258 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file SPC56ELxx/ivor.s
* @brief SPC56ELxx IVORx handlers.
*
* @addtogroup PPC_CORE
* @{
*/
/*
* Imports the PPC configuration headers.
*/
#define _FROM_ASM_
#include "chconf.h"
#include "chcore.h"
#if !defined(__DOXYGEN__)
/*
* INTC registers address.
*/
.equ INTC_IACKR, 0xfff48010
.equ INTC_EOIR, 0xfff48018
.section .handlers, "ax"
/*
* Unhandled exceptions handler.
*/
.weak _IVOR0
_IVOR0:
.weak _IVOR1
_IVOR1:
.weak _IVOR2
_IVOR2:
.weak _IVOR3
_IVOR3:
.weak _IVOR5
_IVOR5:
.weak _IVOR6
_IVOR6:
.weak _IVOR7
_IVOR7:
.weak _IVOR8
_IVOR8:
.weak _IVOR9
_IVOR9:
.weak _IVOR11
_IVOR11:
.weak _IVOR12
_IVOR12:
.weak _IVOR13
_IVOR13:
.weak _IVOR14
_IVOR14:
.weak _IVOR15
_IVOR15:
.weak _unhandled_exception
.type _unhandled_exception, @function
_unhandled_exception:
b _unhandled_exception
/*
* _IVOR10 handler (Book-E decrementer).
*/
.align 4
.globl _IVOR10
.type _IVOR10, @function
_IVOR10:
/* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */
mfSRR1 %r0
stw %r0, 12(%sp) /* Saves MSR. */
mfCR %r0
stw %r0, 16(%sp) /* Saves CR. */
mfLR %r0
stw %r0, 20(%sp) /* Saves LR. */
mfCTR %r0
stw %r0, 24(%sp) /* Saves CTR. */
mfXER %r0
stw %r0, 28(%sp) /* Saves XER. */
stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
stw %r4, 40(%sp)
stw %r5, 44(%sp)
stw %r6, 48(%sp)
stw %r7, 52(%sp)
stw %r8, 56(%sp)
stw %r9, 60(%sp)
stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Reset DIE bit in TSR register.*/
lis %r3, 0x0800 /* DIS bit mask. */
mtspr 336, %r3 /* TSR register. */
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_enter_isr
bl dbg_check_lock_from_isr
#endif
bl chSysTimerHandlerI
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock_from_isr
bl dbg_check_leave_isr
#endif
/* System tick handler invocation.*/
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0
beq cr0, _ivor_exit
bl chSchDoReschedule
b _ivor_exit
/*
* _IVOR4 handler (Book-E external interrupt).
*/
.align 4
.globl _IVOR4
.type _IVOR4, @function
_IVOR4:
/* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */
mfSRR1 %r0
stw %r0, 12(%sp) /* Saves MSR. */
mfCR %r0
stw %r0, 16(%sp) /* Saves CR. */
mfLR %r0
stw %r0, 20(%sp) /* Saves LR. */
mfCTR %r0
stw %r0, 24(%sp) /* Saves CTR. */
mfXER %r0
stw %r0, 28(%sp) /* Saves XER. */
stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
stw %r4, 40(%sp)
stw %r5, 44(%sp)
stw %r6, 48(%sp)
stw %r7, 52(%sp)
stw %r8, 56(%sp)
stw %r9, 60(%sp)
stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Software vector address from the INTC register.*/
lis %r3, INTC_IACKR@h
ori %r3, %r3, INTC_IACKR@l /* IACKR register address. */
lwz %r3, 0(%r3) /* IACKR register value. */
lwz %r3, 0(%r3)
mtCTR %r3 /* Software handler address. */
#if PPC_USE_IRQ_PREEMPTION
/* Allows preemption while executing the software handler.*/
wrteei 1
#endif
/* Exectes the software handler.*/
bctrl
#if PPC_USE_IRQ_PREEMPTION
/* Prevents preemption again.*/
wrteei 0
#endif
/* Informs the INTC that the interrupt has been served.*/
mbar 0
lis %r3, INTC_EOIR@h
ori %r3, %r3, INTC_EOIR@l
stw %r3, 0(%r3) /* Writing any value should do. */
/* Verifies if a reschedule is required.*/
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0
beq cr0, _ivor_exit
bl chSchDoReschedule
/* Context restore.*/
.globl _ivor_exit
_ivor_exit:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
lwz %r4, 40(%sp)
lwz %r5, 44(%sp)
lwz %r6, 48(%sp)
lwz %r7, 52(%sp)
lwz %r8, 56(%sp)
lwz %r9, 60(%sp)
lwz %r10, 64(%sp)
lwz %r11, 68(%sp)
lwz %r12, 72(%sp)
lwz %r0, 8(%sp)
mtSRR0 %r0 /* Restores PC. */
lwz %r0, 12(%sp)
mtSRR1 %r0 /* Restores MSR. */
lwz %r0, 16(%sp)
mtCR %r0 /* Restores CR. */
lwz %r0, 20(%sp)
mtLR %r0 /* Restores LR. */
lwz %r0, 24(%sp)
mtCTR %r0 /* Restores CTR. */
lwz %r0, 28(%sp)
mtXER %r0 /* Restores XER. */
lwz %r0, 32(%sp) /* Restores GPR0. */
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
addi %sp, %sp, 80 /* Back to the previous frame. */
rfi
#endif /* !defined(__DOXYGEN__) */
/** @} */

177
os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld Normal file
View File

@ -0,0 +1,177 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* SPC56EL54 memory setup in LSM mode.
*/
__irq_stack_size__ = 0x0000; /* Not yet used.*/
__process_stack_size__ = 0x0800;
MEMORY
{
flash : org = 0x00000000, len = 768k
ram : org = 0x40000000, len = 128k
}
/*
* Derived constants.
*/
__flash_size__ = LENGTH(flash);
__flash_start__ = ORIGIN(flash);
__flash_end__ = ORIGIN(flash) + LENGTH(flash);
__ram_size__ = LENGTH(ram);
__ram_start__ = ORIGIN(ram);
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
SECTIONS
{
. = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
KEEP(*(.bam))
KEEP(*(.crt0))
. = ALIGN(0x00000800);
KEEP(*(.vectors))
/* Note, have to waste the first 64KB because the IVPR register
requires an alignment of 64KB and the first 64KB cannot be used,
IVOR0 would conflict with the BAM word. Applications could
allocate code or data in the first 64KB by using special sections.*/
. = ALIGN(0x00010000);
__ivpr_base__ = .;
KEEP(*(.handlers))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
} > flash
destructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
} > flash
.text_vle : ALIGN(16) SUBALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
.text : ALIGN(16) SUBALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
.rodata : ALIGN(16) SUBALIGN(16)
{
*(.glue_7t)
*(.glue_7)
*(.gcc*)
*(.rodata)
*(.rodata.*)
*(.rodata1)
} > flash
.sdata2 : ALIGN(16) SUBALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
} > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
} > flash
.romdata : ALIGN(16) SUBALIGN(16)
{
__romdata_start__ = .;
} > flash
.stacks :
{
. = ALIGN(8);
__irq_stack_base__ = .;
. += __irq_stack_size__;
. = ALIGN(8);
__irq_stack_end__ = .;
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
. += __process_stack_size__;
. = ALIGN(8);
__process_stack_end__ = .;
__main_thread_stack_end__ = .;
} > ram
.data : AT(__romdata_start__)
{
. = ALIGN(4);
__data_start__ = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__sdata_start__ = . + 0x8000;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__data_end__ = .;
} > ram
.sbss :
{
__bss_start__ = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
} > ram
.bss :
{
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
__bss_end__ = .;
} > ram
__heap_base__ = __bss_end__;
__heap_end__ = __ram_end__;
}

177
os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld Normal file
View File

@ -0,0 +1,177 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* SPC56EL60 memory setup in LSM mode.
*/
__irq_stack_size__ = 0x0000; /* Not yet used.*/
__process_stack_size__ = 0x0800;
MEMORY
{
flash : org = 0x00000000, len = 1M
ram : org = 0x40000000, len = 128k
}
/*
* Derived constants.
*/
__flash_size__ = LENGTH(flash);
__flash_start__ = ORIGIN(flash);
__flash_end__ = ORIGIN(flash) + LENGTH(flash);
__ram_size__ = LENGTH(ram);
__ram_start__ = ORIGIN(ram);
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
SECTIONS
{
. = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
KEEP(*(.bam))
KEEP(*(.crt0))
. = ALIGN(0x00000800);
KEEP(*(.vectors))
/* Note, have to waste the first 64KB because the IVPR register
requires an alignment of 64KB and the first 64KB cannot be used,
IVOR0 would conflict with the BAM word. Applications could
allocate code or data in the first 64KB by using special sections.*/
. = ALIGN(0x00010000);
__ivpr_base__ = .;
KEEP(*(.handlers))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
} > flash
destructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
} > flash
.text_vle : ALIGN(16) SUBALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
.text : ALIGN(16) SUBALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
.rodata : ALIGN(16) SUBALIGN(16)
{
*(.glue_7t)
*(.glue_7)
*(.gcc*)
*(.rodata)
*(.rodata.*)
*(.rodata1)
} > flash
.sdata2 : ALIGN(16) SUBALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
} > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
} > flash
.romdata : ALIGN(16) SUBALIGN(16)
{
__romdata_start__ = .;
} > flash
.stacks :
{
. = ALIGN(8);
__irq_stack_base__ = .;
. += __irq_stack_size__;
. = ALIGN(8);
__irq_stack_end__ = .;
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
. += __process_stack_size__;
. = ALIGN(8);
__process_stack_end__ = .;
__main_thread_stack_end__ = .;
} > ram
.data : AT(__romdata_start__)
{
. = ALIGN(4);
__data_start__ = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__sdata_start__ = . + 0x8000;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__data_end__ = .;
} > ram
.sbss :
{
__bss_start__ = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
} > ram
.bss :
{
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
__bss_end__ = .;
} > ram
__heap_base__ = __bss_end__;
__heap_end__ = __ram_end__;
}

177
os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld Normal file
View File

@ -0,0 +1,177 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* SPC56EL70 memory setup in LSM mode.
*/
__irq_stack_size__ = 0x0000; /* Not yet used.*/
__process_stack_size__ = 0x0800;
MEMORY
{
flash : org = 0x00000000, len = 2M
ram : org = 0x40000000, len = 192k
}
/*
* Derived constants.
*/
__flash_size__ = LENGTH(flash);
__flash_start__ = ORIGIN(flash);
__flash_end__ = ORIGIN(flash) + LENGTH(flash);
__ram_size__ = LENGTH(ram);
__ram_start__ = ORIGIN(ram);
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
SECTIONS
{
. = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
KEEP(*(.bam))
KEEP(*(.crt0))
. = ALIGN(0x00000800);
KEEP(*(.vectors))
/* Note, have to waste the first 64KB because the IVPR register
requires an alignment of 64KB and the first 64KB cannot be used,
IVOR0 would conflict with the BAM word. Applications could
allocate code or data in the first 64KB by using special sections.*/
. = ALIGN(0x00010000);
__ivpr_base__ = .;
KEEP(*(.handlers))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
} > flash
destructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
} > flash
.text_vle : ALIGN(16) SUBALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
.text : ALIGN(16) SUBALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
.rodata : ALIGN(16) SUBALIGN(16)
{
*(.glue_7t)
*(.glue_7)
*(.gcc*)
*(.rodata)
*(.rodata.*)
*(.rodata1)
} > flash
.sdata2 : ALIGN(16) SUBALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
} > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
} > flash
.romdata : ALIGN(16) SUBALIGN(16)
{
__romdata_start__ = .;
} > flash
.stacks :
{
. = ALIGN(8);
__irq_stack_base__ = .;
. += __irq_stack_size__;
. = ALIGN(8);
__irq_stack_end__ = .;
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
. += __process_stack_size__;
. = ALIGN(8);
__process_stack_end__ = .;
__main_thread_stack_end__ = .;
} > ram
.data : AT(__romdata_start__)
{
. = ALIGN(4);
__data_start__ = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__sdata_start__ = . + 0x8000;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__data_end__ = .;
} > ram
.sbss :
{
__bss_start__ = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
} > ram
.bss :
{
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
__bss_end__ = .;
} > ram
__heap_base__ = __bss_end__;
__heap_end__ = __ram_end__;
}

12
os/ports/GCC/PPC/SPC56ELxx/port.mk Normal file
View File

@ -0,0 +1,12 @@
# List of the ChibiOS/RT SPC56ELxx port files.
PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/bam.s \
${CHIBIOS}/os/ports/GCC/PPC/crt0.s \
${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/ivor.s \
${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/vectors.s
PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx
PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/ld

67
os/ports/GCC/PPC/SPC56ELxx/ppcparams.h Normal file
View File

@ -0,0 +1,67 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file SPC56ELxx/ppcparams.h
* @brief PowerPC parameters for the SPC56ELxx.
*
* @defgroup PPC_SPC56ELxx SPC56ELxx Specific Parameters
* @ingroup PPC_SPECIFIC
* @details This file contains the PowerPC specific parameters for the
* SPC56ELxx platform.
* @{
*/
#ifndef _PPCPARAMS_H_
#define _PPCPARAMS_H_
/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z4
/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 16
/**
* @brief IVORx registers support.
*/
#define PPC_SUPPORTS_IVORS TRUE
/**
* @brief Book E instruction set support.
*/
#define PPC_SUPPORTS_BOOKE TRUE
/**
* @brief VLE instruction set support.
*/
#define PPC_SUPPORTS_VLE TRUE
/**
* @brief Supports VLS Load/Store Multiple Volatile instructions.
*/
#define PPC_SUPPORTS_VLE_MULTI TRUE
#endif /* _PPCPARAMS_H_ */
/** @} */

1089
os/ports/GCC/PPC/SPC56ELxx/vectors.s Normal file
View File

File diff suppressed because it is too large Load Diff