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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4897 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2012-12-09 16:47:22 +00:00
parent 90d2c48354
commit 344fad1995
2 changed files with 58 additions and 9 deletions
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26
os/hal/platforms/SAM4L/hal_lld.c
View File

@ -34,7 +34,12 @@
/*===========================================================================*/ /*===========================================================================*/
#define SAM_PM_UNLOCK(addr) \ #define SAM_PM_UNLOCK(addr) \
PM->PM_UNLOCK = BPM_UNLOCK_KEY(0xAAu) | BPM_UNLOCK_ADDR(addr) PM->PM_UNLOCK = BPM_UNLOCK_KEY(0xAAu) | \
BPM_UNLOCK_ADDR((uint32_t)(addr) - (uint32_t)PM)
#define SAM_SCIF_UNLOCK(addr) \
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu) | \
SCIF_UNLOCK_ADDR((uint32_t)(addr) - (uint32_t)SCIF)
/*===========================================================================*/ /*===========================================================================*/
/* Driver exported variables. */ /* Driver exported variables. */
@ -68,7 +73,7 @@ void sam_enable_module(uint32_t bus_id, uint32_t module) {
mask = *(&PM->PM_CPUMASK + bus_id); mask = *(&PM->PM_CPUMASK + bus_id);
mask |= 1U << module; mask |= 1U << module;
SAM_PM_UNLOCK(((uint32_t)&PM->PM_CPUMASK - (uint32_t)PM) + (4 * bus_id)); SAM_PM_UNLOCK((uint32_t)&PM->PM_CPUMASK + (4 * bus_id));
*(&PM->PM_CPUMASK + bus_id) |= mask; *(&PM->PM_CPUMASK + bus_id) |= mask;
} }
@ -84,7 +89,7 @@ void sam_disable_module(uint32_t bus_id, uint32_t module) {
mask = *(&PM->PM_CPUMASK + bus_id); mask = *(&PM->PM_CPUMASK + bus_id);
mask &= ~(1U << module); mask &= ~(1U << module);
SAM_PM_UNLOCK(((uint32_t)&PM->PM_CPUMASK - (uint32_t)PM) + (4 * bus_id)); SAM_PM_UNLOCK((uint32_t)&PM->PM_CPUMASK + (4 * bus_id));
*(&PM->PM_CPUMASK + bus_id) = mask; *(&PM->PM_CPUMASK + bus_id) = mask;
} }
@ -110,15 +115,15 @@ void sam_clock_init(void) {
#endif #endif
/* Setting up prescalers.*/ /* Setting up prescalers.*/
SAM_PM_UNLOCK((uint32_t)&PM->PM_CPUSEL); SAM_PM_UNLOCK(&PM->PM_CPUSEL);
PM->PM_CPUSEL = SAM_CPUSEL; PM->PM_CPUSEL = SAM_CPUSEL;
SAM_PM_UNLOCK((uint32_t)&PM->PM_PBASEL); SAM_PM_UNLOCK(&PM->PM_PBASEL);
PM->PM_PBASEL = SAM_PBASEL; PM->PM_PBASEL = SAM_PBASEL;
SAM_PM_UNLOCK((uint32_t)&PM->PM_PBBSEL); SAM_PM_UNLOCK(&PM->PM_PBBSEL);
PM->PM_PBBSEL = SAM_PBBSEL; PM->PM_PBBSEL = SAM_PBBSEL;
SAM_PM_UNLOCK((uint32_t)&PM->PM_PBCSEL); SAM_PM_UNLOCK(&PM->PM_PBCSEL);
PM->PM_PBCSEL = SAM_PBCSEL; PM->PM_PBCSEL = SAM_PBCSEL;
SAM_PM_UNLOCK((uint32_t)&PM->PM_PBDSEL); SAM_PM_UNLOCK(&PM->PM_PBDSEL);
PM->PM_PBDSEL = SAM_PBDSEL; PM->PM_PBDSEL = SAM_PBDSEL;
/* Switching to the selected clock source, enabling it if necessary.*/ /* Switching to the selected clock source, enabling it if necessary.*/
@ -126,6 +131,11 @@ void sam_clock_init(void) {
/* Nothing to do, already running from SYSIRC.*/ /* Nothing to do, already running from SYSIRC.*/
#endif #endif
#if SAM_MCCTRL_MCSEL == SAM_MCSEL_OSC0 #if SAM_MCCTRL_MCSEL == SAM_MCSEL_OSC0
SAM_SCIF_UNLOCK(&SCIF->SCIF_OSCCTRL0);
SCIF->SCIF_OSCCTRL0 = SAM_OSCCTRL_GAIN | SAM_OSCCTRL_MODE |
SAM_OSCCTRL_STARTUP | SAM_OSCCTRL_OSCEN;
while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_OSC0RDY))
;
#endif #endif
#if SAM_MCCTRL_MCSEL == SAM_MCSEL_PLL #if SAM_MCCTRL_MCSEL == SAM_MCSEL_PLL
#endif #endif

41
os/hal/platforms/SAM4L/hal_lld.h
View File

@ -26,7 +26,7 @@
* - SAM_OSC32K_CLK. * - SAM_OSC32K_CLK.
* - SAM_OSC32K_MODE_EXT (optional) * - SAM_OSC32K_MODE_EXT (optional)
* - SAM_OSC0_CLK. * - SAM_OSC0_CLK.
* - SAM_OSC0_MODE_EXT (optional) * - SAM_OSCCTRL_MODE
* . * .
* *
* @addtogroup HAL * @addtogroup HAL
@ -222,6 +222,19 @@
#define SAM_PMCON_PS1 (1 << 0) #define SAM_PMCON_PS1 (1 << 0)
/** @} */ /** @} */
/**
* @name OSCCTRL0 registers bits definitions
* @{
*/
#define SAM_OSCCTRL_MODE_EXT (0 << 0)
#define SAM_OSCCTRL_MODE_XTAL (1 << 0)
#define SAM_OSCCTRL_GAIN_0 (0 << 1)
#define SAM_OSCCTRL_GAIN_1 (1 << 1)
#define SAM_OSCCTRL_GAIN_2 (2 << 1)
#define SAM_OSCCTRL_GAIN_3 (3 << 1)
#define SAM_OSCCTRL_OSCEN (1 << 16)
/** @} */
/*===========================================================================*/ /*===========================================================================*/
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */
/*===========================================================================*/ /*===========================================================================*/
@ -321,6 +334,32 @@
#endif #endif
/** @} */ /** @} */
/* OSC0 mode check.*/
#if (SAM_OSCCTRL_MODE != SAM_OSCCTRL_MODE_EXT) && \
(SAM_OSCCTRL_MODE != SAM_OSCCTRL_MODE_XTAL)
#error "invalid SAM_OSCCTRL_MODE value specified"
#endif
/**
* @brief OSC0 gain setting.
*/
#if SAM_OSCCTRL_MODE == SAM_OSCCTRL_MODE_EXT
#define SAM_OSCCTRL_GAIN 0
#else
#if SAM_OSC0_CLK < 12000000
#define SAM_OSCCTRL_GAIN SAM_OSCCTRL_GAIN_0
#elif SAM_OSC0_CLK < 16000000
#define SAM_OSCCTRL_GAIN SAM_OSCCTRL_GAIN_1
#else
#define SAM_OSCCTRL_GAIN SAM_OSCCTRL_GAIN_2
#endif
#endif
/**
* @brief OSC0 startup setting.
*/
#define SAM_OSCCTRL_STARTUP SCIF_OSCCTRL0_STARTUP(2)
/** /**
* @brief Selected RCFAST clock frequency. * @brief Selected RCFAST clock frequency.
*/ */