diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h
index 744502825..282ec5a16 100644
--- a/os/ports/GCC/AVR/chcore.h
+++ b/os/ports/GCC/AVR/chcore.h
@@ -32,6 +32,10 @@
 #include <avr/io.h>
 #include <avr/interrupt.h>
 
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
 /**
  * @brief   If enabled allows the idle thread to enter a low power mode.
  */
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h
index 3fb0f3591..c969a6b16 100644
--- a/os/ports/GCC/MSP430/chcore.h
+++ b/os/ports/GCC/MSP430/chcore.h
@@ -32,6 +32,10 @@
 #include <iomacros.h>
 #include <msp430/common.h>
 
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
 /**
  * @brief   Enables the use of a wait state in the idle thread loop.
  */
diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h
index 01b31bbb7..57ad8db27 100644
--- a/os/ports/GCC/PPC/chcore.h
+++ b/os/ports/GCC/PPC/chcore.h
@@ -29,6 +29,10 @@
 #ifndef _CHCORE_H_
 #define _CHCORE_H_
 
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
 /*
  * Port-related configuration parameters.
  */
diff --git a/os/ports/GCC/SIMIA32/chcore.h b/os/ports/GCC/SIMIA32/chcore.h
index 2a9d3d452..8bfa719f8 100644
--- a/os/ports/GCC/SIMIA32/chcore.h
+++ b/os/ports/GCC/SIMIA32/chcore.h
@@ -26,6 +26,10 @@
 #ifndef _CHCORE_H_
 #define _CHCORE_H_
 
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
 /**
  * Macro defining the a simulated architecture into x86.
  */
diff --git a/os/ports/RC/STM8/chcore.h b/os/ports/RC/STM8/chcore.h
index c8c2ebb16..6af456a55 100644
--- a/os/ports/RC/STM8/chcore.h
+++ b/os/ports/RC/STM8/chcore.h
@@ -31,6 +31,10 @@
 
 #include <intrins.h>
 
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
 /*===========================================================================*/
 /* Port configurable parameters.                                             */
 /*===========================================================================*/
diff --git a/os/ports/cosmic/STM8/chcore.h b/os/ports/cosmic/STM8/chcore.h
index 9073592aa..6a261e00f 100644
--- a/os/ports/cosmic/STM8/chcore.h
+++ b/os/ports/cosmic/STM8/chcore.h
@@ -29,6 +29,10 @@
 #ifndef _CHCORE_H_
 #define _CHCORE_H_
 
+#if CH_DBG_ENABLE_STACK_CHECK
+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
+#endif
+
 /*===========================================================================*/
 /* Port configurable parameters.                                             */
 /*===========================================================================*/
diff --git a/readme.txt b/readme.txt
index ed9718089..f47fead5a 100644
--- a/readme.txt
+++ b/readme.txt
@@ -89,6 +89,8 @@
   (backported to 2.2.4).
 - FIX: Fixed timeout problem in the lwIP interface layer (bug 3302420)
   (backported to 2.2.4).
+- NEW: Now an error is generated at compile time when trying to enable the
+  options CH_DBG_ENABLE_STACK_CHECK on ports that do not support it.
 - NEW: Added a kernel-only Cortex-Mx demo as reference project for users not
   interested in the HAL but just want to use the ChibiOS/RT kernel.
   The demo is named ARMCM3-GENERIC-KERNEL and is defaulted to the STM32, in