git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3488 35acf78f-673a-0410-8e92-d51de3d6d3f4
gdisirio
parent
6eae3c1de5
commit
30e29ea215
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@ -159,15 +159,15 @@
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PIN_PUDR_PULLDOWN(GPIOA_SWCLK) | \
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PIN_PUDR_PULLUP(15))
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#define VAL_GPIOA_ODR 0xFFFFFFFF
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(4, 6) | \
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PIN_AFIO_AF(5, 5) | \
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PIN_AFIO_AF(6, 5) | \
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PIN_AFIO_AF(7, 5))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(10, 10) | \
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PIN_AFIO_AF(11, 10) | \
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PIN_AFIO_AF(12, 10) | \
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PIN_AFIO_AF(13, 0) | \
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PIN_AFIO_AF(14, 0))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_LRCK, 6) | \
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PIN_AFIO_AF(GPIOA_SPC, 5) | \
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PIN_AFIO_AF(GPIOA_SDO, 5) | \
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PIN_AFIO_AF(GPIOA_SDI, 5))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0))
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/*
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* Port B setup.
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@ -175,7 +175,6 @@
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* PB3 - GPIOB_SWO (alternate 0).
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* PB6 - GPIOB_SCL (alternate 4).
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* PB9 - GPIOB_SDA (alternate 4).
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* PB10 - GPIOB_SCK (alternate 5).
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \
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PIN_MODE_INPUT(1) | \
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@ -187,7 +186,7 @@
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PIN_MODE_INPUT(7) | \
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PIN_MODE_INPUT(8) | \
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PIN_MODE_ALTERNATE(GPIOB_SDA) | \
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PIN_MODE_ALTERNATE(GPIOB_SCK) | \
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PIN_MODE_INPUT(10) | \
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PIN_MODE_INPUT(11) | \
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PIN_MODE_INPUT(12) | \
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PIN_MODE_INPUT(13) | \
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@ -206,23 +205,21 @@
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PIN_PUDR_PULLUP(7) | \
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PIN_PUDR_PULLUP(8) | \
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PIN_PUDR_FLOATING(GPIOB_SDA) | \
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PIN_PUDR_FLOATING(GPIOB_SCK) | \
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PIN_PUDR_PULLUP(10) | \
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PIN_PUDR_PULLUP(11) | \
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PIN_PUDR_PULLUP(12) | \
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PIN_PUDR_PULLUP(13) | \
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PIN_PUDR_PULLUP(14) | \
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PIN_PUDR_PULLUP(15))
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#define VAL_GPIOB_ODR 0xFFFFFFFF
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#define VAL_GPIOB_AFRL (PIN_AFIO_AF(3, 0) | \
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PIN_AFIO_AF(6, 4))
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#define VAL_GPIOB_AFRH (PIN_AFIO_AF(9, 4) | \
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PIN_AFIO_AF(10, 5))
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#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_SWO, 0) | \
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PIN_AFIO_AF(GPIOB_SCL, 4))
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#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_SDA, 4))
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/*
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* Port C setup.
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* All input with pull-up except:
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* PC0 - GPIOC_OTG_FS_POWER_ON (output push-pull).
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* PC3 - GPIOC_DOUT (alternate 5).
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* PC7 - GPIOC_MCLK (alternate 6).
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* PC10 - GPIOC_SCLK (alternate 6).
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* PC12 - GPIOC_SDIN (alternate 6).
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@ -230,7 +227,7 @@
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#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\
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PIN_MODE_INPUT(1) | \
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PIN_MODE_INPUT(2) | \
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PIN_MODE_ALTERNATE(GPIOC_DOUT) | \
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PIN_MODE_INPUT(3) | \
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PIN_MODE_INPUT(4) | \
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PIN_MODE_INPUT(5) | \
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PIN_MODE_INPUT(6) | \
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@ -248,7 +245,7 @@
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#define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\
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PIN_PUDR_PULLUP(1) | \
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PIN_PUDR_PULLUP(2) | \
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PIN_PUDR_FLOATING(GPIOC_DOUT) | \
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PIN_PUDR_PULLUP(3) | \
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PIN_PUDR_PULLUP(4) | \
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PIN_PUDR_PULLUP(5) | \
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PIN_PUDR_PULLUP(6) | \
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@ -262,10 +259,9 @@
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PIN_PUDR_PULLUP(14) | \
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PIN_PUDR_PULLUP(15))
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#define VAL_GPIOC_ODR 0xFFFFFFFF
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#define VAL_GPIOC_AFRL (PIN_AFIO_AF(3, 5) | \
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PIN_AFIO_AF(7, 6))
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#define VAL_GPIOC_AFRH (PIN_AFIO_AF(10, 6) | \
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PIN_AFIO_AF(12, 6))
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#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MCLK, 6))
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#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SCLK, 6) | \
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PIN_AFIO_AF(GPIOC_SDIN, 6))
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/*
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* Port D setup.
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@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) {
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(void)p;
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chRegSetThreadName("SPI thread 1");
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while (TRUE) {
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spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */
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spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */
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palSetPad(GPIOD, GPIOD_LED5); /* LED ON. */
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spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */
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spiSelect(&SPID1); /* Slave Select assertion. */
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spiExchange(&SPID1, 512,
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spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */
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spiSelect(&SPID2); /* Slave Select assertion. */
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spiExchange(&SPID2, 512,
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txbuf, rxbuf); /* Atomic transfer operations. */
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spiUnselect(&SPID1); /* Slave Select de-assertion. */
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spiReleaseBus(&SPID1); /* Ownership release. */
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spiUnselect(&SPID2); /* Slave Select de-assertion. */
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spiReleaseBus(&SPID2); /* Ownership release. */
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}
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return 0;
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}
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@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) {
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(void)p;
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chRegSetThreadName("SPI thread 2");
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while (TRUE) {
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spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */
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spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */
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palClearPad(GPIOD, GPIOD_LED5); /* LED OFF. */
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spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */
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spiSelect(&SPID1); /* Slave Select assertion. */
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spiExchange(&SPID1, 512,
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spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */
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spiSelect(&SPID2); /* Slave Select assertion. */
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spiExchange(&SPID2, 512,
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txbuf, rxbuf); /* Atomic transfer operations. */
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spiUnselect(&SPID1); /* Slave Select de-assertion. */
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spiReleaseBus(&SPID1); /* Ownership release. */
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spiUnselect(&SPID2); /* Slave Select de-assertion. */
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spiReleaseBus(&SPID2); /* Ownership release. */
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}
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return 0;
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}
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@ -106,16 +106,16 @@ int main(void) {
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chSysInit();
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/*
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* SPI1 I/O pins setup.
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* SPI2 I/O pins setup.
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*/
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palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* SCK. */
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palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* MISO.*/
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palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* MOSI.*/
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palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* New SCK. */
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palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* New MISO. */
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palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */
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palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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PAL_STM32_OSPEED_HIGHEST); /* New CS. */
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palSetPad(GPIOB, 12);
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/*
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@ -8,7 +8,11 @@ The demo runs on an ST STM32F4-Discovery board.
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** The Demo **
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The application demonstrates the use of the STM32 SPI driver.
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The application demonstrates the use of the STM32F4xx SPI driver.
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** Board Setup **
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- Connect PB14 and PB15 together for SPI loop-back.
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** Build Procedure **
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