USART 3..6 support for STM32F030xC.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8361 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
332f42a405
commit
30b3211be7
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@ -30,6 +30,15 @@
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/* Driver local definitions. */
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* For compatibility for those devices without LIN support in the USARTS.*/
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#if !defined(USART_ISR_LBDF)
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#define USART_ISR_LBDF 0
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#endif
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#if !defined(USART_CR2_LBDIE)
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#define USART_CR2_LBDIE 0
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#endif
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/* STM32L0xx/STM32F7xx ST headers difference.*/
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/* STM32L0xx/STM32F7xx ST headers difference.*/
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#if !defined(USART_ISR_LBDF)
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#if !defined(USART_ISR_LBDF)
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#define USART_ISR_LBDF USART_ISR_LBD
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#define USART_ISR_LBDF USART_ISR_LBD
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@ -315,6 +324,37 @@ OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) {
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}
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}
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#endif
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#endif
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#if defined(STM32_USART3456_HANDLER)
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#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
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STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || defined(__DOXYGEN__)
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/**
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* @brief USART2 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_USART3456_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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#if STM32_SERIAL_USE_USART3
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serve_interrupt(&SD3);
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#endif
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#if STM32_SERIAL_USE_UART4
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serve_interrupt(&SD4);
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#endif
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#if STM32_SERIAL_USE_UART5
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serve_interrupt(&SD5);
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#endif
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#if STM32_SERIAL_USE_USART6
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serve_interrupt(&SD6);
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#endif
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#else /* !defined(STM32_USART3456_HANDLER) */
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#if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__)
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#if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__)
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#if !defined(STM32_USART3_HANDLER)
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#if !defined(STM32_USART3_HANDLER)
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#error "STM32_USART3_HANDLER not defined"
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#error "STM32_USART3_HANDLER not defined"
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@ -391,6 +431,8 @@ OSAL_IRQ_HANDLER(STM32_USART6_HANDLER) {
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}
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}
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#endif
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#endif
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#endif /* !defined(STM32_USART3456_HANDLER) */
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#if STM32_SERIAL_USE_UART7 || defined(__DOXYGEN__)
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#if STM32_SERIAL_USE_UART7 || defined(__DOXYGEN__)
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#if !defined(STM32_UART7_HANDLER)
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#if !defined(STM32_UART7_HANDLER)
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#error "STM32_UART7_HANDLER not defined"
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#error "STM32_UART7_HANDLER not defined"
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@ -444,48 +486,79 @@ void sd_lld_init(void) {
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sdObjectInit(&SD1, NULL, notify1);
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sdObjectInit(&SD1, NULL, notify1);
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SD1.usart = USART1;
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SD1.usart = USART1;
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SD1.clock = STM32_USART1CLK;
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SD1.clock = STM32_USART1CLK;
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#if defined(STM32_USART1_NUMBER)
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nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_USART2
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#if STM32_SERIAL_USE_USART2
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sdObjectInit(&SD2, NULL, notify2);
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sdObjectInit(&SD2, NULL, notify2);
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SD2.usart = USART2;
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SD2.usart = USART2;
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SD2.clock = STM32_USART2CLK;
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SD2.clock = STM32_USART2CLK;
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#if defined(STM32_USART2_NUMBER)
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nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_USART3
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#if STM32_SERIAL_USE_USART3
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sdObjectInit(&SD3, NULL, notify3);
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sdObjectInit(&SD3, NULL, notify3);
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SD3.usart = USART3;
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SD3.usart = USART3;
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SD3.clock = STM32_USART3CLK;
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SD3.clock = STM32_USART3CLK;
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#if defined(STM32_USART3_NUMBER)
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nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART4
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#if STM32_SERIAL_USE_UART4
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sdObjectInit(&SD4, NULL, notify4);
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sdObjectInit(&SD4, NULL, notify4);
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SD4.usart = UART4;
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SD4.usart = UART4;
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SD4.clock = STM32_UART4CLK;
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SD4.clock = STM32_UART4CLK;
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#if defined(STM32_UART4_NUMBER)
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nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART5
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#if STM32_SERIAL_USE_UART5
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sdObjectInit(&SD5, NULL, notify5);
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sdObjectInit(&SD5, NULL, notify5);
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SD5.usart = UART5;
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SD5.usart = UART5;
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SD5.clock = STM32_UART5CLK;
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SD5.clock = STM32_UART5CLK;
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#if defined(STM32_UART5_NUMBER)
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nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_USART6
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#if STM32_SERIAL_USE_USART6
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sdObjectInit(&SD6, NULL, notify6);
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sdObjectInit(&SD6, NULL, notify6);
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SD6.usart = USART6;
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SD6.usart = USART6;
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SD6.clock = STM32_USART6CLK;
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SD6.clock = STM32_USART6CLK;
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#if defined(STM32_USART6_NUMBER)
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nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART7
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#if STM32_SERIAL_USE_UART7
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sdObjectInit(&SD7, NULL, notify7);
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sdObjectInit(&SD7, NULL, notify7);
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SD7.usart = UART7;
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SD7.usart = UART7;
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SD7.clock = STM32_UART7CLK;
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SD7.clock = STM32_UART7CLK;
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#if defined(STM32_UART7_NUMBER)
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nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART8
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#if STM32_SERIAL_USE_UART8
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sdObjectInit(&SD8, NULL, notify8);
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sdObjectInit(&SD8, NULL, notify8);
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SD8.usart = UART8;
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SD8.usart = UART8;
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SD8.clock = STM32_UART8CLK;
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SD8.clock = STM32_UART8CLK;
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#if defined(STM32_UART8_NUMBER)
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nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
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#endif
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#endif
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#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
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STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || defined(__DOXYGEN__)
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#if defined(STM32_USART3456_HANDLER)
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nvicEnableVector(STM32_USART3456_NUMBER, STM32_SERIAL_USART3456_PRIORITY);
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#endif
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#endif
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#endif
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}
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}
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@ -508,49 +581,41 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
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#if STM32_SERIAL_USE_USART1
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#if STM32_SERIAL_USE_USART1
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if (&SD1 == sdp) {
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if (&SD1 == sdp) {
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rccEnableUSART1(FALSE);
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rccEnableUSART1(FALSE);
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nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART2
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#if STM32_SERIAL_USE_USART2
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if (&SD2 == sdp) {
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if (&SD2 == sdp) {
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rccEnableUSART2(FALSE);
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rccEnableUSART2(FALSE);
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nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART3
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#if STM32_SERIAL_USE_USART3
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if (&SD3 == sdp) {
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if (&SD3 == sdp) {
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rccEnableUSART3(FALSE);
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rccEnableUSART3(FALSE);
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nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART4
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#if STM32_SERIAL_USE_UART4
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if (&SD4 == sdp) {
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if (&SD4 == sdp) {
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rccEnableUART4(FALSE);
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rccEnableUART4(FALSE);
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nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART5
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#if STM32_SERIAL_USE_UART5
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if (&SD5 == sdp) {
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if (&SD5 == sdp) {
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rccEnableUART5(FALSE);
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rccEnableUART5(FALSE);
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nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART6
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#if STM32_SERIAL_USE_USART6
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if (&SD6 == sdp) {
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if (&SD6 == sdp) {
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rccEnableUSART6(FALSE);
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rccEnableUSART6(FALSE);
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nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART7
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#if STM32_SERIAL_USE_UART7
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if (&SD7 == sdp) {
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if (&SD7 == sdp) {
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rccEnableUART7(FALSE);
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rccEnableUART7(FALSE);
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nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART8
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#if STM32_SERIAL_USE_UART8
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if (&SD8 == sdp) {
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if (&SD8 == sdp) {
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rccEnableUART8(FALSE);
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rccEnableUART8(FALSE);
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nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
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}
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}
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#endif
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#endif
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}
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}
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void sd_lld_stop(SerialDriver *sdp) {
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void sd_lld_stop(SerialDriver *sdp) {
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if (sdp->state == SD_READY) {
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if (sdp->state == SD_READY) {
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/* UART is de-initialized then clocks are disabled.*/
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usart_deinit(sdp->usart);
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usart_deinit(sdp->usart);
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#if STM32_SERIAL_USE_USART1
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#if STM32_SERIAL_USE_USART1
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if (&SD1 == sdp) {
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if (&SD1 == sdp) {
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rccDisableUSART1(FALSE);
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rccDisableUSART1(FALSE);
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nvicDisableVector(STM32_USART1_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART2
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#if STM32_SERIAL_USE_USART2
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if (&SD2 == sdp) {
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if (&SD2 == sdp) {
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rccDisableUSART2(FALSE);
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rccDisableUSART2(FALSE);
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nvicDisableVector(STM32_USART2_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART3
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#if STM32_SERIAL_USE_USART3
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if (&SD3 == sdp) {
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if (&SD3 == sdp) {
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rccDisableUSART3(FALSE);
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rccDisableUSART3(FALSE);
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nvicDisableVector(STM32_USART3_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART4
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#if STM32_SERIAL_USE_UART4
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if (&SD4 == sdp) {
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if (&SD4 == sdp) {
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rccDisableUART4(FALSE);
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rccDisableUART4(FALSE);
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nvicDisableVector(STM32_UART4_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART5
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#if STM32_SERIAL_USE_UART5
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if (&SD5 == sdp) {
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if (&SD5 == sdp) {
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rccDisableUART5(FALSE);
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rccDisableUART5(FALSE);
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nvicDisableVector(STM32_UART5_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART6
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#if STM32_SERIAL_USE_USART6
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if (&SD6 == sdp) {
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if (&SD6 == sdp) {
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rccDisableUSART6(FALSE);
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rccDisableUSART6(FALSE);
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nvicDisableVector(STM32_USART6_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART7
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#if STM32_SERIAL_USE_UART7
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if (&SD7 == sdp) {
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if (&SD7 == sdp) {
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rccDisableUART7(FALSE);
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rccDisableUART7(FALSE);
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nvicDisableVector(STM32_UART7_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART8
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#if STM32_SERIAL_USE_UART8
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if (&SD8 == sdp) {
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if (&SD8 == sdp) {
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rccDisableUART8(FALSE);
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rccDisableUART8(FALSE);
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nvicDisableVector(STM32_UART8_NUMBER);
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return;
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return;
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}
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}
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#endif
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#endif
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#define STM32_SERIAL_USART3_PRIORITY 12
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#define STM32_SERIAL_USART3_PRIORITY 12
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#endif
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#endif
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/**
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* @brief USART3, 4, 5 and 6 interrupt priority level setting.
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* @note Only valid on those devices with a shared IRQ.
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*/
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#if !defined(STM32_SERIAL_USART3456_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SERIAL_USART3456_PRIORITY 12
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#endif
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/**
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/**
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* @brief UART4 interrupt priority level setting.
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* @brief UART4 interrupt priority level setting.
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*/
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*/
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*/
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*/
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#define STM32_USART2CLK STM32_PCLK
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#define STM32_USART2CLK STM32_PCLK
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/**
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* @brief USART3 frequency.
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*/
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#define STM32_USART3CLK STM32_PCLK
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/**
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* @brief USART4 frequency.
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*/
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#define STM32_UART4CLK STM32_PCLK
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/**
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* @brief USART5 frequency.
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*/
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#define STM32_UART5CLK STM32_PCLK
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/**
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* @brief USART6 frequency.
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*/
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#define STM32_USART6CLK STM32_PCLK
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/**
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/**
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* @brief Timers clock.
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* @brief Timers clock.
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*/
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*/
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*/
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*/
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#define STM32_USART1_HANDLER VectorAC
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#define STM32_USART1_HANDLER VectorAC
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#define STM32_USART2_HANDLER VectorB0
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#define STM32_USART2_HANDLER VectorB0
|
||||||
|
#define STM32_USART3456_HANDLER VectorB4
|
||||||
|
|
||||||
#define STM32_USART1_NUMBER 27
|
#define STM32_USART1_NUMBER 27
|
||||||
#define STM32_USART2_NUMBER 28
|
#define STM32_USART2_NUMBER 28
|
||||||
|
#define STM32_USART3456_NUMBER 29
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* USB units.
|
* USB units.
|
||||||
|
|
|
@ -586,6 +586,112 @@
|
||||||
* @api
|
* @api
|
||||||
*/
|
*/
|
||||||
#define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST)
|
#define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USART3 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableUSART3(lp) rccEnableAPB1(RCC_APB1ENR_USART3EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the USART3 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the USART3 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetUSART3() rccResetAPB1(RCC_APB1RSTR_USART3RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USART4 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableUART4(lp) rccEnableAPB1(RCC_APB1ENR_USART4EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the USART4 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_USART4EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the USART4 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetUART4() rccResetAPB1(RCC_APB1RSTR_USART4RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USART5 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableUART5(lp) rccEnableAPB1(RCC_APB1ENR_USARTS5EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the USART5 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_USART5EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the USART5 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetUART5() rccResetAPB1(RCC_APB1RSTR_USART5RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USART6 peripheral clock.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableUSART6(lp) rccEnableAPB2(RCC_APB2ENR_USART6EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the USART6 peripheral clock.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the USART6 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST)
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -73,6 +73,10 @@
|
||||||
*****************************************************************************
|
*****************************************************************************
|
||||||
|
|
||||||
*** 3.1.0 ***
|
*** 3.1.0 ***
|
||||||
|
- HAL: Now STM32 USARTv2 driver initializes the ISR vectors statically on
|
||||||
|
initialization. Disabling them was not necessary and added to
|
||||||
|
the code size.
|
||||||
|
- HAL: Added serial driver support for USART 3..6 on STM32F030xC devices.
|
||||||
- HAL: Merged the newest ST header files for STM32F1xx.
|
- HAL: Merged the newest ST header files for STM32F1xx.
|
||||||
- HAL: Added support for differential mode to the STM32F3xx ADC driver.
|
- HAL: Added support for differential mode to the STM32F3xx ADC driver.
|
||||||
- HAL: Experimental isochronous capability added to STM32 OTGv1 driver.
|
- HAL: Experimental isochronous capability added to STM32 OTGv1 driver.
|
||||||
|
|
Loading…
Reference in New Issue