USART 3..6 support for STM32F030xC.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8361 35acf78f-673a-0410-8e92-d51de3d6d3f4
2015-10-15 12:23:29 +00:00 · 2015-10-15 12:23:29 +00:00 · 30b3211be7
parent 332f42a405
commit 30b3211be7
6 changed files with 215 additions and 16 deletions
--- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c
@ -30,6 +30,15 @@
 /* Driver local definitions.                                                 */
 /*===========================================================================*/

+/* For compatibility for those devices without LIN support in the USARTS.*/
+#if !defined(USART_ISR_LBDF)
+#define USART_ISR_LBDF                      0
+#endif
+
+#if !defined(USART_CR2_LBDIE)
+#define USART_CR2_LBDIE                     0
+#endif
+
 /* STM32L0xx/STM32F7xx ST headers difference.*/
 #if !defined(USART_ISR_LBDF)
 #define USART_ISR_LBDF USART_ISR_LBD
@ -315,6 +324,37 @@ OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) {
 }
 #endif

+#if defined(STM32_USART3456_HANDLER)
+#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 ||                    \
+    STM32_SERIAL_USE_UART5  || STM32_SERIAL_USE_USART6 || defined(__DOXYGEN__)
+/**
+ * @brief   USART2 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_USART3456_HANDLER) {
+
+  OSAL_IRQ_PROLOGUE();
+
+#if STM32_SERIAL_USE_USART3
+  serve_interrupt(&SD3);
+#endif
+#if STM32_SERIAL_USE_UART4
+  serve_interrupt(&SD4);
+#endif
+#if STM32_SERIAL_USE_UART5
+  serve_interrupt(&SD5);
+#endif
+#if STM32_SERIAL_USE_USART6
+  serve_interrupt(&SD6);
+#endif
+
+  OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#else /* !defined(STM32_USART3456_HANDLER) */
+
 #if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__)
 #if !defined(STM32_USART3_HANDLER)
 #error "STM32_USART3_HANDLER not defined"
@ -391,6 +431,8 @@ OSAL_IRQ_HANDLER(STM32_USART6_HANDLER) {
 }
 #endif

+#endif /* !defined(STM32_USART3456_HANDLER) */
+
 #if STM32_SERIAL_USE_UART7 || defined(__DOXYGEN__)
 #if !defined(STM32_UART7_HANDLER)
 #error "STM32_UART7_HANDLER not defined"
@ -444,48 +486,79 @@ void sd_lld_init(void) {
  sdObjectInit(&SD1, NULL, notify1);
  SD1.usart = USART1;
  SD1.clock = STM32_USART1CLK;
+#if defined(STM32_USART1_NUMBER)
+  nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_USART2
  sdObjectInit(&SD2, NULL, notify2);
  SD2.usart = USART2;
  SD2.clock = STM32_USART2CLK;
+#if defined(STM32_USART2_NUMBER)
+  nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_USART3
  sdObjectInit(&SD3, NULL, notify3);
  SD3.usart = USART3;
  SD3.clock = STM32_USART3CLK;
+#if defined(STM32_USART3_NUMBER)
+  nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_UART4
  sdObjectInit(&SD4, NULL, notify4);
  SD4.usart = UART4;
  SD4.clock = STM32_UART4CLK;
+#if defined(STM32_UART4_NUMBER)
+  nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_UART5
  sdObjectInit(&SD5, NULL, notify5);
  SD5.usart = UART5;
  SD5.clock = STM32_UART5CLK;
+#if defined(STM32_UART5_NUMBER)
+  nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_USART6
  sdObjectInit(&SD6, NULL, notify6);
  SD6.usart = USART6;
  SD6.clock = STM32_USART6CLK;
+#if defined(STM32_USART6_NUMBER)
+  nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_UART7
  sdObjectInit(&SD7, NULL, notify7);
  SD7.usart = UART7;
  SD7.clock = STM32_UART7CLK;
+#if defined(STM32_UART7_NUMBER)
+  nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
+#endif
 #endif

 #if STM32_SERIAL_USE_UART8
  sdObjectInit(&SD8, NULL, notify8);
  SD8.usart = UART8;
  SD8.clock = STM32_UART8CLK;
+#if defined(STM32_UART8_NUMBER)
+  nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
+#endif
+#endif
+
+#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 ||                    \
+    STM32_SERIAL_USE_UART5  || STM32_SERIAL_USE_USART6 || defined(__DOXYGEN__)
+#if defined(STM32_USART3456_HANDLER)
+  nvicEnableVector(STM32_USART3456_NUMBER, STM32_SERIAL_USART3456_PRIORITY);
+#endif
 #endif
 }

@ -508,49 +581,41 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
 #if STM32_SERIAL_USE_USART1
    if (&SD1 == sdp) {
      rccEnableUSART1(FALSE);
-      nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_USART2
    if (&SD2 == sdp) {
      rccEnableUSART2(FALSE);
-      nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_USART3
    if (&SD3 == sdp) {
      rccEnableUSART3(FALSE);
-      nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_UART4
    if (&SD4 == sdp) {
      rccEnableUART4(FALSE);
-      nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_UART5
    if (&SD5 == sdp) {
      rccEnableUART5(FALSE);
-      nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_USART6
    if (&SD6 == sdp) {
      rccEnableUSART6(FALSE);
-      nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_UART7
    if (&SD7 == sdp) {
      rccEnableUART7(FALSE);
-      nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
    }
 #endif
 #if STM32_SERIAL_USE_UART8
    if (&SD8 == sdp) {
      rccEnableUART8(FALSE);
-      nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
    }
 #endif
  }
@ -569,60 +634,54 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
 void sd_lld_stop(SerialDriver *sdp) {

  if (sdp->state == SD_READY) {
+    /* UART is de-initialized then clocks are disabled.*/
    usart_deinit(sdp->usart);
+
 #if STM32_SERIAL_USE_USART1
    if (&SD1 == sdp) {
      rccDisableUSART1(FALSE);
-      nvicDisableVector(STM32_USART1_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_USART2
    if (&SD2 == sdp) {
      rccDisableUSART2(FALSE);
-      nvicDisableVector(STM32_USART2_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_USART3
    if (&SD3 == sdp) {
      rccDisableUSART3(FALSE);
-      nvicDisableVector(STM32_USART3_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_UART4
    if (&SD4 == sdp) {
      rccDisableUART4(FALSE);
-      nvicDisableVector(STM32_UART4_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_UART5
    if (&SD5 == sdp) {
      rccDisableUART5(FALSE);
-      nvicDisableVector(STM32_UART5_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_USART6
    if (&SD6 == sdp) {
      rccDisableUSART6(FALSE);
-      nvicDisableVector(STM32_USART6_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_UART7
    if (&SD7 == sdp) {
      rccDisableUART7(FALSE);
-      nvicDisableVector(STM32_UART7_NUMBER);
      return;
    }
 #endif
 #if STM32_SERIAL_USE_UART8
    if (&SD8 == sdp) {
      rccDisableUART8(FALSE);
-      nvicDisableVector(STM32_UART8_NUMBER);
      return;
    }
 #endif
--- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h
@ -132,6 +132,14 @@
 #define STM32_SERIAL_USART3_PRIORITY        12
 #endif

+/**
+ * @brief   USART3, 4, 5 and 6 interrupt priority level setting.
+ * @note    Only valid on those devices with a shared IRQ.
+ */
+#if !defined(STM32_SERIAL_USART3456_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_SERIAL_USART3456_PRIORITY     12
+#endif
+
 /**
 * @brief   UART4 interrupt priority level setting.
 */
--- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
@ -805,6 +805,26 @@
 */
 #define STM32_USART2CLK             STM32_PCLK

+/**
+ * @brief   USART3 frequency.
+ */
+#define STM32_USART3CLK             STM32_PCLK
+
+/**
+ * @brief   USART4 frequency.
+ */
+#define STM32_UART4CLK              STM32_PCLK
+
+/**
+ * @brief   USART5 frequency.
+ */
+#define STM32_UART5CLK              STM32_PCLK
+
+/**
+ * @brief   USART6 frequency.
+ */
+#define STM32_USART6CLK             STM32_PCLK
+
 /**
 * @brief   Timers clock.
 */
--- a/os/hal/ports/STM32/STM32F0xx/stm32_isr.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_isr.h
@ -66,9 +66,11 @@
 */
 #define STM32_USART1_HANDLER        VectorAC
 #define STM32_USART2_HANDLER        VectorB0
+#define STM32_USART3456_HANDLER     VectorB4

 #define STM32_USART1_NUMBER         27
 #define STM32_USART2_NUMBER         28
+#define STM32_USART3456_NUMBER      29

 /*
 * USB units.
--- a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h
@ -586,6 +586,112 @@
 * @api
 */
 #define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST)
+
+/**
+ * @brief   Enables the USART3 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUSART3(lp) rccEnableAPB1(RCC_APB1ENR_USART3EN, lp)
+
+/**
+ * @brief   Disables the USART3 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
+
+/**
+ * @brief   Resets the USART3 peripheral.
+ *
+ * @api
+ */
+#define rccResetUSART3() rccResetAPB1(RCC_APB1RSTR_USART3RST)
+
+/**
+ * @brief   Enables the USART4 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUART4(lp) rccEnableAPB1(RCC_APB1ENR_USART4EN, lp)
+
+/**
+ * @brief   Disables the USART4 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_USART4EN, lp)
+
+/**
+ * @brief   Resets the USART4 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART4() rccResetAPB1(RCC_APB1RSTR_USART4RST)
+
+/**
+ * @brief   Enables the USART5 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUART5(lp) rccEnableAPB1(RCC_APB1ENR_USARTS5EN, lp)
+
+/**
+ * @brief   Disables the USART5 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_USART5EN, lp)
+
+/**
+ * @brief   Resets the USART5 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART5() rccResetAPB1(RCC_APB1RSTR_USART5RST)
+
+/**
+ * @brief   Enables the USART6 peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUSART6(lp) rccEnableAPB2(RCC_APB2ENR_USART6EN, lp)
+
+/**
+ * @brief   Disables the USART6 peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp)
+
+/**
+ * @brief   Resets the USART6 peripheral.
+ *
+ * @api
+ */
+#define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST)
 /** @} */

 /**
--- a/readme.txt
+++ b/readme.txt
@ -73,6 +73,10 @@
 *****************************************************************************

 *** 3.1.0 ***
+- HAL: Now STM32 USARTv2 driver initializes the ISR vectors statically on
+       initialization. Disabling them was not necessary and added to
+       the code size.
+- HAL: Added serial driver support for USART 3..6 on STM32F030xC devices.
 - HAL: Merged the newest ST header files for STM32F1xx.
 - HAL: Added support for differential mode to the STM32F3xx ADC driver.
 - HAL: Experimental isochronous capability added to STM32 OTGv1 driver.