Merging changes from I2C branch.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3265 35acf78f-673a-0410-8e92-d51de3d6d3f4master
barthess
commit
306f666c2c
|
|
@ -22,7 +22,16 @@
|
|||
* @defgroup I2C I2C Driver
|
||||
* @brief Generic I2C Driver.
|
||||
* @details This module implements a generic I2C (Inter-Integrated Circuit)
|
||||
* driver.
|
||||
* driver. On STM32 platform you can choose method of waiting START
|
||||
* and STOP bits: polling wait or wait using GPT. GPT method use
|
||||
* one timer per I2C interface, on the other hand -- polling is
|
||||
* block function that starts transfer.
|
||||
* @note If you decide to use polling wait -- do NOT start transmit or
|
||||
* receive from callback because it run in ISR context.
|
||||
* @note You must set I2C interrupts priority to highest level in the
|
||||
* system.
|
||||
* @note If you use GPT than set GPT interrupts priority level over I2C
|
||||
* interrupts priority level.
|
||||
* @pre In order to use the I2C driver the @p HAL_USE_I2C option
|
||||
* must be enabled in @p halconf.h.
|
||||
*
|
||||
|
|
@ -31,12 +40,31 @@
|
|||
* functionalities can be used in any moment, any transition not explicitly
|
||||
* shown in the following diagram has to be considered an error and shall
|
||||
* be captured by an assertion (if enabled).
|
||||
* @if LATEX_PDF
|
||||
* @else
|
||||
* @endif
|
||||
*
|
||||
* @dot
|
||||
digraph example {
|
||||
rankdir="LR";
|
||||
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="false",
|
||||
width="0.9", height="0.9"];
|
||||
edge [fontname=Helvetica, fontsize=8];
|
||||
|
||||
uninit [label="I2C_UNINIT", style="bold"];
|
||||
stop [label="I2C_STOP\nLow Power"];
|
||||
ready [label="I2C_READY\nClock Enabled"];
|
||||
active_tx [label="I2C_ACTIVE_TRANSMIT\nBus TX Active"];
|
||||
active_rx [label="I2C_ACTIVE_RECEIVE\nBus RX Active"];
|
||||
|
||||
uninit -> stop [label="i2cInit()"];
|
||||
stop -> stop [label="i2cStop()"];
|
||||
stop -> ready [label="i2cStart()"];
|
||||
ready -> active_tx [label="i2cMasterTransmit()"];
|
||||
ready -> active_rx [label="i2cMasterReceive()"];
|
||||
active_tx -> ready [label="_i2c_isr_code()"];
|
||||
active_rx -> ready [label="_i2c_isr_code()"];
|
||||
ready -> stop [label="i2cStop()"];
|
||||
}
|
||||
* @enddot
|
||||
* The driver is not thread safe for performance reasons, if you need to access
|
||||
* the I2C bus from multiple thread then use the @p i2cAcquireBus() and
|
||||
* the I2C bus from multiple threads then use the @p i2cAcquireBus() and
|
||||
* @p i2cReleaseBus() APIs in order to gain exclusive access.
|
||||
*
|
||||
* @ingroup IO
|
||||
|
|
|
|||
|
|
@ -34,7 +34,24 @@
|
|||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
#define I2CD_NO_ERROR 0
|
||||
/** @brief Bus Error.*/
|
||||
#define I2CD_BUS_ERROR 0x01
|
||||
/** @brief Arbitration Lost (master mode).*/
|
||||
#define I2CD_ARBITRATION_LOST 0x02
|
||||
/** @brief Acknowledge Failure.*/
|
||||
#define I2CD_ACK_FAILURE 0x04
|
||||
/** @brief Overrun/Underrun.*/
|
||||
#define I2CD_OVERRUN 0x08
|
||||
/** @brief PEC Error in reception.*/
|
||||
#define I2CD_PEC_ERROR 0x10
|
||||
/** @brief Timeout or Tlow Error.*/
|
||||
#define I2CD_TIMEOUT 0x20
|
||||
/** @brief SMBus Alert.*/
|
||||
#define I2CD_SMB_ALERT 0x40
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
|
@ -49,6 +66,9 @@
|
|||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
#if I2C_USE_MUTUAL_EXCLUSION && !CH_USE_MUTEXES && !CH_USE_SEMAPHORES
|
||||
#error "I2C_USE_MUTUAL_EXCLUSION requires CH_USE_MUTEXES and/or CH_USE_SEMAPHORES"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
|
|
@ -58,62 +78,177 @@
|
|||
* @brief Driver state machine possible states.
|
||||
*/
|
||||
typedef enum {
|
||||
I2C_UNINIT = 0, /**< Not initialized. */
|
||||
I2C_STOP = 1, /**< Stopped. */
|
||||
I2C_READY = 2, /**< Ready. */
|
||||
I2C_MREADY = 3, /**< START and address sent. */
|
||||
I2C_MTRANSMIT = 4, /**< Master transmitting. */
|
||||
I2C_MRECEIVE = 5, /**< Master receiving. */
|
||||
I2C_MERROR = 6 /**< Error condition. */
|
||||
/* master part */
|
||||
I2C_UNINIT = 0, /**< @brief Not initialized. */
|
||||
I2C_STOP = 1, /**< @brief Stopped. */
|
||||
I2C_READY = 2, /**< @brief Ready. */
|
||||
I2C_ACTIVE_TRANSMIT = 3, /**< @brief Transmit in progress. */
|
||||
I2C_ACTIVE_RECEIVE = 4, /**< @brief Receive in progress. */
|
||||
I2C_ACTIVE_TRANSCEIVE = 5, /**< @brief Receive after transmit in progress. */
|
||||
|
||||
/* Slave part. Not realized. */
|
||||
I2C_SACTIVE = 10,
|
||||
I2C_STRANSMIT = 11,
|
||||
I2C_SRECEIVE = 12,
|
||||
} i2cstate_t;
|
||||
|
||||
|
||||
#include "i2c_lld.h"
|
||||
|
||||
/**
|
||||
* @brief I2C notification callback type.
|
||||
* @details This callback invoked when byte transfer finish event occurs,
|
||||
* No matter sending or reading.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object triggering the
|
||||
* callback
|
||||
* @param[in] i2cscfg pointer to the @p I2CSlaveConfig object triggering the
|
||||
* callback
|
||||
*/
|
||||
typedef void (*i2ccallback_t)(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg);
|
||||
|
||||
|
||||
/**
|
||||
* @brief I2C error notification callback type.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object triggering the
|
||||
* callback
|
||||
* @param[in] i2cscfg pointer to the @p I2CSlaveConfig object triggering the
|
||||
* callback
|
||||
*/
|
||||
typedef void (*i2cerrorcallback_t)(I2CDriver *i2cp,
|
||||
const I2CSlaveConfig *i2cscfg);
|
||||
|
||||
|
||||
/**
|
||||
* @brief I2C transmission data block size.
|
||||
*/
|
||||
typedef uint8_t i2cblock_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Structure representing an I2C slave configuration.
|
||||
* @details Each slave device has its own config structure with input and
|
||||
* output buffers for temporally storing data.
|
||||
*/
|
||||
struct I2CSlaveConfig{
|
||||
/**
|
||||
* @brief Callback pointer.
|
||||
* @note Transfer finished callback. Invoke when all data transferred.
|
||||
* If set to @p NULL then the callback is disabled.
|
||||
*/
|
||||
i2ccallback_t id_callback;
|
||||
|
||||
/**
|
||||
* @brief Callback pointer.
|
||||
* @note This callback will be invoked when error condition occur.
|
||||
* If set to @p NULL then the callback is disabled.
|
||||
*/
|
||||
i2cerrorcallback_t id_err_callback;
|
||||
#if defined(I2C_SLAVECONFIG_EXT_FIELDS)
|
||||
I2C_SLAVECONFIG_EXT_FIELDS
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if I2C_USE_WAIT || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Read mode.
|
||||
* @brief Waits for operation completion.
|
||||
* @details This function waits for the driver to complete the current
|
||||
* operation.
|
||||
* @pre An operation must be running while the function is invoked.
|
||||
* @note No more than one thread can wait on a I2C driver using
|
||||
* this function.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define I2C_READ 1
|
||||
#define _i2c_wait_s(i2cp) { \
|
||||
chDbgAssert((i2cp)->id_thread == NULL, \
|
||||
"_i2c_wait(), #1", "already waiting"); \
|
||||
chSysLock(); \
|
||||
(i2cp)->id_thread = chThdSelf(); \
|
||||
chSchGoSleepS(THD_STATE_SUSPENDED); \
|
||||
chSysUnlock(); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write mode.
|
||||
* @brief Wakes up the waiting thread.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define I2C_WRITE 0
|
||||
#define _i2c_wakeup_isr(i2cp) { \
|
||||
if ((i2cp)->id_thread != NULL) { \
|
||||
Thread *tp = (i2cp)->id_thread; \
|
||||
(i2cp)->id_thread = NULL; \
|
||||
chSysLockFromIsr(); \
|
||||
chSchReadyI(tp); \
|
||||
chSysUnlockFromIsr(); \
|
||||
} \
|
||||
}
|
||||
#else /* !I2C_USE_WAIT */
|
||||
#define _i2c_wait_s(i2cp)
|
||||
#define _i2c_wakeup_isr(i2cp)
|
||||
#endif /* !I2C_USE_WAIT */
|
||||
|
||||
/**
|
||||
* @brief Seven bits addresses header builder.
|
||||
* @brief Common ISR code.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
* - Callback invocation.
|
||||
* - Waiting thread wakeup, if any.
|
||||
* - Driver state transitions.
|
||||
*
|
||||
* @param[in] addr seven bits address value
|
||||
* @param[in] rw read/write flag
|
||||
* @note This macro is meant to be used in the low level drivers
|
||||
* implementation only.
|
||||
*
|
||||
* @return A 16 bit value representing the header, the most
|
||||
* significant byte is always zero.
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define I2C_ADDR7(addr, rw) (uint16_t)((addr) << 1 | (rw))
|
||||
|
||||
#define _i2c_isr_code(i2cp, i2cscfg) { \
|
||||
if(((i2cp)->id_slave_config)->id_callback) { \
|
||||
((i2cp)->id_slave_config)->id_callback(i2cp, i2cscfg); \
|
||||
(i2cp)->id_state = I2C_READY; \
|
||||
} \
|
||||
else \
|
||||
(i2cp)->id_state = I2C_READY; \
|
||||
_i2c_wakeup_isr(i2cp); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Ten bits addresses header builder.
|
||||
* @brief Error ISR code.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
* - Error callback invocation.
|
||||
* - Waiting thread wakeup, if any.
|
||||
* - Driver state transitions.
|
||||
*
|
||||
* @param[in] addr ten bits address value
|
||||
* @param[in] rw read/write flag
|
||||
* @note This macro is meant to be used in the low level drivers
|
||||
* implementation only.
|
||||
*
|
||||
* @return A 16 bit value representing the header, the most
|
||||
* significant byte is the first one to be transmitted.
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define I2C_ADDR10(addr, rw) \
|
||||
(uint16_t)(0xF000 | \
|
||||
(((addr) & 0x0300) << 1) | \
|
||||
(((rw) << 8)) | \
|
||||
((addr) & 0x00FF))
|
||||
#define _i2c_isr_err_code(i2cp, i2cscfg) { \
|
||||
if(((i2cp)->id_slave_config)->id_err_callback) { \
|
||||
((i2cp)->id_slave_config)->id_err_callback(i2cp, i2cscfg); \
|
||||
(i2cp)->id_state = I2C_READY; \
|
||||
} \
|
||||
else \
|
||||
(i2cp)->id_state = I2C_READY; \
|
||||
_i2c_wakeup_isr(i2cp); \
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
|
@ -121,19 +256,21 @@ extern "C" {
|
|||
void i2cObjectInit(I2CDriver *i2cp);
|
||||
void i2cStart(I2CDriver *i2cp, const I2CConfig *config);
|
||||
void i2cStop(I2CDriver *i2cp);
|
||||
void i2cMasterStartI(I2CDriver *i2cp,
|
||||
uint16_t header,
|
||||
i2ccallback_t callback);
|
||||
void i2cMasterStopI(I2CDriver *i2cp, i2ccallback_t callback);
|
||||
void i2cMasterRestartI(I2CDriver *i2cp, i2ccallback_t callback);
|
||||
void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf,
|
||||
i2ccallback_t callback);
|
||||
void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf,
|
||||
i2ccallback_t callback);
|
||||
void i2cMasterTransmit(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg,
|
||||
uint16_t slave_addr,
|
||||
uint8_t *txbuf, size_t txbytes,
|
||||
uint8_t *rxbuf, size_t rxbytes);
|
||||
void i2cMasterReceive(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg,
|
||||
uint16_t slave_addr, uint8_t *rxbuf, size_t rxbytes);
|
||||
void i2cMasterStart(I2CDriver *i2cp);
|
||||
void i2cMasterStop(I2CDriver *i2cp);
|
||||
void i2cAddFlagsI(I2CDriver *i2cp, i2cflags_t mask);
|
||||
|
||||
#if I2C_USE_MUTUAL_EXCLUSION
|
||||
void i2cAcquireBus(I2CDriver *i2cp);
|
||||
void i2cReleaseBus(I2CDriver *i2cp);
|
||||
#endif /* I2C_USE_MUTUAL_EXCLUSION */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,293 @@
|
|||
/**
|
||||
* @file STM32/i2c_lld.h
|
||||
* @brief STM32 I2C subsystem low level driver header.
|
||||
* @addtogroup I2C
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _I2C_LLD_H_
|
||||
#define _I2C_LLD_H_
|
||||
|
||||
#if HAL_USE_I2C || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @brief Switch between callback based and synchronouse driver.
|
||||
* @note The default is synchronouse.
|
||||
*/
|
||||
#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define I2C_SUPPORTS_CALLBACKS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C1 driver synchronization choice between GPT and polling.
|
||||
* @note The default is polling wait.
|
||||
*/
|
||||
#if !defined(STM32_I2C_I2C1_USE_GPT_TIM) || \
|
||||
!defined(STM32_I2C_I2C1_USE_POLLING_WAIT) || \
|
||||
defined(__DOXYGEN__)
|
||||
#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C2 driver synchronization choice between GPT and polling.
|
||||
* @note The default is polling wait.
|
||||
*/
|
||||
#if !defined(STM32_I2C_I2C2_USE_GPT_TIM) || \
|
||||
!defined(STM32_I2C_I2C2_USE_POLLING_WAIT) || \
|
||||
defined(__DOXYGEN__)
|
||||
#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for I2C1 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)
|
||||
#define STM32_I2C_USE_I2C1 TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C2 driver enable switch.
|
||||
* @details If set to @p TRUE the support for I2C2 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)
|
||||
#define STM32_I2C_USE_I2C2 TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C1 interrupt priority level setting.
|
||||
* @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
|
||||
*/
|
||||
#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 0xA0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C2 interrupt priority level setting.
|
||||
* @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
|
||||
*/
|
||||
#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 0xA0
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @brief EV5 */
|
||||
#define I2C_EV5_MASTER_MODE_SELECT ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_SB)) /* BUSY, MSL and SB flag */
|
||||
/** @brief EV6 */
|
||||
#define I2C_EV6_MASTER_TRA_MODE_SELECTED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY|I2C_SR2_TRA)<< 16)|I2C_SR1_ADDR|I2C_SR1_TXE)) /* BUSY, MSL, ADDR, TXE and TRA flags */
|
||||
#define I2C_EV6_MASTER_REC_MODE_SELECTED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_ADDR)) /* BUSY, MSL and ADDR flags */
|
||||
/** @brief EV7 */
|
||||
#define I2C_EV7_MASTER_REC_BYTE_RECEIVED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_RXNE)) /* BUSY, MSL and RXNE flags */
|
||||
#define I2C_EV7_MASTER_REC_BYTE_QUEUED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_BTF|I2C_SR1_RXNE)) /* BUSY, MSL, RXNE and BTF flags*/
|
||||
/** @brief EV8 */
|
||||
#define I2C_EV8_MASTER_BYTE_TRANSMITTING ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY|I2C_SR2_TRA)<< 16)|I2C_SR1_TXE)) /* TRA, BUSY, MSL, TXE flags */
|
||||
/** @brief EV8_2 */
|
||||
#define I2C_EV8_2_MASTER_BYTE_TRANSMITTED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY|I2C_SR2_TRA)<< 16)|I2C_SR1_BTF|I2C_SR1_TXE)) /* TRA, BUSY, MSL, TXE and BTF flags */
|
||||
/** @brief EV9 */
|
||||
#define I2C_EV9_MASTER_ADDR_10BIT ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_ADD10)) /* BUSY, MSL and ADD10 flags */
|
||||
#define I2C_EV_MASK 0x00FFFFFF /* First byte zeroed because there is no need of PEC register part from SR2 */
|
||||
|
||||
#define I2C_FLG_1BTR 0x01 /* Single byte to be received and processed */
|
||||
#define I2C_FLG_2BTR 0x02 /* Two bytes to be received and processed */
|
||||
#define I2C_FLG_3BTR 0x04 /* Last three received bytes to be processed */
|
||||
#define I2C_FLG_MASTER_RECEIVER 0x10
|
||||
#define I2C_FLG_HEADER_SENT 0x80
|
||||
#define I2C_FLG_TIMER_ARMED 0x40 /* Used to check locks on the bus */
|
||||
|
||||
#define EV6_SUBEV_MASK (I2C_FLG_1BTR|I2C_FLG_2BTR|I2C_FLG_MASTER_RECEIVER)
|
||||
#define EV7_SUBEV_MASK (I2C_FLG_2BTR|I2C_FLG_3BTR|I2C_FLG_MASTER_RECEIVER)
|
||||
|
||||
#define I2C_EV6_1_MASTER_REC_2BTR_MODE_SELECTED (I2C_FLG_2BTR|I2C_FLG_MASTER_RECEIVER)
|
||||
#define I2C_EV6_3_MASTER_REC_1BTR_MODE_SELECTED (I2C_FLG_1BTR|I2C_FLG_MASTER_RECEIVER)
|
||||
#define I2C_EV7_2_MASTER_REC_3BYTES_TO_PROCESS (I2C_FLG_3BTR|I2C_FLG_MASTER_RECEIVER)
|
||||
#define I2C_EV7_3_MASTER_REC_2BYTES_TO_PROCESS (I2C_FLG_2BTR|I2C_FLG_MASTER_RECEIVER)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief I2C Driver condition flags type.
|
||||
*/
|
||||
typedef uint32_t i2cflags_t;
|
||||
|
||||
typedef enum {
|
||||
OPMODE_I2C = 1,
|
||||
OPMODE_SMBUS_DEVICE = 2,
|
||||
OPMODE_SMBUS_HOST = 3,
|
||||
} i2copmode_t;
|
||||
|
||||
typedef enum {
|
||||
STD_DUTY_CYCLE = 1,
|
||||
FAST_DUTY_CYCLE_2 = 2,
|
||||
FAST_DUTY_CYCLE_16_9 = 3,
|
||||
} i2cdutycycle_t;
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
i2copmode_t op_mode; /**< @brief Specifies the I2C mode.*/
|
||||
uint32_t clock_speed; /**< @brief Specifies the clock frequency. Must be set to a value lower than 400kHz */
|
||||
i2cdutycycle_t duty_cycle; /**< @brief Specifies the I2C fast mode duty cycle */
|
||||
uint8_t own_addr_7; /**< @brief Specifies the first device 7-bit own address. */
|
||||
uint16_t own_addr_10; /**< @brief Specifies the second part of device own address in 10-bit mode. Set to NULL if not used. */
|
||||
uint16_t ack; /**< @brief Enables or disables the acknowledgment. */
|
||||
uint8_t nbit_own_addr; /**< @brief Specifies if 7-bit or 10-bit address is acknowledged */
|
||||
} I2CConfig;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an I2C driver.
|
||||
*/
|
||||
typedef struct I2CDriver I2CDriver;
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an I2C slave config.
|
||||
*/
|
||||
typedef struct I2CSlaveConfig I2CSlaveConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing an I2C driver.
|
||||
*/
|
||||
struct I2CDriver{
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
i2cstate_t id_state;
|
||||
|
||||
#if I2C_USE_WAIT
|
||||
/**
|
||||
* @brief Thread waiting for I/O completion.
|
||||
*/
|
||||
Thread *id_thread;
|
||||
#endif /* I2C_USE_WAIT */
|
||||
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
|
||||
#if CH_USE_MUTEXES || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the bus.
|
||||
*/
|
||||
Mutex id_mutex;
|
||||
#elif CH_USE_SEMAPHORES
|
||||
Semaphore id_semaphore;
|
||||
#endif
|
||||
#endif /* I2C_USE_MUTUAL_EXCLUSION */
|
||||
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const I2CConfig *id_config;
|
||||
/**
|
||||
* @brief Current slave configuration data.
|
||||
*/
|
||||
const I2CSlaveConfig *id_slave_config;
|
||||
|
||||
__IO size_t txbytes; /*!< @brief Number of bytes to be transmitted. */
|
||||
__IO size_t rxbytes; /*!< @brief Number of bytes to be received. */
|
||||
uint8_t *rxbuf; /*!< @brief Pointer to receive buffer. */
|
||||
uint8_t *txbuf; /*!< @brief Pointer to transmit buffer.*/
|
||||
uint8_t *rxbuff_p; /*!< @brief Pointer to the current byte in slave rx buffer. */
|
||||
uint8_t *txbuff_p; /*!< @brief Pointer to the current byte in slave tx buffer. */
|
||||
|
||||
__IO i2cflags_t errors; /*!< @brief Error flags.*/
|
||||
__IO i2cflags_t flags; /*!< @brief State flags.*/
|
||||
|
||||
uint16_t slave_addr; /*!< @brief Current slave address. */
|
||||
uint8_t slave_addr1;/*!< @brief 7-bit address of the slave with r\w bit.*/
|
||||
uint8_t slave_addr2;/*!< @brief Uses in 10-bit address mode. */
|
||||
|
||||
#if CH_USE_EVENTS
|
||||
EventSource sevent; /*!< @brief Status Change @p EventSource.*/
|
||||
#endif
|
||||
|
||||
/*********** End of the mandatory fields. **********************************/
|
||||
|
||||
/**
|
||||
* @brief Pointer to the I2Cx registers block.
|
||||
*/
|
||||
I2C_TypeDef *id_i2c;
|
||||
|
||||
#if !(STM32_I2C_I2C1_USE_POLLING_WAIT)
|
||||
/* TODO: capability to switch this GPT fields off */
|
||||
/**
|
||||
* @brief Timer for waiting STOP condition on the bus.
|
||||
* @details This is workaround for STM32 buggy I2C cell.
|
||||
*/
|
||||
GPTDriver *timer;
|
||||
|
||||
/**
|
||||
* @brief Config for workaround timer.
|
||||
*/
|
||||
const GPTConfig *timer_cfg;
|
||||
#endif /* !(STM32_I2C_I2C1_USE_POLLING_WAIT) */
|
||||
};
|
||||
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define i2c_lld_bus_is_busy(i2cp) \
|
||||
(i2cp->id_i2c->SR2 & I2C_SR2_BUSY)
|
||||
|
||||
|
||||
/* Wait until BUSY flag is reset: a STOP has been generated on the bus
|
||||
* signaling the end of transmission. Normally this wait function
|
||||
* does not block thread, only if slave not response it does.
|
||||
*/
|
||||
#define i2c_lld_wait_bus_free(i2cp) { \
|
||||
uint32_t tmo = 0xfffff; \
|
||||
while((i2cp->id_i2c->SR2 & I2C_SR2_BUSY) && tmo--) \
|
||||
; \
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @cond never*/
|
||||
#if STM32_I2C_USE_I2C1
|
||||
extern I2CDriver I2CD1;
|
||||
#endif
|
||||
|
||||
#if STM32_I2C_USE_I2C2
|
||||
extern I2CDriver I2CD2;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void i2c_lld_init(void);
|
||||
void i2c_lld_reset(I2CDriver *i2cp);
|
||||
void i2c_lld_set_clock(I2CDriver *i2cp);
|
||||
void i2c_lld_set_opmode(I2CDriver *i2cp);
|
||||
void i2c_lld_set_own_address(I2CDriver *i2cp);
|
||||
void i2c_lld_start(I2CDriver *i2cp);
|
||||
void i2c_lld_stop(I2CDriver *i2cp);
|
||||
void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr,
|
||||
uint8_t *txbuf, size_t txbytes, uint8_t *rxbuf, size_t rxbytes);
|
||||
void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr,
|
||||
uint8_t *rxbuf, size_t rxbytes);
|
||||
void i2c_lld_master_transceive(I2CDriver *i2cp);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/** @endcond*/
|
||||
|
||||
#endif /* CH_HAL_USE_I2C */
|
||||
|
||||
#endif /* _I2C_LLD_H_ */
|
||||
|
|
@ -4,6 +4,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F1xx/hal_lld.c \
|
|||
${CHIBIOS}/os/hal/platforms/STM32/can_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/i2c_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/serial_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/GPIOv1/pal_lld.c \
|
||||
|
|
|
|||
241
os/hal/src/i2c.c
241
os/hal/src/i2c.c
|
|
@ -59,7 +59,6 @@
|
|||
* @init
|
||||
*/
|
||||
void i2cInit(void) {
|
||||
|
||||
i2c_lld_init();
|
||||
}
|
||||
|
||||
|
|
@ -72,8 +71,26 @@ void i2cInit(void) {
|
|||
*/
|
||||
void i2cObjectInit(I2CDriver *i2cp) {
|
||||
|
||||
i2cp->i2c_state = I2C_STOP;
|
||||
i2cp->i2c_config = NULL;
|
||||
i2cp->id_state = I2C_STOP;
|
||||
i2cp->id_config = NULL;
|
||||
i2cp->rxbuff_p = NULL;
|
||||
i2cp->txbuff_p = NULL;
|
||||
i2cp->rxbuf = NULL;
|
||||
i2cp->txbuf = NULL;
|
||||
i2cp->id_slave_config = NULL;
|
||||
|
||||
#if I2C_USE_WAIT
|
||||
i2cp->id_thread = NULL;
|
||||
#endif /* I2C_USE_WAIT */
|
||||
|
||||
#if I2C_USE_MUTUAL_EXCLUSION
|
||||
#if CH_USE_MUTEXES
|
||||
chMtxInit(&i2cp->id_mutex);
|
||||
#else
|
||||
chSemInit(&i2cp->id_semaphore, 1);
|
||||
#endif /* CH_USE_MUTEXES */
|
||||
#endif /* I2C_USE_MUTUAL_EXCLUSION */
|
||||
|
||||
#if defined(I2C_DRIVER_EXT_INIT_HOOK)
|
||||
I2C_DRIVER_EXT_INIT_HOOK(i2cp);
|
||||
#endif
|
||||
|
|
@ -90,14 +107,18 @@ void i2cObjectInit(I2CDriver *i2cp) {
|
|||
void i2cStart(I2CDriver *i2cp, const I2CConfig *config) {
|
||||
|
||||
chDbgCheck((i2cp != NULL) && (config != NULL), "i2cStart");
|
||||
|
||||
chSysLock();
|
||||
chDbgAssert((i2cp->i2c_state == I2C_STOP) || (i2cp->i2c_state == I2C_READY),
|
||||
chDbgAssert((i2cp->id_state == I2C_STOP) || (i2cp->id_state == I2C_READY),
|
||||
"i2cStart(), #1",
|
||||
"invalid state");
|
||||
i2cp->i2c_config = config;
|
||||
|
||||
#if (!(STM32_I2C_I2C2_USE_POLLING_WAIT) && I2C_SUPPORTS_CALLBACKS)
|
||||
gptStart(i2cp->timer, i2cp->timer_cfg);
|
||||
#endif /* !(STM32_I2C_I2C2_USE_POLLING_WAIT) */
|
||||
|
||||
chSysLock();
|
||||
i2cp->id_config = config;
|
||||
i2c_lld_start(i2cp);
|
||||
i2cp->i2c_state = I2C_READY;
|
||||
i2cp->id_state = I2C_READY;
|
||||
chSysUnlock();
|
||||
}
|
||||
|
||||
|
|
@ -111,133 +132,172 @@ void i2cStart(I2CDriver *i2cp, const I2CConfig *config) {
|
|||
void i2cStop(I2CDriver *i2cp) {
|
||||
|
||||
chDbgCheck(i2cp != NULL, "i2cStop");
|
||||
|
||||
chSysLock();
|
||||
chDbgAssert((i2cp->i2c_state == I2C_STOP) || (i2cp->i2c_state == I2C_READY),
|
||||
chDbgAssert((i2cp->id_state == I2C_STOP) || (i2cp->id_state == I2C_READY),
|
||||
"i2cStop(), #1",
|
||||
"invalid state");
|
||||
|
||||
#if (!(STM32_I2C_I2C2_USE_POLLING_WAIT) && I2C_SUPPORTS_CALLBACKS)
|
||||
gptStop(i2cp->timer);
|
||||
#endif /* !(STM32_I2C_I2C2_USE_POLLING_WAIT) */
|
||||
|
||||
chSysLock();
|
||||
i2c_lld_stop(i2cp);
|
||||
i2cp->i2c_state = I2C_STOP;
|
||||
i2cp->id_state = I2C_STOP;
|
||||
chSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initiates a master bus transaction.
|
||||
* @details This function sends a start bit followed by an one or two bytes
|
||||
* header.
|
||||
* @brief Sends data via the I2C bus.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] header transaction header
|
||||
* @param[in] callback operation complete callback
|
||||
* @details Function designed to realize "read-through-write" transfer
|
||||
* paradigm. If you want transmit data without any further read,
|
||||
* than set @b rxbytes field to 0.
|
||||
*
|
||||
* @iclass
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] i2cscfg pointer to the @p I2C slave config
|
||||
* @param[in] slave_addr Slave device address. Bits 0-9 contain slave
|
||||
* device address. Bit 15 must be set to 1 if 10-bit
|
||||
* addressing mode used. Otherwise keep it cleared.
|
||||
* Bits 10-14 unused.
|
||||
* @param[in] txbuf pointer to transmit buffer
|
||||
* @param[in] txbytes number of bytes to be transmitted
|
||||
* @param[in] rxbuf pointer to receive buffer
|
||||
* @param[in] rxbytes number of bytes to be received, set it to 0 if
|
||||
* you want transmit only
|
||||
*/
|
||||
void i2cMasterStartI(I2CDriver *i2cp,
|
||||
uint16_t header,
|
||||
i2ccallback_t callback) {
|
||||
void i2cMasterTransmit(I2CDriver *i2cp,
|
||||
const I2CSlaveConfig *i2cscfg,
|
||||
uint16_t slave_addr,
|
||||
uint8_t *txbuf,
|
||||
size_t txbytes,
|
||||
uint8_t *rxbuf,
|
||||
size_t rxbytes) {
|
||||
|
||||
chDbgCheck((i2cp != NULL) && (callback != NULL), "i2cMasterStartI");
|
||||
chDbgAssert(i2cp->i2c_state == I2C_READY,
|
||||
"i2cMasterStartI(), #1", "invalid state");
|
||||
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\
|
||||
(slave_addr != 0) &&\
|
||||
(txbytes > 0) &&\
|
||||
(txbuf != NULL),
|
||||
"i2cMasterTransmit");
|
||||
|
||||
i2cp->id_callback = callback;
|
||||
i2c_lld_master_start(i2cp, header);
|
||||
/* init slave config field in driver */
|
||||
i2cp->id_slave_config = i2cscfg;
|
||||
|
||||
i2c_lld_wait_bus_free(i2cp);
|
||||
chDbgAssert(!(i2c_lld_bus_is_busy(i2cp)), "i2cMasterReceive(), #1", "time is out");
|
||||
|
||||
chDbgAssert(i2cp->id_state == I2C_READY,
|
||||
"i2cMasterTransmit(), #1", "not ready");
|
||||
|
||||
i2cp->id_state = I2C_ACTIVE_TRANSMIT;
|
||||
i2c_lld_master_transmit(i2cp, slave_addr, txbuf, txbytes, rxbuf, rxbytes);
|
||||
#if I2C_SUPPORTS_CALLBACKS
|
||||
_i2c_wait_s(i2cp);
|
||||
#else
|
||||
i2cp->id_state = I2C_READY;
|
||||
#endif /* I2C_SUPPORTS_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Terminates a master bus transaction.
|
||||
* @brief Receives data from the I2C bus.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] callback operation complete callback
|
||||
*
|
||||
* @iclass
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] i2cscfg pointer to the @p I2C slave config
|
||||
* @param[in] slave_addr Slave device address. Bits 0-9 contain slave
|
||||
* device address. Bit 15 must be set to 1 if 10-bit
|
||||
* addressing mode used. Otherwise keep it cleared.
|
||||
* Bits 10-14 unused.
|
||||
* @param[in] rxbytes number of bytes to be received
|
||||
* @param[in] rxbuf pointer to receive buffer
|
||||
*/
|
||||
void i2cMasterStopI(I2CDriver *i2cp, i2ccallback_t callback) {
|
||||
void i2cMasterReceive(I2CDriver *i2cp,
|
||||
const I2CSlaveConfig *i2cscfg,
|
||||
uint16_t slave_addr,
|
||||
uint8_t *rxbuf,
|
||||
size_t rxbytes){
|
||||
|
||||
chDbgCheck((i2cp != NULL) && (callback != NULL), "i2cMasterStopI");
|
||||
chDbgAssert(i2cp->i2c_state == I2C_MREADY,
|
||||
"i2cMasterStopI(), #1", "invalid state");
|
||||
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\
|
||||
(slave_addr != 0) &&\
|
||||
(rxbytes > 0) && \
|
||||
(rxbuf != NULL),
|
||||
"i2cMasterReceive");
|
||||
|
||||
i2cp->id_callback = callback;
|
||||
i2c_lld_master_stop(i2cp);
|
||||
/* init slave config field in driver */
|
||||
i2cp->id_slave_config = i2cscfg;
|
||||
|
||||
i2c_lld_wait_bus_free(i2cp);
|
||||
chDbgAssert(!(i2c_lld_bus_is_busy(i2cp)), "i2cMasterReceive(), #1", "time is out");
|
||||
|
||||
chDbgAssert(i2cp->id_state == I2C_READY,
|
||||
"i2cMasterReceive(), #1", "not ready");
|
||||
|
||||
i2cp->id_state = I2C_ACTIVE_RECEIVE;
|
||||
i2c_lld_master_receive(i2cp, slave_addr, rxbuf, rxbytes);
|
||||
#if I2C_SUPPORTS_CALLBACKS
|
||||
_i2c_wait_s(i2cp);
|
||||
#else
|
||||
i2cp->id_state = I2C_READY;
|
||||
#endif /* I2C_SUPPORTS_CALLBACKS */
|
||||
}
|
||||
|
||||
|
||||
/* FIXME: I do not know what this function must do. And can not test it
|
||||
uint16_t i2cSMBusAlertResponse(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
|
||||
i2cMasterReceive(i2cp, i2cscfg);
|
||||
return i2cp->id_slave_config->slave_addr;
|
||||
}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Sends a restart bit.
|
||||
* @details Restart bits are required by some types of I2C transactions.
|
||||
* @brief Handles communication events/errors.
|
||||
* @details Must be called from the I/O interrupt service routine in order to
|
||||
* notify I/O conditions as errors, signals change etc.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] callback operation complete callback
|
||||
* @param[in] i2cp pointer to a @p I2CDriver structure
|
||||
* @param[in] mask condition flags to be added to the mask
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
void i2cMasterRestartI(I2CDriver *i2cp, i2ccallback_t callback) {
|
||||
void i2cAddFlagsI(I2CDriver *i2cp, i2cflags_t mask) {
|
||||
|
||||
chDbgCheck((i2cp != NULL) && (callback != NULL), "i2cMasterRestartI");
|
||||
chDbgAssert(i2cp->i2c_state == I2C_MREADY,
|
||||
"i2cMasterRestartI(), #1", "invalid state");
|
||||
chDbgCheck(i2cp != NULL, "i2cAddFlagsI");
|
||||
|
||||
i2cp->id_callback = callback;
|
||||
i2c_lld_master_restart(i2cp);
|
||||
i2cp->errors |= mask;
|
||||
chEvtBroadcastI(&i2cp->sevent);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Master transmission.
|
||||
* @brief Returns and clears the errors mask associated to the driver.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] n number of bytes to be transmitted
|
||||
* @param[in] txbuf transmit data buffer pointer
|
||||
* @param[in] callback operation complete callback
|
||||
* @param[in] i2cp pointer to a @p I2CDriver structure
|
||||
* @return The condition flags modified since last time this
|
||||
* function was invoked.
|
||||
*
|
||||
* @iclass
|
||||
* @api
|
||||
*/
|
||||
void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf,
|
||||
i2ccallback_t callback) {
|
||||
i2cflags_t i2cGetAndClearFlags(I2CDriver *i2cp) {
|
||||
i2cflags_t mask;
|
||||
|
||||
chDbgCheck((i2cp != NULL) && (n > 0) &&
|
||||
(txbuf != NULL) && (callback != NULL), "i2cMasterTransmitI");
|
||||
chDbgAssert(i2cp->i2c_state == I2C_MREADY,
|
||||
"i2cMasterTransmitI(), #1", "invalid state");
|
||||
chDbgCheck(i2cp != NULL, "i2cGetAndClearFlags");
|
||||
|
||||
i2cp->id_callback = callback;
|
||||
i2c_lld_master_transmit(i2cp, n, txbuf);
|
||||
chSysLock();
|
||||
mask = i2cp->errors;
|
||||
i2cp->errors = I2CD_NO_ERROR;
|
||||
chSysUnlock();
|
||||
return mask;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Master receive.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] n number of bytes to be transmitted
|
||||
* @param[in] rxbuf receive data buffer pointer
|
||||
* @param[in] callback operation complete callback
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf,
|
||||
i2ccallback_t callback) {
|
||||
|
||||
chDbgCheck((i2cp != NULL) && (n > 0) &&
|
||||
(rxbuf != NULL) && (callback != NULL), "i2cMasterReceiveI");
|
||||
chDbgAssert(i2cp->i2c_state == I2C_MREADY,
|
||||
"i2cMasterReceiveI(), #1", "invalid state");
|
||||
|
||||
i2cp->id_callback = callback;
|
||||
i2c_lld_master_receive(i2cp, n, rxbuf);
|
||||
}
|
||||
|
||||
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Gains exclusive access to the I2C bus.
|
||||
* @brief Gains exclusive access to the I2C bus.
|
||||
* @details This function tries to gain ownership to the I2C bus, if the bus
|
||||
* is already being used then the invoking thread is queued.
|
||||
* @pre In order to use this function the option @p I2C_USE_MUTUAL_EXCLUSION
|
||||
* must be enabled.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @api
|
||||
*
|
||||
* @note This function is only available when the @p I2C_USE_MUTUAL_EXCLUSION
|
||||
* option is set to @p TRUE.
|
||||
*/
|
||||
void i2cAcquireBus(I2CDriver *i2cp) {
|
||||
|
||||
|
|
@ -251,13 +311,12 @@ void i2cAcquireBus(I2CDriver *i2cp) {
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Releases exclusive access to the I2C bus.
|
||||
* @pre In order to use this function the option @p I2C_USE_MUTUAL_EXCLUSION
|
||||
* must be enabled.
|
||||
* @brief Releases exclusive access to the I2C bus.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @api
|
||||
* @note This function is only available when the @p I2C_USE_MUTUAL_EXCLUSION
|
||||
* option is set to @p TRUE.
|
||||
*/
|
||||
void i2cReleaseBus(I2CDriver *i2cp) {
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,215 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra
|
||||
#USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
|
||||
USE_THUMB = yes
|
||||
endif
|
||||
|
||||
# Enable register caching optimization (read documentation).
|
||||
ifeq ($(USE_CURRP_CACHING),)
|
||||
USE_CURRP_CACHING = no
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Enable this if you really want to use the STM FWLib.
|
||||
ifeq ($(USE_FWLIB),)
|
||||
USE_FWLIB = no
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Define linker script file here
|
||||
LDSCRIPT= $(PORTLD)/STM32F103xB.ld
|
||||
|
||||
# Imported source files
|
||||
CHIBIOS = ../../..
|
||||
include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
|
||||
include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk
|
||||
include $(CHIBIOS)/os/kernel/kernel.mk
|
||||
#include $(CHIBIOS)/test/test.mk
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(PORTSRC) \
|
||||
$(KERNSRC) \
|
||||
$(TESTSRC) \
|
||||
$(HALSRC) \
|
||||
$(PLATFORMSRC) \
|
||||
$(BOARDSRC) \
|
||||
$(CHIBIOS)/os/various/evtimer.c \
|
||||
$(CHIBIOS)/os/various/syscalls.c \
|
||||
main.c \
|
||||
i2c_pns.c \
|
||||
tmp75.c\
|
||||
max1236.c\
|
||||
lis3.c\
|
||||
|
||||
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC =
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
|
||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(PORTASM)
|
||||
|
||||
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
|
||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
||||
$(CHIBIOS)/os/various
|
||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
# -lm äîáàâëåí èìåííî çäåñü, ïîòîìó ÷òî áîëüøå íåêóäà
|
||||
MCU = cortex-m3
|
||||
|
||||
#TRGT = arm-elf-
|
||||
TRGT = arm-none-eabi-
|
||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
||||
|
||||
LD = $(TRGT)gcc
|
||||
#LD = $(TRGT)g++
|
||||
CP = $(TRGT)objcopy
|
||||
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||
OD = $(TRGT)objdump
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary
|
||||
|
||||
# ARM-specific options here
|
||||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
|
||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra
|
||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of default section
|
||||
#
|
||||
|
||||
# List all default C defines here, like -D_DEBUG=1
|
||||
DDEFS =
|
||||
|
||||
# List all default ASM defines here, like -D_DEBUG=1
|
||||
DADEFS =
|
||||
|
||||
# List all default directories to look for include files here
|
||||
DINCDIR =
|
||||
|
||||
# List the default directory to look for the libraries here
|
||||
DLIBDIR =
|
||||
|
||||
# List all default libraries here
|
||||
DLIBS =
|
||||
|
||||
#
|
||||
# End of default section
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user defines
|
||||
##############################################################################
|
||||
|
||||
ifeq ($(USE_FWLIB),yes)
|
||||
include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
|
||||
CSRC += $(STM32SRC)
|
||||
INCDIR += $(STM32INC)
|
||||
USE_OPT += -DUSE_STDPERIPH_DRIVER
|
||||
endif
|
||||
|
||||
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,509 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCONF_H_
|
||||
#define _CHCONF_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Kernel parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
|
||||
#define CH_FREQUENCY 1000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
*
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
*/
|
||||
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
|
||||
#define CH_TIME_QUANTUM 0//20
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_USE_MEMCORE.
|
||||
*/
|
||||
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
|
||||
#define CH_MEMCORE_SIZE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread automatically. The application has
|
||||
* then the responsibility to do one of the following:
|
||||
* - Spawn a custom idle thread at priority @p IDLEPRIO.
|
||||
* - Change the main() thread priority to @p IDLEPRIO then enter
|
||||
* an endless loop. In this scenario the @p main() thread acts as
|
||||
* the idle thread.
|
||||
* .
|
||||
* @note Unless an idle thread is spawned the @p main() thread must not
|
||||
* enter a sleep state.
|
||||
*/
|
||||
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
|
||||
#define CH_NO_IDLE_THREAD FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Performance options. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
|
||||
#define CH_OPTIMIZE_SPEED FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Subsystem options. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
|
||||
#define CH_USE_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
|
||||
#define CH_USE_WAITEXIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
|
||||
#define CH_USE_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special requirements.
|
||||
* @note Requires @p CH_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define CH_USE_SEMAPHORES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Atomic semaphore API.
|
||||
* @details If enabled then the semaphores the @p chSemSignalWait() API
|
||||
* is included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
|
||||
#define CH_USE_SEMSW TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MUTEXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
|
||||
#define CH_USE_CONDVARS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_CONDVARS.
|
||||
*/
|
||||
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
|
||||
#define CH_USE_CONDVARS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define CH_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_EVENTS.
|
||||
*/
|
||||
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
|
||||
#define CH_USE_EVENTS_TIMEOUT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MESSAGES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special requirements.
|
||||
* @note Requires @p CH_USE_MESSAGES.
|
||||
*/
|
||||
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MESSAGES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I/O Queues APIs.
|
||||
* @details If enabled then the I/O queues APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
|
||||
#define CH_USE_QUEUES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MEMCORE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
|
||||
* @p CH_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
|
||||
#define CH_USE_HEAP FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief C-runtime allocator.
|
||||
* @details If enabled the the heap allocator APIs just wrap the C-runtime
|
||||
* @p malloc() and @p free() functions.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_USE_HEAP.
|
||||
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
|
||||
* appropriate documentation.
|
||||
*/
|
||||
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MALLOC_HEAP FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
|
||||
#define CH_USE_MEMPOOLS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_USE_WAITEXIT.
|
||||
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
|
||||
*/
|
||||
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
|
||||
#define CH_USE_DYNAMIC FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Debug options. */
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_ENABLE_CHECKS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_ENABLE_ASSERTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the context switch circular trace buffer is
|
||||
* activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_ENABLE_TRACE FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_ENABLE_STACK_CHECK TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_FILL_THREADS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p Thread structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note This debug option is defaulted to TRUE because it is required by
|
||||
* some test cases into the test suite.
|
||||
*/
|
||||
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_THREADS_PROFILING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Kernel hooks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p Thread structure.
|
||||
*/
|
||||
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
|
||||
#define THREAD_EXT_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitily from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
|
||||
#define THREAD_EXT_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*
|
||||
* @note It is inserted into lock zone.
|
||||
* @note It is also invoked when the threads simply return in order to
|
||||
* terminate.
|
||||
*/
|
||||
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
|
||||
#define THREAD_EXT_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
|
||||
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
|
||||
#define IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
|
||||
#define SYSTEM_TICK_EVENT_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
|
||||
#define SYSTEM_HALT_HOOK() { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _CHCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,339 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Switch to asynchronouse driver with callbacks.
|
||||
*/
|
||||
#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define I2C_SUPPORTS_CALLBACKS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Block size for MMC transfers.
|
||||
*/
|
||||
#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
|
||||
#define MMC_SECTOR_SIZE 512
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Number of positive insertion queries before generating the
|
||||
* insertion event.
|
||||
*/
|
||||
#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
|
||||
#define MMC_POLLING_INTERVAL 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Interval, in milliseconds, between insertion queries.
|
||||
*/
|
||||
#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
|
||||
#define MMC_POLLING_DELAY 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Uses the SPI polled API for small data transfers.
|
||||
* @details Polled transfers usually improve performance because it
|
||||
* saves two context switches and interrupt servicing. Note
|
||||
* that this option has no effect on large transfers which
|
||||
* are always performed using DMAs/IRQs.
|
||||
*/
|
||||
#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
|
||||
#define MMC_USE_SPI_POLLING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* PAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* PWM driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intevals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 57600
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 64 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "i2c_pns.h"
|
||||
|
||||
#include "lis3.h"
|
||||
#include "tmp75.h"
|
||||
#include "max1236.h"
|
||||
|
||||
/* I2C1 */
|
||||
static const I2CConfig i2cfg1 = {
|
||||
OPMODE_I2C,
|
||||
100000,
|
||||
STD_DUTY_CYCLE,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
/* I2C2 */
|
||||
static const I2CConfig i2cfg2 = {
|
||||
OPMODE_I2C,
|
||||
100000,
|
||||
STD_DUTY_CYCLE,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
|
||||
|
||||
void I2CInit_pns(void){
|
||||
i2cInit();
|
||||
|
||||
i2cStart(&I2CD1, &i2cfg1);
|
||||
i2cStart(&I2CD2, &i2cfg2);
|
||||
|
||||
/* tune ports for I2C1*/
|
||||
palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
|
||||
palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
|
||||
|
||||
/* tune ports for I2C2*/
|
||||
palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
|
||||
palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
|
||||
|
||||
/* startups. Pauses added just to be safe */
|
||||
chThdSleepMilliseconds(1000);
|
||||
init_max1236();
|
||||
chThdSleepMilliseconds(1000);
|
||||
init_lis3();
|
||||
chThdSleepMilliseconds(1000);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
#ifndef I2C_PNS_H_
|
||||
#define I2C_PNS_H_
|
||||
|
||||
|
||||
void I2CInit_pns(void);
|
||||
|
||||
|
||||
#endif /* I2C_PNS_H_ */
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/**
|
||||
* This is most complex and difficult device.
|
||||
* It realize "read through write" paradigm. This is not standard, but
|
||||
* most of I2C devices use this paradigm.
|
||||
* You must write to device reading address, send restart to bus,
|
||||
* and then begin reading process.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "lis3.h"
|
||||
|
||||
|
||||
#define lis3_addr 0b0011101
|
||||
|
||||
|
||||
/* buffers */
|
||||
static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH];
|
||||
static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH];
|
||||
|
||||
static int16_t acceleration_x = 0;
|
||||
static int16_t acceleration_y = 0;
|
||||
static int16_t acceleration_z = 0;
|
||||
|
||||
/* Error trap */
|
||||
static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
|
||||
(void)i2cscfg;
|
||||
int status = 0;
|
||||
status = i2cp->id_i2c->SR1;
|
||||
while(TRUE);
|
||||
}
|
||||
|
||||
/* This callback raise up when transfer finished */
|
||||
static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
|
||||
(void)i2cp;
|
||||
(void)i2cscfg;
|
||||
}
|
||||
|
||||
|
||||
/* Accelerometer lis3lv02dq config */
|
||||
static const I2CSlaveConfig lis3 = {
|
||||
i2c_lis3_cb,
|
||||
i2c_lis3_error_cb,
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* Init function. Here we will also start personal serving thread.
|
||||
*/
|
||||
int init_lis3(void){
|
||||
/* configure accelerometer */
|
||||
accel_tx_data[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */
|
||||
accel_tx_data[1] = 0b11100111;
|
||||
accel_tx_data[2] = 0b01000001;
|
||||
accel_tx_data[3] = 0b00000000;
|
||||
|
||||
/* sending */
|
||||
i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
*
|
||||
*/
|
||||
void request_acceleration_data(void){
|
||||
accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address
|
||||
//i2cAcquireBus(&I2CD1);
|
||||
i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6);
|
||||
//i2cReleaseBus(&I2CD1);
|
||||
|
||||
acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8);
|
||||
acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8);
|
||||
acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8);
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
#include <stdlib.h>
|
||||
#include "ch.h"
|
||||
|
||||
#ifndef LIS3_H_
|
||||
#define LIS3_H_
|
||||
|
||||
|
||||
|
||||
/* buffers depth */
|
||||
#define ACCEL_RX_DEPTH 8
|
||||
#define ACCEL_TX_DEPTH 8
|
||||
|
||||
/* autoincrement bit position. This bit needs to perform reading of
|
||||
* multiple bytes at one request */
|
||||
#define AUTO_INCREMENT_BIT (1<<7)
|
||||
|
||||
/* slave specific addresses */
|
||||
#define ACCEL_STATUS_REG 0x27
|
||||
#define ACCEL_CTRL_REG1 0x20
|
||||
#define ACCEL_OUT_DATA 0x28
|
||||
|
||||
|
||||
|
||||
inline int init_lis3(void);
|
||||
inline void request_acceleration_data(void);
|
||||
|
||||
|
||||
#endif /* LIS3_H_ */
|
||||
|
|
@ -0,0 +1,139 @@
|
|||
/**
|
||||
* Lets imagine that we have board with LIS3LV02DL accelerometer on channel #1
|
||||
* and MAX1236 ADC, TMP75 thermometer on channel #2.
|
||||
*
|
||||
* NOTE: I assume, that you have datasheets on all this stuff.
|
||||
*
|
||||
* NOTE: Also, I assume, that you know how to I2C works.
|
||||
*
|
||||
* In order from simplicity to complexity:
|
||||
* TMP75
|
||||
* MAX1236
|
||||
* LIS3LV02DL
|
||||
*
|
||||
* Project splitted to separate source files for each device.
|
||||
*
|
||||
* Data from sensors we will be read from different thread sleeping different
|
||||
* amount of time.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "i2c_pns.h"
|
||||
#include "tmp75.h"
|
||||
#include "max1236.h"
|
||||
#include "lis3.h"
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Red LEDs blinker thread, times are in milliseconds.
|
||||
*/
|
||||
static WORKING_AREA(BlinkWA, 128);
|
||||
static msg_t Blink(void *arg) {
|
||||
(void)arg;
|
||||
while (TRUE) {
|
||||
palClearPad(IOPORT3, GPIOC_LED);
|
||||
chThdSleepMilliseconds(500);
|
||||
palSetPad(IOPORT3, GPIOC_LED);
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Temperature polling thread */
|
||||
static WORKING_AREA(PollTmp75ThreadWA, 128);
|
||||
static msg_t PollTmp75Thread(void *arg) {
|
||||
(void)arg;
|
||||
systime_t time = chTimeNow();
|
||||
|
||||
while (TRUE) {
|
||||
time += MS2ST(1001);
|
||||
/* Call reading function */
|
||||
request_temperature();
|
||||
chThdSleepUntil(time);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* MAX1236 polling thread */
|
||||
static WORKING_AREA(PollMax1236ThreadWA, 128);
|
||||
static msg_t PollMax1236Thread(void *arg) {
|
||||
(void)arg;
|
||||
systime_t time = chTimeNow();
|
||||
|
||||
while (TRUE) {
|
||||
time += MS2ST(200);
|
||||
/* Call reading function */
|
||||
read_max1236();
|
||||
chThdSleepUntil(time);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static WORKING_AREA(PollAccelThreadWA, 128);
|
||||
static msg_t PollAccelThread(void *arg) {
|
||||
(void)arg;
|
||||
systime_t time = chTimeNow();
|
||||
|
||||
while (TRUE) {
|
||||
time += MS2ST(20);
|
||||
request_acceleration_data();
|
||||
chThdSleepUntil(time);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Entry point, note, the main() function is already a thread in the system
|
||||
* on entry.
|
||||
*/
|
||||
int main(void) {
|
||||
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
I2CInit_pns();
|
||||
|
||||
/* Create temperature thread */
|
||||
chThdCreateStatic(PollTmp75ThreadWA,
|
||||
sizeof(PollTmp75ThreadWA),
|
||||
NORMALPRIO,
|
||||
PollTmp75Thread,
|
||||
NULL);
|
||||
|
||||
|
||||
/* Create max1236 thread */
|
||||
chThdCreateStatic(PollMax1236ThreadWA,
|
||||
sizeof(PollMax1236ThreadWA),
|
||||
NORMALPRIO,
|
||||
PollMax1236Thread,
|
||||
NULL);
|
||||
|
||||
|
||||
/* Create accelerometer thread */
|
||||
chThdCreateStatic(PollAccelThreadWA,
|
||||
sizeof(PollAccelThreadWA),
|
||||
HIGHPRIO,
|
||||
PollAccelThread,
|
||||
NULL);
|
||||
|
||||
/* Creates the blinker thread. */
|
||||
chThdCreateStatic(BlinkWA, sizeof(BlinkWA), LOWPRIO, Blink, NULL);
|
||||
|
||||
/* main loop that do nothing */
|
||||
while (TRUE) {
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/*
|
||||
* main.h
|
||||
*
|
||||
* Created on: 25.03.2011
|
||||
* Author: barthess
|
||||
*/
|
||||
|
||||
#ifndef MAIN_H_
|
||||
#define MAIN_H_
|
||||
|
||||
|
||||
// ãëîáàëüíûå ôëàãè
|
||||
#define GET_FILTERED_RAW_GYRO TRUE
|
||||
#define GET_FILTERED_RAW_ACCEL TRUE
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MAIN_H_ */
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
/**
|
||||
* Maxim ADC has not so suitable default settings after startup.
|
||||
* So we will create init function to tune this ADC.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "max1236.h"
|
||||
|
||||
|
||||
#define max1236_addr 0b0110100
|
||||
|
||||
|
||||
/* Data buffers */
|
||||
static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH];
|
||||
static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH];
|
||||
/* ADC results */
|
||||
static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0;
|
||||
|
||||
|
||||
/* Error trap */
|
||||
static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
|
||||
(void)i2cscfg;
|
||||
int status = 0;
|
||||
status = i2cp->id_i2c->SR1;
|
||||
while(TRUE);
|
||||
}
|
||||
|
||||
|
||||
/* This callback raise up when transfer finished */
|
||||
static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
|
||||
(void)*i2cp;
|
||||
(void)*i2cscfg;
|
||||
/* get ADC data */
|
||||
}
|
||||
|
||||
|
||||
/* ADC maxim MAX1236 config */
|
||||
|
||||
static const I2CSlaveConfig max1236 = {
|
||||
i2c_max1236_cb,
|
||||
i2c_max1236_error_cb,
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* Initilization routine. See datasheet on page 13 to understand
|
||||
* how to initialize ADC.
|
||||
*/
|
||||
void init_max1236(void){
|
||||
/* this data we must send via IC to setup ADC */
|
||||
max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */
|
||||
max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */
|
||||
|
||||
/* transmit out 2 bytes */
|
||||
i2cAcquireBus(&I2CD2);
|
||||
i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, 2, max1236_rx_data, 0);
|
||||
i2cReleaseBus(&I2CD2);
|
||||
}
|
||||
|
||||
|
||||
/* Now simply read 8 bytes to get all 4 ADC channels */
|
||||
void read_max1236(void){
|
||||
i2cAcquireBus(&I2CD2);
|
||||
i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, 8);
|
||||
i2cReleaseBus(&I2CD2);
|
||||
|
||||
ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1];
|
||||
ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3];
|
||||
ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5];
|
||||
ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7];
|
||||
}
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
#include "ch.h"
|
||||
|
||||
#ifndef MAX1236_H_
|
||||
#define MAX1236_H_
|
||||
|
||||
|
||||
#define MAX1236_RX_DEPTH 8
|
||||
#define MAX1236_TX_DEPTH 2
|
||||
|
||||
|
||||
void init_max1236(void);
|
||||
void read_max1236(void);
|
||||
|
||||
#endif /* MAX1236_H_ */
|
||||
|
|
@ -0,0 +1,174 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/*
|
||||
* STM32 drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV2
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV2
|
||||
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
||||
#define STM32_MCO STM32_MCO_NOCLOCK
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_USE_ADC1 TRUE
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 3
|
||||
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt()
|
||||
|
||||
/*
|
||||
* CAN driver system settings.
|
||||
*/
|
||||
#define STM32_CAN_USE_CAN1 FALSE
|
||||
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 TRUE
|
||||
#define STM32_GPT_USE_TIM2 TRUE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM8 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_USE_TIM4 TRUE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 TRUE
|
||||
#define STM32_PWM_USE_TIM4 TRUE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 2
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 2
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 2
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 2
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 2
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 TRUE
|
||||
#define STM32_SERIAL_USE_USART2 TRUE
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_SERIAL_USE_UART4 FALSE
|
||||
#define STM32_SERIAL_USE_UART5 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 TRUE
|
||||
#define STM32_SPI_USE_SPI2 TRUE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE // RF link
|
||||
#define STM32_UART_USE_USART2 FALSE //GPS
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 TRUE
|
||||
#define STM32_I2C_USE_I2C2 TRUE
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 10
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 10
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 4
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 4
|
||||
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
|
||||
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
|
||||
/* I2C1 */
|
||||
#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1
|
||||
#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE
|
||||
/* I2C2 */
|
||||
#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2
|
||||
#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE
|
||||
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_USB1 TRUE
|
||||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
||||
#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
|
||||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/**
|
||||
* TMP75 is most simple I2C device in our case. It is already useful with
|
||||
* default settings after powerup.
|
||||
* You only must read 2 sequential bytes from it.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "tmp75.h"
|
||||
|
||||
|
||||
/* input buffer */
|
||||
static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH];
|
||||
|
||||
/* temperature value */
|
||||
static int16_t temperature = 0;
|
||||
|
||||
/* Simple error trap */
|
||||
static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
|
||||
(void)i2cscfg;
|
||||
int status = 0;
|
||||
status = i2cp->id_i2c->SR1;
|
||||
while(TRUE);
|
||||
}
|
||||
|
||||
/* This callback raise up when transfer finished */
|
||||
static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
|
||||
(void)*i2cp;
|
||||
(void)*i2cscfg;
|
||||
/* store temperature value */
|
||||
}
|
||||
|
||||
/* Fill TMP75 config. */
|
||||
static const I2CSlaveConfig tmp75 = {
|
||||
i2c_tmp75_cb,
|
||||
i2c_tmp75_error_cb,
|
||||
};
|
||||
|
||||
#define tmp75_addr 0b1001000
|
||||
|
||||
/* This is main function. */
|
||||
void request_temperature(void){
|
||||
i2cAcquireBus(&I2CD2);
|
||||
i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, 2);
|
||||
i2cReleaseBus(&I2CD2);
|
||||
temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1];
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#ifndef TMP75_H_
|
||||
#define TMP75_H_
|
||||
|
||||
|
||||
|
||||
/* buffers depth */
|
||||
#define TMP75_RX_DEPTH 2
|
||||
#define TMP75_TX_DEPTH 2
|
||||
|
||||
void init_tmp75(void);
|
||||
void request_temperature(void);
|
||||
|
||||
#endif /* TMP75_H_ */
|
||||
Loading…
Reference in New Issue