From 304c76dddd3f2a84062588c434c034d83f82fa52 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 3 Dec 2015 13:49:06 +0000 Subject: [PATCH] Added watchdog driver model (WDG), to be completed and tested. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8555 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/hal.mk | 6 +- os/hal/include/hal.h | 1 + os/hal/include/wdg.h | 89 ++++ os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c | 126 +++++ os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.h | 176 ++++++ os/hal/ports/STM32/STM32F3xx/platform.mk | 9 +- os/hal/src/hal.c | 3 + os/hal/src/spi.c | 6 +- os/hal/src/wdg.c | 120 +++++ readme.txt | 1 + testhal/STM32/STM32F3xx/ADC/readme.txt | 4 +- testhal/STM32/STM32F3xx/ADC_DUAL/readme.txt | 4 +- testhal/STM32/STM32F3xx/CAN/readme.txt | 4 +- testhal/STM32/STM32F3xx/DAC/readme.txt | 4 +- testhal/STM32/STM32F3xx/EXT/readme.txt | 4 +- testhal/STM32/STM32F3xx/IRQ_STORM/readme.txt | 4 +- testhal/STM32/STM32F3xx/PWM-ICU/readme.txt | 4 +- testhal/STM32/STM32F3xx/SPI/readme.txt | 4 +- testhal/STM32/STM32F3xx/UART/readme.txt | 4 +- testhal/STM32/STM32F3xx/USB_CDC/readme.txt | 4 +- .../STM32/STM32F3xx/USB_CDC_IAD/readme.txt | 4 +- testhal/STM32/STM32F3xx/WDG/.cproject | 52 ++ testhal/STM32/STM32F3xx/WDG/.project | 38 ++ testhal/STM32/STM32F3xx/WDG/Makefile | 216 ++++++++ testhal/STM32/STM32F3xx/WDG/chconf.h | 499 ++++++++++++++++++ ...32F3xx-WDG (OpenOCD, Flash and Run).launch | 52 ++ testhal/STM32/STM32F3xx/WDG/halconf.h | 361 +++++++++++++ testhal/STM32/STM32F3xx/WDG/main.c | 58 ++ testhal/STM32/STM32F3xx/WDG/mcuconf.h | 241 +++++++++ testhal/STM32/STM32F3xx/WDG/readme.txt | 30 ++ testhal/STM32/STM32F3xx/WDG/us.stackdump | 21 + 31 files changed, 2121 insertions(+), 28 deletions(-) create mode 100644 os/hal/include/wdg.h create mode 100644 os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c create mode 100644 os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.h create mode 100644 os/hal/src/wdg.c create mode 100644 testhal/STM32/STM32F3xx/WDG/.cproject create mode 100644 testhal/STM32/STM32F3xx/WDG/.project create mode 100644 testhal/STM32/STM32F3xx/WDG/Makefile create mode 100644 testhal/STM32/STM32F3xx/WDG/chconf.h create mode 100644 testhal/STM32/STM32F3xx/WDG/debug/STM32F3xx-WDG (OpenOCD, Flash and Run).launch create mode 100644 testhal/STM32/STM32F3xx/WDG/halconf.h create mode 100644 testhal/STM32/STM32F3xx/WDG/main.c create mode 100644 testhal/STM32/STM32F3xx/WDG/mcuconf.h create mode 100644 testhal/STM32/STM32F3xx/WDG/readme.txt create mode 100644 testhal/STM32/STM32F3xx/WDG/us.stackdump diff --git a/os/hal/hal.mk b/os/hal/hal.mk index 074970dc6..53da28525 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -64,6 +64,9 @@ endif ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),) HALSRC += $(CHIBIOS)/os/hal/src/usb.c endif +ifneq ($(findstring HAL_USE_WDG TRUE,$(HALCONF)),) +HALSRC += $(CHIBIOS)/os/hal/src/wdg.c +endif else HALSRC = $(CHIBIOS)/os/hal/src/hal.c \ $(CHIBIOS)/os/hal/src/hal_queues.c \ @@ -87,7 +90,8 @@ HALSRC = $(CHIBIOS)/os/hal/src/hal.c \ $(CHIBIOS)/os/hal/src/spi.c \ $(CHIBIOS)/os/hal/src/st.c \ $(CHIBIOS)/os/hal/src/uart.c \ - $(CHIBIOS)/os/hal/src/usb.c + $(CHIBIOS)/os/hal/src/usb.c \ + $(CHIBIOS)/os/hal/src/wdg.c endif # Required include directories diff --git a/os/hal/include/hal.h b/os/hal/include/hal.h index 9ececfe77..89ef9e08d 100644 --- a/os/hal/include/hal.h +++ b/os/hal/include/hal.h @@ -60,6 +60,7 @@ #include "spi.h" #include "uart.h" #include "usb.h" +#include "wdg.h" /* * The ST driver is a special case, it is only included if the OSAL is diff --git a/os/hal/include/wdg.h b/os/hal/include/wdg.h new file mode 100644 index 000000000..764e0b2b1 --- /dev/null +++ b/os/hal/include/wdg.h @@ -0,0 +1,89 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file wdg.h + * @brief WDG Driver macros and structures. + * + * @addtogroup WDG + * @{ + */ + +#ifndef _WDG_H_ +#define _WDG_H_ + +#if (HAL_USE_WDG == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Driver state machine possible states. + */ +typedef enum { + WDG_UNINIT = 0, /**< Not initialized. */ + WDG_STOP = 1, /**< Stopped. */ + WDG_READY = 2, /**< Ready. */ +} wdgstate_t; + +#include "wdg_lld.h" + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Resets WDG's counter. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @iclass + */ +#define wdgResetI(wdgp) wdg_lld_reset(wdgp) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void wdgInit(void); + void wdgStart(WDGDriver *wdgp, const WDGConfig * config); + void wdgStop(WDGDriver *wdgp); + void wdgReset(WDGDriver *wdgp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_WDG == TRUE */ + +#endif /* _WDG_H_ */ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c b/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c new file mode 100644 index 000000000..bdcfb383a --- /dev/null +++ b/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c @@ -0,0 +1,126 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/wdg_lld.c + * @brief WDG Driver subsystem low level driver source. + * + * @addtogroup WDG + * @{ + */ + +#include "hal.h" + +#if HAL_USE_WDG || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define KR_KEY_RELOAD 0xAAAAU +#define KR_KEY_ENABLE 0xCCCCU +#define KR_KEY_WRITE 0x5555U +#define KR_KEY_PROTECT 0x0000U + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +#if STM32_WDG_USE_IWDG || defined(__DOXYGEN__) +WDGDriver WDGD1; +#endif + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level WDG driver initialization. + * + * @notapi + */ +void wdg_lld_init(void) { + +#if STM32_WDG_USE_IWDG + WDGD1.state = WDG_STOP; + WDGD1.wdg = IWDG; +#endif +} + +/** + * @brief Configures and activates the WDG peripheral. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @notapi + */ +void wdg_lld_start(WDGDriver *wdgp) { + + /* Unlock IWDG.*/ + wdgp->wdg->KR = KR_KEY_WRITE; + + /* Write configuration.*/ + wdgp->wdg->PR = wdgp->config->pr; + wdgp->wdg->RLR = wdgp->config->rlr; + wdgp->wdg->WINR = wdgp->config->winr; + while (wdgp->wdg->SR != 0) + ; + + /* Start operations.*/ + wdgp->wdg->KR = KR_KEY_RELOAD; + wdgp->wdg->KR = KR_KEY_ENABLE; +} + +/** + * @brief Deactivates the WDG peripheral. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @api + */ +void wdg_lld_stop(WDGDriver *wdgp) { + + osalDbgAssert(wdgp->state == WDG_STOP, + "IWDG cannot be stopped once activated"); +} + +/** + * @brief Reloads WDG's counter. + * + * @param[in] idwgp pointer to the @p WDGDriver object + * + * @notapi + */ +void wdg_lld_reset(WDGDriver * wdgp) { + + wdgp->wdg->KR = KR_KEY_RELOAD; +} + +#endif /* HAL_USE_WDG */ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.h b/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.h new file mode 100644 index 000000000..ba8accfe5 --- /dev/null +++ b/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.h @@ -0,0 +1,176 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file wdg_lld.h + * @brief WDG Driver subsystem low level driver header. + * + * @addtogroup WDG + * @{ + */ + +#ifndef _WDG_LLD_H_ +#define _WDG_LLD_H_ + +#if HAL_USE_WDG || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name RLR register definitions + * @{ + */ +#define STM32_IWDG_RL_MASK (0x00000FFF << 0) +#define STM32_IWDG_RL(n) ((n) << 0) +/** @} */ + +/** + * @name PR register definitions + * @{ + */ +#define STM32_IWDG_PR_MASK (7 << 0) +#define STM32_IWDG_PR_4 0U +#define STM32_IWDG_PR_8 1U +#define STM32_IWDG_PR_16 2U +#define STM32_IWDG_PR_32 3U +#define STM32_IWDG_PR_64 4U +#define STM32_IWDG_PR_128 5U +#define STM32_IWDG_PR_256 6U +/** @} */ + +/** + * @name WINR register definitions + * @{ + */ +#define STM32_IWDG_WIN_MASK (0x00000FFF << 0) +#define STM32_IWDG_WIN(n) ((n) << 0) +#define STM32_IWDG_WIN_DISABLED STM32_IWDG_WIN(0x00000FFF) +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief IWDG driver enable switch. + * @details If set to @p TRUE the support for IWDG is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_WDG_USE_IWDG) || defined(__DOXYGEN__) +#define STM32_WDG_USE_IWDG FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !STM32_WDG_USE_IWDG +#error "WDG driver activated but no xWDG peripheral assigned" +#endif + +#if !defined(STM32_LSI_ENABLED) +#error "STM32_LSI_ENABLED not defined" +#endif + +#if STM32_LSI_ENABLED == FALSE +#error "IWDG requires LSI clock" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a structure representing an WDG driver. + */ +typedef struct WDGDriver WDGDriver; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Configuration of the IWDG_PR register. + * @details See the STM32 reference manual for details. + */ + uint8_t pr; + /** + * @brief Configuration of the IWDG_RLR register. + * @details See the STM32 reference manual for details. + */ + uint16_t rlr; + /** + * @brief Configuration of the IWDG_WINR register. + * @details See the STM32 reference manual for details. + */ + uint16_t winr; +} WDGConfig; + +/** + * @brief Structure representing an WDG driver. + */ +struct WDGDriver { + /** + * @brief Driver state. + */ + wdgstate_t state; + /** + * @brief Current configuration data. + */ + const WDGConfig *config; + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the IWDG registers block. + */ + IWDG_TypeDef *wdg; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if STM32_WDG_USE_IWDG && !defined(__DOXYGEN__) +extern WDGDriver WDGD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void wdg_lld_init(void); + void wdg_lld_start(WDGDriver *wdgp); + void wdg_lld_stop(WDGDriver *wdgp); + void wdg_lld_reset(WDGDriver *wdgp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_WDG */ + +#endif /* _WDG_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk index 78fbaaa4c..43fff73c7 100644 --- a/os/hal/ports/STM32/STM32F3xx/platform.mk +++ b/os/hal/ports/STM32/STM32F3xx/platform.mk @@ -49,6 +49,9 @@ endif ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),) PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1/usb_lld.c endif +ifneq ($(findstring HAL_USE_WDG TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c +endif else PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \ $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/hal_lld.c \ @@ -68,7 +71,8 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \ $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/st_lld.c \ $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c \ $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c \ - $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1/usb_lld.c + $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1/usb_lld.c \ + $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c endif # Required include directories @@ -84,4 +88,5 @@ PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \ $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2 \ $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \ $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2 \ - $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1 + $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1 \ + $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1 diff --git a/os/hal/src/hal.c b/os/hal/src/hal.c index 9654ac84d..055cde8a6 100644 --- a/os/hal/src/hal.c +++ b/os/hal/src/hal.c @@ -118,6 +118,9 @@ void halInit(void) { #if (HAL_USE_RTC == TRUE) || defined(__DOXYGEN__) rtcInit(); #endif +#if (HAL_USE_WDG == TRUE) || defined(__DOXYGEN__) + wdgInit(); +#endif /* Community driver overlay initialization.*/ #if defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) diff --git a/os/hal/src/spi.c b/os/hal/src/spi.c index dfa7f91a9..ac7ff2c13 100644 --- a/os/hal/src/spi.c +++ b/os/hal/src/spi.c @@ -102,9 +102,9 @@ void spiStart(SPIDriver *spip, const SPIConfig *config) { } /** - * @brief Deactivates the SPI peripheral. - * @note Deactivating the peripheral also enforces a release of the slave - * select line. + * @brief Deactivates the SPI peripheral. + * @note Deactivating the peripheral also enforces a release of the slave + * select line. * * @param[in] spip pointer to the @p SPIDriver object * diff --git a/os/hal/src/wdg.c b/os/hal/src/wdg.c new file mode 100644 index 000000000..deb8e0ce9 --- /dev/null +++ b/os/hal/src/wdg.c @@ -0,0 +1,120 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file wdg.c + * @brief WDG Driver code. + * + * @addtogroup WDG + * @{ + */ + +#include "hal.h" + +#if HAL_USE_WDG || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief WDG Driver initialization. + * @note This function is implicitly invoked by @p halInit(), there is + * no need to explicitly initialize the driver. + * + * @init + */ +void wdgInit(void) { + + wdg_lld_init(); +} + +/** + * @brief Configures and activates the WDG peripheral. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * @param[in] config pointer to the @p WDGConfig object + * + * @api + */ +void wdgStart(WDGDriver *wdgp, const WDGConfig *config) { + + osalDbgCheck((wdgp != NULL) && (config != NULL)); + + osalSysLock(); + osalDbgAssert((wdgp->state == WDG_STOP) || (wdgp->state == WDG_READY), + "invalid state"); + wdgp->config = config; + wdg_lld_start(wdgp); + wdgp->state = WDG_READY; + osalSysUnlock(); +} + +/** + * @brief Deactivates the WDG peripheral. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @api + */ +void wdgStop(WDGDriver *wdgp) { + + osalDbgCheck(wdgp != NULL); + + osalSysLock(); + osalDbgAssert((wdgp->state == WDG_STOP) || (wdgp->state == WDG_READY), + "invalid state"); + wdg_lld_stop(wdgp); + wdgp->state = WDG_STOP; + osalSysUnlock(); +} + +/** + * @brief Resets WDG's counter. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @api + */ +void wdgReset(WDGDriver *wdgp) { + + osalDbgCheck(wdgp != NULL); + + osalSysLock(); + osalDbgAssert(wdgp->state == WDG_READY, "not ready"); + wdgResetI(wdgp); + osalSysUnlock(); +} + +#endif /* HAL_USE_WDG */ + +/** @} */ diff --git a/readme.txt b/readme.txt index 360373d30..8fefe6b4a 100644 --- a/readme.txt +++ b/readme.txt @@ -77,6 +77,7 @@ - HAL: Introduced preliminary support for STM32F7xx devices. - HAL: Introduced preliminary support for STM32L4xx devices. - HAL: Introduced preliminary support for STM32L0xx devices. +- HAL: Added watchdog driver model (WDG). - HAL: Added synchronous API and mutual exclusion to the UART driver. - HAL: Added PAL driver for STM32L4xx GPIOv3 peripheral. - HAL: Added I2S driver for STM32 SPIv2 peripheral. diff --git a/testhal/STM32/STM32F3xx/ADC/readme.txt b/testhal/STM32/STM32F3xx/ADC/readme.txt index 2b38919c2..5c81e2aa9 100644 --- a/testhal/STM32/STM32F3xx/ADC/readme.txt +++ b/testhal/STM32/STM32F3xx/ADC/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - ADC driver demo for STM32F30x. ** +** ChibiOS/HAL - ADC driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x ADC driver. +The application demonstrates the use of the STM32F3xx ADC driver. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/ADC_DUAL/readme.txt b/testhal/STM32/STM32F3xx/ADC_DUAL/readme.txt index 2b38919c2..5c81e2aa9 100644 --- a/testhal/STM32/STM32F3xx/ADC_DUAL/readme.txt +++ b/testhal/STM32/STM32F3xx/ADC_DUAL/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - ADC driver demo for STM32F30x. ** +** ChibiOS/HAL - ADC driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x ADC driver. +The application demonstrates the use of the STM32F3xx ADC driver. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/CAN/readme.txt b/testhal/STM32/STM32F3xx/CAN/readme.txt index d84b1f7de..abc63ef1b 100644 --- a/testhal/STM32/STM32F3xx/CAN/readme.txt +++ b/testhal/STM32/STM32F3xx/CAN/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - CAN driver demo for STM32F30x. ** +** ChibiOS/HAL - CAN driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x CAN driver. +The application demonstrates the use of the STM32F3xx CAN driver. ** Build Procedure ** diff --git a/testhal/STM32/STM32F3xx/DAC/readme.txt b/testhal/STM32/STM32F3xx/DAC/readme.txt index 11d1bea6a..a702cddff 100644 --- a/testhal/STM32/STM32F3xx/DAC/readme.txt +++ b/testhal/STM32/STM32F3xx/DAC/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - DAC driver demo for STM32F30x. ** +** ChibiOS/HAL - DAC driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an ST STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x DAC driver. +The application demonstrates the use of the STM32F3xx DAC driver. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/EXT/readme.txt b/testhal/STM32/STM32F3xx/EXT/readme.txt index 30839f8e9..e38ba66a6 100644 --- a/testhal/STM32/STM32F3xx/EXT/readme.txt +++ b/testhal/STM32/STM32F3xx/EXT/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - EXT driver demo for STM32F30x. ** +** ChibiOS/HAL - EXT driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x EXT driver. +The application demonstrates the use of the STM32F3xx EXT driver. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/IRQ_STORM/readme.txt b/testhal/STM32/STM32F3xx/IRQ_STORM/readme.txt index a505c5042..ff39a9871 100644 --- a/testhal/STM32/STM32F3xx/IRQ_STORM/readme.txt +++ b/testhal/STM32/STM32F3xx/IRQ_STORM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - IRQ_STORM stress test demo for STM32F30x. ** +** ChibiOS/HAL - IRQ_STORM stress test demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x GPT, PAL and Serial +The application demonstrates the use of the STM32F3xx GPT, PAL and Serial drivers in order to implement a system stress demo. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/PWM-ICU/readme.txt b/testhal/STM32/STM32F3xx/PWM-ICU/readme.txt index 6e2e5280b..910aff0e5 100644 --- a/testhal/STM32/STM32F3xx/PWM-ICU/readme.txt +++ b/testhal/STM32/STM32F3xx/PWM-ICU/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - PWM-ICU drivers demo for STM32F30x. ** +** ChibiOS/HAL - PWM-ICU drivers demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x PWM-ICU drivers. +The application demonstrates the use of the STM32F3xx PWM-ICU drivers. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/SPI/readme.txt b/testhal/STM32/STM32F3xx/SPI/readme.txt index ebd6bf5a4..595e1b247 100644 --- a/testhal/STM32/STM32F3xx/SPI/readme.txt +++ b/testhal/STM32/STM32F3xx/SPI/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - SPI driver demo for STM32F30x. ** +** ChibiOS/HAL - SPI driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an ST STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x SPI driver. +The application demonstrates the use of the STM32F3xx SPI driver. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/UART/readme.txt b/testhal/STM32/STM32F3xx/UART/readme.txt index 63293a679..f4a897518 100644 --- a/testhal/STM32/STM32F3xx/UART/readme.txt +++ b/testhal/STM32/STM32F3xx/UART/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - UART driver demo for STM32F30x. ** +** ChibiOS/HAL - UART driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x UART driver. +The application demonstrates the use of the STM32F3xx UART driver. ** Board Setup ** diff --git a/testhal/STM32/STM32F3xx/USB_CDC/readme.txt b/testhal/STM32/STM32F3xx/USB_CDC/readme.txt index 2f54c6036..a8e89bca9 100644 --- a/testhal/STM32/STM32F3xx/USB_CDC/readme.txt +++ b/testhal/STM32/STM32F3xx/USB_CDC/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - USB-CDC driver demo for STM32F30x. ** +** ChibiOS/HAL - USB-CDC driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an ST STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x USB driver. +The application demonstrates the use of the STM32F3xx USB driver. ** Build Procedure ** diff --git a/testhal/STM32/STM32F3xx/USB_CDC_IAD/readme.txt b/testhal/STM32/STM32F3xx/USB_CDC_IAD/readme.txt index 6942ee988..3f261cd6e 100644 --- a/testhal/STM32/STM32F3xx/USB_CDC_IAD/readme.txt +++ b/testhal/STM32/STM32F3xx/USB_CDC_IAD/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/HAL - USB-CDC (IAD descriptors) driver demo for STM32F30x. ** +** ChibiOS/HAL - USB-CDC (IAD descriptors) driver demo for STM32F3xx. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an ST STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F30x USB driver. +The application demonstrates the use of the STM32F3xx USB driver. ** Build Procedure ** diff --git a/testhal/STM32/STM32F3xx/WDG/.cproject b/testhal/STM32/STM32F3xx/WDG/.cproject new file mode 100644 index 000000000..5909ca37a --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/.cproject @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32/STM32F3xx/WDG/.project b/testhal/STM32/STM32F3xx/WDG/.project new file mode 100644 index 000000000..e1e78a8a0 --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/.project @@ -0,0 +1,38 @@ + + + STM32F3xx-WDG + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32/STM32F3xx/WDG/Makefile b/testhal/STM32/STM32F3xx/WDG/Makefile new file mode 100644 index 000000000..c01cfa725 --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/Makefile @@ -0,0 +1,216 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../.. +# Startup files. +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +#include $(CHIBIOS)/test/rt/test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(STARTUPSRC) \ + $(KERNSRC) \ + $(PORTSRC) \ + $(OSALSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) + +INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/STM32/STM32F3xx/WDG/chconf.h b/testhal/STM32/STM32F3xx/WDG/chconf.h new file mode 100644 index 000000000..405149b3b --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/chconf.h @@ -0,0 +1,499 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 32 + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#define CH_CFG_ST_FREQUENCY 10000 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#define CH_CFG_TIME_QUANTUM 0 + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#define CH_CFG_NO_IDLE_THREAD FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#define CH_CFG_OPTIMIZE_SPEED TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_TM TRUE + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_REGISTRY TRUE + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_WAITEXIT TRUE + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MUTEXES TRUE + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_CONDVARS TRUE + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MESSAGES TRUE + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_QUEUES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#define CH_CFG_USE_DYNAMIC TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS TRUE + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK TRUE + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS TRUE + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS TRUE + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_TRACE TRUE + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#define CH_DBG_ENABLE_STACK_CHECK TRUE + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_FILL_THREADS TRUE + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#define CH_DBG_THREADS_PROFILING FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/WDG/debug/STM32F3xx-WDG (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F3xx/WDG/debug/STM32F3xx-WDG (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..aaefc61f0 --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/debug/STM32F3xx-WDG (OpenOCD, Flash and Run).launch @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32/STM32F3xx/WDG/halconf.h b/testhal/STM32/STM32F3xx/WDG/halconf.h new file mode 100644 index 000000000..049735c62 --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/halconf.h @@ -0,0 +1,361 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/WDG/main.c b/testhal/STM32/STM32F3xx/WDG/main.c new file mode 100644 index 000000000..aeec0e35a --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/main.c @@ -0,0 +1,58 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Watchdog deadline set to one second (LSI=40000 / 4 / 1000). + */ +static const WDGConfig wdgcfg = { + STM32_IWDG_PR_4, + STM32_IWDG_RL(1000), + STM32_IWDG_WIN_DISABLED +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Starting the watchdog driver. + */ + wdgStart(&WDGD1, &wdgcfg); + + /* + * Normal main() thread activity, it resets the watchdog. + */ + while (true) { + wdgReset(&WDGD1); + palToggleLine(LINE_LED4_BLUE); + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/STM32F3xx/WDG/mcuconf.h b/testhal/STM32/STM32F3xx/WDG/mcuconf.h new file mode 100644 index 000000000..304b82a90 --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/mcuconf.h @@ -0,0 +1,241 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * STM32F3xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F3xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 TRUE +#define STM32_DAC_USE_DAC1_CH2 TRUE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_USE_DMA TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG TRUE + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/STM32/STM32F3xx/WDG/readme.txt b/testhal/STM32/STM32F3xx/WDG/readme.txt new file mode 100644 index 000000000..46b93c1ba --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/HAL - WDG driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx WDG driver. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/STM32F3xx/WDG/us.stackdump b/testhal/STM32/STM32F3xx/WDG/us.stackdump new file mode 100644 index 000000000..b6c926505 --- /dev/null +++ b/testhal/STM32/STM32F3xx/WDG/us.stackdump @@ -0,0 +1,21 @@ +MSYS-1.0.18 Build:2012-11-21 22:34 +Exception: STATUS_ACCESS_VIOLATION at eip=7714D968 +eax=006FB7C0 ebx=FFFFFFFA ecx=FFFFFFFE edx=00000004 esi=003C0114 edi=003C0118 +ebp=0028F3F0 esp=0028F3A0 program=us +cs=0023 ds=002B es=002B fs=0053 gs=002B ss=002B +Stack trace: +Frame Function Args +0028F3F0 7714D968 (00000000, 00000000, 00000022, 003D0F38) +0028F418 7714D877 (003C0114, 00000000, 00000000, 00000000) +0028F6A8 6083D7BB (003C0000, 003D0F38, 608AAC61, 00000022) +0028FD38 6083CE56 (003C0000, 000F003F, 00012000, 003C0000) +0028FD78 6083D2A8 (003C0000, 608F0104, 00011044, 00000000) +0028FEC8 60855079 (6089C6C8, 00000000, FFFFFFFE, 77146D5E) +0028FF18 60804035 (6089C740, FFFFFFFE, 00000054, 6089C6A4) +0028FF58 60804955 (00000000, 00000000, 00000000, 00000000) +0028FF78 00403EBF (004011B0, 037F0000, 0028FF94, 756F336A) +0028FF88 0040103E (7EFDE000, 0028FFD4, 77149882, 7EFDE000) +0028FF94 756F336A (7EFDE000, 76283B26, 00000000, 00000000) +0028FFD4 77149882 (00401000, 7EFDE000, 00000000, 00000000) +0028FFEC 77149855 (00401000, 7EFDE000, 00000000, 00905A4D) +End of stack trace \ No newline at end of file