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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4342 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2012-06-24 07:25:22 +00:00
parent 02ee640478
commit 30400ff287
5 changed files with 32 additions and 3 deletions
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9
os/hal/platforms/STM32/sdc_lld.c
View File

@ -277,6 +277,9 @@ static void sdc_lld_error_cleanup(SDCDriver *sdcp,
/* Driver interrupt handlers. */ /* Driver interrupt handlers. */
/*===========================================================================*/ /*===========================================================================*/
#if !defined(STM32_SDIO_HANDLER)
#error "STM32_SDIO_HANDLER not defined"
#endif
/** /**
* @brief SDIO IRQ handler. * @brief SDIO IRQ handler.
* @details It just wakes transaction thread. All error handling performs in * @details It just wakes transaction thread. All error handling performs in
@ -284,7 +287,7 @@ static void sdc_lld_error_cleanup(SDCDriver *sdcp,
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(SDIO_IRQHandler) { CH_IRQ_HANDLER(STM32_SDIO_HANDLER) {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -352,7 +355,7 @@ void sdc_lld_start(SDCDriver *sdcp) {
#if (defined(STM32F4XX) || defined(STM32F2XX)) #if (defined(STM32F4XX) || defined(STM32F2XX))
dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL); dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
#endif #endif
nvicEnableVector(SDIO_IRQn, nvicEnableVector(STM32_SDIO_NUMBER,
CORTEX_PRIORITY_MASK(STM32_SDC_SDIO_IRQ_PRIORITY)); CORTEX_PRIORITY_MASK(STM32_SDC_SDIO_IRQ_PRIORITY));
rccEnableSDIO(FALSE); rccEnableSDIO(FALSE);
} }
@ -380,7 +383,7 @@ void sdc_lld_stop(SDCDriver *sdcp) {
SDIO->DTIMER = 0; SDIO->DTIMER = 0;
/* Clock deactivation.*/ /* Clock deactivation.*/
nvicDisableVector(SDIO_IRQn); nvicDisableVector(STM32_SDIO_NUMBER);
dmaStreamRelease(sdcp->dma); dmaStreamRelease(sdcp->dma);
rccDisableSDIO(FALSE); rccDisableSDIO(FALSE);
} }

8
os/hal/platforms/STM32/sdc_lld.h
View File

@ -121,6 +121,14 @@
#error "SDIO not present in the selected device" #error "SDIO not present in the selected device"
#endif #endif
#if !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SDC_SDIO_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to SDIO"
#endif
#if !STM32_DMA_IS_VALID_PRIORITY(STM32_SDC_SDIO_DMA_PRIORITY)
#error "Invalid DMA priority assigned to SDIO"
#endif
#if !defined(STM32_DMA_REQUIRED) #if !defined(STM32_DMA_REQUIRED)
#define STM32_DMA_REQUIRED #define STM32_DMA_REQUIRED
#endif #endif

6
os/hal/platforms/STM32F1xx/stm32_isr.h
View File

@ -58,6 +58,12 @@
#define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn #define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn
#define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn #define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn
/*
* SDIO unit.
*/
#define STM32_SDIO_HANDLER SDIO_IRQHandler
#define STM32_SDIO_NUMBER SDIO_IRQn
/* /*
* TIM units. * TIM units.
*/ */

6
os/hal/platforms/STM32F2xx/stm32_isr.h
View File

@ -58,6 +58,12 @@
#define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn #define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn
#define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn #define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn
/*
* SDIO unit.
*/
#define STM32_SDIO_HANDLER SDIO_IRQHandler
#define STM32_SDIO_NUMBER SDIO_IRQn
/* /*
* TIM units. * TIM units.
*/ */

6
os/hal/platforms/STM32F4xx/stm32_isr.h
View File

@ -58,6 +58,12 @@
#define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn #define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn
#define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn #define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn
/*
* SDIO unit.
*/
#define STM32_SDIO_HANDLER SDIO_IRQHandler
#define STM32_SDIO_NUMBER SDIO_IRQn
/* /*
* TIM units. * TIM units.
*/ */