Completed PAL support for LPC214x.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1056 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2009-07-04 15:33:21 +00:00
parent 979da15036
commit 2b5e0544c8
12 changed files with 66 additions and 43 deletions

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@ -50,6 +50,7 @@ include ../../test/test.mk
# setting.
CSRC = ../../ports/ARM7/chcore.c \
../../ports/ARM7-LPC214x/vic.c \
../../ports/ARM7-LPC214x/pal_lld.c \
../../ports/ARM7-LPC214x/lpc214x_serial.c \
${KERNSRC} \
${TESTSRC} \

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@ -58,6 +58,18 @@ static CH_IRQ_HANDLER(T0IrqHandler) {
CH_IRQ_EPILOGUE();
}
/*
* Digital I/O ports static configuration as defined in @p board.h.
*/
static const LPC214xFIOConfig config =
{
VAL_PINSEL0,
VAL_PINSEL1,
VAL_PINSEL2,
{VAL_FIO0PIN, VAL_FIO0DIR},
{VAL_FIO1PIN, VAL_FIO1DIR}
};
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
@ -101,14 +113,7 @@ void hwinit0(void) {
/*
* I/O pins configuration.
*/
PINSEL0 = VAL_PINSEL0;
PINSEL1 = VAL_PINSEL1;
PINSEL2 = VAL_PINSEL2;
palInit();
pal_lld_lpc214x_set_direction(IOPORT_A, VAL_FIO0DIR);
palWritePort(IOPORT_A, 0xFFFFFFFF);
pal_lld_lpc214x_set_direction(IOPORT_B, VAL_FIO1DIR);
palWritePort(IOPORT_B, 0xFFFFFFFF);
palInit(&config);
}
/*

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@ -20,9 +20,7 @@
#ifndef _BOARD_H_
#define _BOARD_H_
#ifndef _LPC214X_H_
#include "lpc214x.h"
#endif
#define BOARD_OLIMEX_LCP_P2148
@ -64,6 +62,8 @@
#define VAL_PINSEL2 0x00000004
#define VAL_FIO0DIR 0xB0703C00
#define VAL_FIO1DIR 0x00000000
#define VAL_FIO0PIN 0xFFFFFFFF
#define VAL_FIO1PIN 0xFFFFFFFF
#define PA_LED1 10
#define PA_LED2 11

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@ -113,14 +113,7 @@ void hwinit0(void) {
/*
* I/O pins configuration.
*/
// PINSEL0 = VAL_PINSEL0;
// PINSEL1 = VAL_PINSEL1;
// PINSEL2 = VAL_PINSEL2;
palInit(&config);
// pal_lld_lpc214x_set_direction(IOPORT_A, VAL_FIO0DIR);
// palWritePort(IOPORT_A, 0xFFFFFFFF);
// pal_lld_lpc214x_set_direction(IOPORT_B, VAL_FIO1DIR);
// palWritePort(IOPORT_B, 0xFFFFFFFF);
}
/*

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@ -20,9 +20,7 @@
#ifndef _BOARD_H_
#define _BOARD_H_
#ifndef _LPC214X_H_
#include "lpc214x.h"
#endif
#define BOARD_OLIMEX_LCP_P2148
@ -64,8 +62,8 @@
#define VAL_PINSEL2 0x00000004
#define VAL_FIO0DIR 0xB0703C00
#define VAL_FIO1DIR 0x00000000
#define VAL_FIO0PIN 0x00000000
#define VAL_FIO1PIN 0x00000000
#define VAL_FIO0PIN 0xFFFFFFFF
#define VAL_FIO1PIN 0xFFFFFFFF
#define PA_LED1 10
#define PA_LED2 11

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@ -50,6 +50,7 @@ include ../../test/test.mk
# setting.
CSRC = ../../ports/ARM7/chcore.c \
../../ports/ARM7-LPC214x/vic.c \
../../ports/ARM7-LPC214x/pal_lld.c \
../../ports/ARM7-LPC214x/lpc214x_serial.c \
../../ports/ARM7-LPC214x/lpc214x_ssp.c \
${KERNSRC} \

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@ -58,6 +58,18 @@ static CH_IRQ_HANDLER(T0IrqHandler) {
CH_IRQ_EPILOGUE();
}
/*
* Digital I/O ports static configuration as defined in @p board.h.
*/
static const LPC214xFIOConfig config =
{
VAL_PINSEL0,
VAL_PINSEL1,
VAL_PINSEL2,
{VAL_FIO0PIN, VAL_FIO0DIR},
{VAL_FIO1PIN, VAL_FIO1DIR}
};
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
@ -101,14 +113,7 @@ void hwinit0(void) {
/*
* I/O pins configuration.
*/
PINSEL0 = VAL_PINSEL0;
PINSEL1 = VAL_PINSEL1;
PINSEL2 = VAL_PINSEL2;
palInit();
pal_lld_lpc214x_set_direction(IOPORT_A, VAL_FIO0DIR);
palWritePort(IOPORT_A, 0xFFFFFFFF);
pal_lld_lpc214x_set_direction(IOPORT_B, VAL_FIO1DIR);
palWritePort(IOPORT_B, 0xFFFFFFFF);
palInit(&config);
}
/*

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@ -20,9 +20,7 @@
#ifndef _BOARD_H_
#define _BOARD_H_
#ifndef _LPC214X_H_
#include "lpc214x.h"
#endif
#define BOARD_OLIMEX_LCP_P2148
@ -64,6 +62,8 @@
#define VAL_PINSEL2 0x00000004
#define VAL_FIO0DIR 0xB0703C00
#define VAL_FIO1DIR 0x00000000
#define VAL_FIO0PIN 0xFFFFFFFF
#define VAL_FIO1PIN 0xFFFFFFFF
#define PA_LED1 10
#define PA_LED2 11

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@ -29,7 +29,7 @@
/**
* @brief LPC214x I/O ports configuration.
* @details .
* @details FIO units and PINSEL registers initialization.
*
* @param[in] config the LPC214x ports configuration
*/
@ -64,14 +64,26 @@ void _pal_lld_init(const LPC214xFIOConfig *config) {
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output.
* @note Writing on pads programmed as pull-up or pull-down has the side
* effect to modify the resistor setting because the output latched data
* is used for the resistor selection.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
uint_fast8_t mode) {
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_INPUT:
port->FIO_DIR &= ~mask;
break;
case PAL_MODE_UNCONNECTED:
port->FIO_PIN |= mask;
case PAL_MODE_OUTPUT_PUSHPULL:
port->FIO_DIR |= mask;
break;
}
}
/** @} */

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@ -27,9 +27,7 @@
#ifndef _PAL_LLD_H_
#define _PAL_LLD_H_
#ifndef _LPC214X_H_
#include "lpc214x.h"
#endif
/*===========================================================================*/
/* Unsupported modes and specific modes */
@ -210,9 +208,9 @@ typedef FIO * ioportid_t;
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide.
* @note This function does not alter the @p PxSEL registers. Alternate
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
*/
#define pal_lld_setgroupmode(port, mask, mode) \

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@ -51,8 +51,18 @@
* - Output latched regardless of the pad setting.
* - Direct read of input pads regardless of the pad setting.
* .
* The only non atomic operations are bit toggling and bus/group writing.
* <h2>Supported Setup Modes</h2>
* - @p PAL_MODE_RESET.
* - @p PAL_MODE_UNCONNECTED.
* - @p PAL_MODE_INPUT.
* - @p PAL_MODE_OUTPUT_PUSHPULL.
* .
* Any attempt to setup an invalid mode is ignored.
*
* <h2>Suboptimal Behavior</h2>
* - Pad/port toggling operations are not atomic.
* - Pad/group mode setup is not atomic.
* .
* @ingroup LPC214x
*/

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@ -52,7 +52,7 @@
*
* <h2>Suboptimal Behavior</h2>
* Some GPIO features are less than optimal:
* - Pad/group/port toggling operations are not atomic.
* - Pad/port toggling operations are not atomic.
* - Pad/group mode setup is not atomic.
* - Writing on pads/groups/ports programmed as input with pull-up/down
* resistor can change the resistor setting because the output latch is