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I2C. Code cleanups. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3187 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
barthess 2011-07-31 21:06:23 +00:00
parent b913fe956c
commit 28b3dd95f1
3 changed files with 46 additions and 47 deletions
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45
os/hal/platforms/STM32/i2c_lld.c
View File

@ -26,8 +26,10 @@
/*===========================================================================*/ /*===========================================================================*/
/* Driver constants. */ /* Driver constants. */
/*===========================================================================*/ /*===========================================================================*/
/* TODO: may be? move this defines in i2c_lld.h and mcuconf.h */
#define I2C_STOP_GPT_TIMEOUT 50 /* waiting timer value */ #define I2C_STOP_GPT_TIMEOUT 50 /* waiting timer value */
#define I2C_START_GPT_TIMEOUT 50 /* waiting timer value */ #define I2C_START_GPT_TIMEOUT 50 /* waiting timer value */
#define I2C_POLLING_TIMEOUT 0xFFFF /* timeout for syncronouse driver */
/*===========================================================================*/ /*===========================================================================*/
/* Driver exported variables. */ /* Driver exported variables. */
@ -705,17 +707,20 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr,
uint8_t *txbuf, size_t txbytes, uint8_t *rxbuf, size_t rxbytes) { uint8_t *txbuf, size_t txbytes, uint8_t *rxbuf, size_t rxbytes) {
/* "waiting" for STOP bit routine*/ /* "waiting" for STOP bit routine*/
chDbgAssert(!(i2cp->flags & I2C_FLG_TIMER_ARMED), #if STM32_I2C_I2C1_USE_POLLING_WAIT
"i2c_lld_master_transmit(), #1", "time to STOP is out"); uint32_t timeout = I2C_POLLING_TIMEOUT;
/* TODO: timeout and Assert here */
while((i2cp->id_i2c->CR1 & I2C_CR1_STOP) && timeout)
timeout--;
chDbgAssert((timeout > 0), "i2c_lld_master_transmit(), #1", "time to STOP is out");
#else
chDbgAssert(!(i2cp->flags & I2C_FLG_TIMER_ARMED), "i2c_lld_master_transmit(), #1", "time to STOP is out");
if ((i2cp->id_i2c->CR1 & I2C_CR1_STOP) && i2cp->timer != NULL && i2cp->timer_cfg != NULL){ if ((i2cp->id_i2c->CR1 & I2C_CR1_STOP) && i2cp->timer != NULL && i2cp->timer_cfg != NULL){
gptStartOneShot(i2cp->timer, I2C_STOP_GPT_TIMEOUT); gptStartOneShot(i2cp->timer, I2C_STOP_GPT_TIMEOUT);
i2cp->flags |= I2C_FLG_TIMER_ARMED; i2cp->flags |= I2C_FLG_TIMER_ARMED;
return; return;
} }
else{ #endif /* STM32_I2C_I2C1_USE_POLLING_WAIT */
while(i2cp->id_i2c->CR1 & I2C_CR1_STOP)
;
}
/* init driver fields */ /* init driver fields */
i2cp->slave_addr = slave_addr; i2cp->slave_addr = slave_addr;
@ -762,17 +767,19 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr,
"some interrupt sources not clear"); "some interrupt sources not clear");
/* "waiting" for STOP bit routine*/ /* "waiting" for STOP bit routine*/
chDbgAssert(!(i2cp->flags & I2C_FLG_TIMER_ARMED), #if STM32_I2C_I2C1_USE_POLLING_WAIT
"i2c_lld_master_receive(), #1", "time to STOP is out"); uint32_t timeout = I2C_POLLING_TIMEOUT;
while((i2cp->id_i2c->CR1 & I2C_CR1_STOP) && timeout)
timeout--;
chDbgAssert((timeout > 0), "i2c_lld_master_receive(), #1", "time to STOP is out");
#else
chDbgAssert(!(i2cp->flags & I2C_FLG_TIMER_ARMED), "i2c_lld_master_receive(), #1", "time to STOP is out");
if ((i2cp->id_i2c->CR1 & I2C_CR1_STOP) && i2cp->timer != NULL && i2cp->timer_cfg != NULL){ if ((i2cp->id_i2c->CR1 & I2C_CR1_STOP) && i2cp->timer != NULL && i2cp->timer_cfg != NULL){
gptStartOneShot(i2cp->timer, I2C_STOP_GPT_TIMEOUT); gptStartOneShot(i2cp->timer, I2C_STOP_GPT_TIMEOUT);
i2cp->flags |= I2C_FLG_TIMER_ARMED; i2cp->flags |= I2C_FLG_TIMER_ARMED;
return; return;
} }
else{ #endif /* STM32_I2C_I2C1_USE_POLLING_WAIT */
while(i2cp->id_i2c->CR1 & I2C_CR1_STOP)
;
}
/* init driver fields */ /* init driver fields */
i2cp->slave_addr = slave_addr; i2cp->slave_addr = slave_addr;
@ -826,17 +833,19 @@ void i2c_lld_master_transceive(I2CDriver *i2cp){
i2cp->id_state = I2C_ACTIVE_TRANSCEIVE; i2cp->id_state = I2C_ACTIVE_TRANSCEIVE;
/* "waiting" for START bit routine*/ /* "waiting" for START bit routine*/
chDbgAssert(!(i2cp->flags & I2C_FLG_TIMER_ARMED), #if STM32_I2C_I2C1_USE_POLLING_WAIT
"i2c_lld_master_transceive(), #1", "time to START is out"); uint32_t timeout = I2C_POLLING_TIMEOUT;
while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout);
timeout--;
chDbgAssert((timeout > 0), "i2c_lld_master_transceive(), #1", "time to START is out");
#else
chDbgAssert(!(i2cp->flags & I2C_FLG_TIMER_ARMED), "i2c_lld_master_transceive(), #1", "time to START is out");
if ((i2cp->id_i2c->CR1 & I2C_CR1_START) && i2cp->timer != NULL && i2cp->timer_cfg != NULL){ if ((i2cp->id_i2c->CR1 & I2C_CR1_START) && i2cp->timer != NULL && i2cp->timer_cfg != NULL){
gptStartOneShot(i2cp->timer, I2C_START_GPT_TIMEOUT); gptStartOneShot(i2cp->timer, I2C_START_GPT_TIMEOUT);
i2cp->flags |= I2C_FLG_TIMER_ARMED; i2cp->flags |= I2C_FLG_TIMER_ARMED;
return; return;
} }
else{ #endif /* STM32_I2C_I2C1_USE_POLLING_WAIT */
while(i2cp->id_i2c->CR1 & I2C_CR1_START)
;
}
/* init address fields */ /* init address fields */
if(i2cp->slave_addr & 0x8000){ /* 10-bit mode used */ if(i2cp->slave_addr & 0x8000){ /* 10-bit mode used */

4
os/hal/platforms/STM32/i2c_lld.h
View File

@ -113,7 +113,7 @@
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Serial Driver condition flags type. * @brief I2C Driver condition flags type.
*/ */
typedef uint32_t i2cflags_t; typedef uint32_t i2cflags_t;
@ -211,7 +211,7 @@ struct I2CDriver{
/** /**
* @brief Timer for waiting STOP condition on the bus. * @brief Timer for waiting STOP condition on the bus.
* @details Workaround for STM32 buggy I2C cell. * @details This is workaround for STM32 buggy I2C cell.
*/ */
GPTDriver *timer; GPTDriver *timer;

10
testhal/STM32/I2C/mcuconf.h
View File

@ -164,16 +164,6 @@
#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 #define STM32_I2C_I2C2_USE_GPT_TIM GPTD2
#define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE #define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE
/*
* EXTI system settings.
*/
#define STM32_EXTI0_PRIORITY 5
#define STM32_EXTI1_PRIORITY 5
#define STM32_EXTI2_PRIORITY 5
#define STM32_EXTI3_PRIORITY 5
#define STM32_EXTI4_PRIORITY 5
#define STM32_EXTI9_5_PRIORITY 5
#define STM32_EXTI15_10_PRIORITY 5
/* /*
* USB driver system settings. * USB driver system settings.