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Fixed ADC divider in STM32F4 demos. Completed implemetation of new RR scheduling. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3941 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2012-02-07 19:22:32 +00:00
parent 6583405cee
commit 285d06f3b6
16 changed files with 15 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
os/ports/IAR/ARMCMx/chcore.h
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@ -169,7 +169,7 @@ struct intctx {};
* @brief Inlineable version of this kernel function.
*/
#define chSchIsPreemptionRequired() \
(rlist.r_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
(currp->p_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
firstprio(&rlist.r_queue) >= currp->p_prio)
#else /* CH_TIME_QUANTUM == 0 */
#define chSchIsPreemptionRequired() \

2
os/ports/RVCT/ARMCMx/chcore.h
View File

@ -168,7 +168,7 @@ struct intctx {};
* @brief Inlineable version of this kernel function.
*/
#define chSchIsPreemptionRequired() \
(rlist.r_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
(currp->p_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
firstprio(&rlist.r_queue) >= currp->p_prio)
#else /* CH_TIME_QUANTUM == 0 */
#define chSchIsPreemptionRequired() \

1
readme.txt
View File

@ -90,7 +90,6 @@
to 2.4.0).
- NEW: Revision of the round-robin scheduling, now threads do not lose their
time slice when preempted. Each thread has its own time slices counter.
TODO: Half done, extend it to all ports.
TODO: Seek optimizations.
*** 2.3.5 ***

2
testhal/STM32F4xx/ADC/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/DMA_STORM/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/EXT/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/GPT/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/I2C/mcuconf.h
View File

@ -67,7 +67,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/IRQ_STORM/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/PVD/mcuconf.h
View File

@ -67,7 +67,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/PWM-ICU/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/RTC/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_USE_ADC2 FALSE
#define STM32_ADC_USE_ADC3 FALSE

2
testhal/STM32F4xx/SPI/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE

2
testhal/STM32F4xx/UART/mcuconf.h
View File

@ -66,7 +66,7 @@
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE