git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3416 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2011-10-02 10:19:27 +00:00
parent 741b20ffb6
commit 25fd956628
2 changed files with 30 additions and 30 deletions

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@ -21,10 +21,10 @@
/** /**
* @file stm32_usb.h * @file stm32_usb.h
* @brief STM32 USB registers layout header. * @brief STM32 USB registers layout header.
* @note This file requires definitions from the ST STM32 header file * @note This file requires definitions from the ST STM32 header files
* stm3232f10x.h. * stm32f10x.h or stm32l1xx.h.
* *
* @addtogroup STM32_USB * @addtogroup USB
* @{ * @{
*/ */

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@ -19,7 +19,7 @@
*/ */
/** /**
* @defgroup STM32L1xx_DRIVERS STM32L1xx Drivers * @defgroup STM32_DRIVERS STM32L1xx Drivers
* @details This section describes all the supported drivers on the STM32L1xx * @details This section describes all the supported drivers on the STM32L1xx
* platform and the implementation details of the single drivers. * platform and the implementation details of the single drivers.
* *
@ -27,7 +27,7 @@
*/ */
/** /**
* @defgroup STM32L1xx_HAL STM32L1xx Initialization Support * @defgroup STM32_HAL STM32L1xx Initialization Support
* @details The STM32L1xx HAL support is responsible for system initialization. * @details The STM32L1xx HAL support is responsible for system initialization.
* *
* @section stm32l1xx_hal_1 Supported HW resources * @section stm32l1xx_hal_1 Supported HW resources
@ -43,11 +43,11 @@
* - SYSTICK initialization based on current clock and kernel required rate. * - SYSTICK initialization based on current clock and kernel required rate.
* - DMA support initialization. * - DMA support initialization.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_ADC STM32L1xx ADC Support * @defgroup STM32_ADC STM32L1xx ADC Support
* @details The STM32L1xx ADC driver supports the ADC peripherals using DMA * @details The STM32L1xx ADC driver supports the ADC peripherals using DMA
* channels for maximum performance. * channels for maximum performance.
* *
@ -63,11 +63,11 @@
* - Programmable DMA interrupt priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel.
* - DMA and ADC errors detection. * - DMA and ADC errors detection.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_DMA STM32L1xx DMA Support * @defgroup STM32_DMA STM32L1xx DMA Support
* @details This DMA helper driver is used by the other drivers in order to * @details This DMA helper driver is used by the other drivers in order to
* access the shared DMA resources in a consistent way. * access the shared DMA resources in a consistent way.
* *
@ -81,11 +81,11 @@
* - Automatic DMA clock stop when not in use by any driver. * - Automatic DMA clock stop when not in use by any driver.
* - DMA streams and interrupt vectors sharing among multiple drivers. * - DMA streams and interrupt vectors sharing among multiple drivers.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_EXT STM32L1xx EXT Support * @defgroup STM32_EXT STM32L1xx EXT Support
* @details The STM32L1xx EXT driver uses the EXTI peripheral. * @details The STM32L1xx EXT driver uses the EXTI peripheral.
* *
* @section stm32l1xx_ext_1 Supported HW resources * @section stm32l1xx_ext_1 Supported HW resources
@ -96,11 +96,11 @@
* - Programmable EXTI interrupts priority level. * - Programmable EXTI interrupts priority level.
* - Capability to work as event sources (WFE) rather than interrupt sources. * - Capability to work as event sources (WFE) rather than interrupt sources.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_GPT STM32L1xx GPT Support * @defgroup STM32_GPT STM32L1xx GPT Support
* @details The STM32L1xx GPT driver uses the TIMx peripherals. * @details The STM32L1xx GPT driver uses the TIMx peripherals.
* *
* @section stm32l1xx_gpt_1 Supported HW resources * @section stm32l1xx_gpt_1 Supported HW resources
@ -113,11 +113,11 @@
* peripherals are left in low power mode. * peripherals are left in low power mode.
* - Programmable TIMx interrupts priority level. * - Programmable TIMx interrupts priority level.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_ICU STM32L1xx ICU Support * @defgroup STM32_ICU STM32L1xx ICU Support
* @details The STM32L1xx ICU driver uses the TIMx peripherals. * @details The STM32L1xx ICU driver uses the TIMx peripherals.
* *
* @section stm32l1xx_icu_1 Supported HW resources * @section stm32l1xx_icu_1 Supported HW resources
@ -130,11 +130,11 @@
* peripherals are left in low power mode. * peripherals are left in low power mode.
* - Programmable TIMx interrupts priority level. * - Programmable TIMx interrupts priority level.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_PAL STM32L1xx PAL Support * @defgroup STM32_PAL STM32L1xx PAL Support
* @details The STM32L1xx PAL driver uses the GPIO peripherals. * @details The STM32L1xx PAL driver uses the GPIO peripherals.
* *
* @section stm32l1xx_pal_1 Supported HW resources * @section stm32l1xx_pal_1 Supported HW resources
@ -164,8 +164,8 @@
* - @p PAL_MODE_INPUT_ANALOG. * - @p PAL_MODE_INPUT_ANALOG.
* - @p PAL_MODE_OUTPUT_PUSHPULL. * - @p PAL_MODE_OUTPUT_PUSHPULL.
* - @p PAL_MODE_OUTPUT_OPENDRAIN. * - @p PAL_MODE_OUTPUT_OPENDRAIN.
* - @p PAL_MODE_STM32L1xx_ALTERNATE_PUSHPULL (non standard). * - @p PAL_MODE_STM32_ALTERNATE_PUSHPULL (non standard).
* - @p PAL_MODE_STM32L1xx_ALTERNATE_OPENDRAIN (non standard). * - @p PAL_MODE_STM32_ALTERNATE_OPENDRAIN (non standard).
* . * .
* Any attempt to setup an invalid mode is ignored. * Any attempt to setup an invalid mode is ignored.
* *
@ -175,11 +175,11 @@
* - Pad/port toggling operations are not atomic. * - Pad/port toggling operations are not atomic.
* - Pad/group mode setup is not atomic. * - Pad/group mode setup is not atomic.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_PWM STM32L1xx PWM Support * @defgroup STM32_PWM STM32L1xx PWM Support
* @details The STM32L1xx PWM driver uses the TIMx peripherals. * @details The STM32L1xx PWM driver uses the TIMx peripherals.
* *
* @section stm32l1xx_pwm_1 Supported HW resources * @section stm32l1xx_pwm_1 Supported HW resources
@ -195,11 +195,11 @@
* - Four independent PWM channels per timer. * - Four independent PWM channels per timer.
* - Programmable TIMx interrupts priority level. * - Programmable TIMx interrupts priority level.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_SERIAL STM32L1xx Serial Support * @defgroup STM32_SERIAL STM32L1xx Serial Support
* @details The STM32L1xx Serial driver uses the USART/UART peripherals in a * @details The STM32L1xx Serial driver uses the USART/UART peripherals in a
* buffered, interrupt driven, implementation. * buffered, interrupt driven, implementation.
* *
@ -218,11 +218,11 @@
* - Fully interrupt driven. * - Fully interrupt driven.
* - Programmable priority levels for each UART/USART. * - Programmable priority levels for each UART/USART.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_SPI STM32L1xx SPI Support * @defgroup STM32_SPI STM32L1xx SPI Support
* @details The SPI driver supports the STM32L1xx SPI peripherals using DMA * @details The SPI driver supports the STM32L1xx SPI peripherals using DMA
* channels for maximum performance. * channels for maximum performance.
* *
@ -243,11 +243,11 @@
* - Programmable DMA interrupt priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel.
* - Programmable DMA error hook. * - Programmable DMA error hook.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_UART STM32L1xx UART Support * @defgroup STM32_UART STM32L1xx UART Support
* @details The UART driver supports the STM32L1xx USART peripherals using DMA * @details The UART driver supports the STM32L1xx USART peripherals using DMA
* channels for maximum performance. * channels for maximum performance.
* *
@ -270,11 +270,11 @@
* - Programmable DMA interrupt priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel.
* - Programmable DMA error hook. * - Programmable DMA error hook.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */
/** /**
* @defgroup STM32L1xx_USB STM32L1xx USB Support * @defgroup STM32_USB STM32L1xx USB Support
* @details The USB driver supports the STM32L1xx USB peripheral. * @details The USB driver supports the STM32L1xx USB peripheral.
* *
* @section stm32l1xx_usb_1 Supported HW resources * @section stm32l1xx_usb_1 Supported HW resources
@ -286,5 +286,5 @@
* - Programmable interrupt priority levels. * - Programmable interrupt priority levels.
* - Each endpoint programmable in Control, Bulk and Interrupt modes. * - Each endpoint programmable in Control, Bulk and Interrupt modes.
* . * .
* @ingroup STM32L1xx_DRIVERS * @ingroup STM32_DRIVERS
*/ */