git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4834 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2012-11-20 15:53:33 +00:00
parent 4fa5db982c
commit 24c823f548
9 changed files with 260 additions and 58 deletions

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@ -26,29 +26,27 @@
static const spc_siu_init_t spc_siu_init[] = { static const spc_siu_init_t spc_siu_init[] = {
{PCR(PB, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)}, {PCR(PB, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PB, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT}, {PCR(PB, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
{PCR(PD, PD_BUTTON1), PAL_LOW, PAL_MODE_INPUT}, {PCR(PE, PE_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PD, PD_BUTTON2), PAL_LOW, PAL_MODE_INPUT}, {PCR(PE, PE_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PD, PD_BUTTON3), PAL_LOW, PAL_MODE_INPUT}, {PCR(PE, PE_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PD, PD_BUTTON4), PAL_LOW, PAL_MODE_INPUT}, {PCR(PE, PE_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PD, PD_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, {PCR(PE, PE_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PD, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, {PCR(PE, PE_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PD, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, {PCR(PE, PE_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PD, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, {PCR(PE, PE_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{0, 0, 0} {0, 0, 0}
}; };
/* Initialization array for the PSMI registers.*/ /* Initialization array for the PSMI registers.*/
static const uint8_t spc_padsels_init[SPC5_SIU_NUM_PADSELS] = { static const uint8_t spc_padsels_init[SPC5_SIU_NUM_PADSELS] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
0, 0, 0, 0
}; };
/** /**
* @brief PAL setup. * @brief PAL setup.
*/ */
const PALConfig pal_default_config = const PALConfig pal_default_config = {
{
PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */ PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
spc_siu_init, spc_siu_init,
spc_padsels_init spc_padsels_init

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@ -44,15 +44,15 @@
#define PB_LIN0_TDX 2 #define PB_LIN0_TDX 2
#define PB_LIN0_RDX 3 #define PB_LIN0_RDX 3
#define PD_BUTTON1 0 #define PE_BUTTON1 0
#define PD_BUTTON2 1 #define PE_BUTTON2 1
#define PD_BUTTON3 2 #define PE_BUTTON3 2
#define PD_BUTTON4 3 #define PE_BUTTON4 3
#define PD_LED1 4 #define PE_LED1 4
#define PD_LED2 5 #define PE_LED2 5
#define PD_LED3 6 #define PE_LED3 6
#define PD_LED4 7 #define PE_LED4 7
/* /*
* Support macros. * Support macros.

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@ -47,8 +47,7 @@ static const uint8_t spc_padsels_init[SPC5_SIU_NUM_PADSELS] = {
/** /**
* @brief PAL setup. * @brief PAL setup.
*/ */
const PALConfig pal_default_config = const PALConfig pal_default_config = {
{
PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */ PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
spc_siu_init, spc_siu_init,
spc_padsels_init spc_padsels_init

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@ -103,59 +103,59 @@ static msg_t Thread1(void *arg) {
unsigned i; unsigned i;
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
palClearPad(PD, PD_LED1); palClearPad(PE, PE_LED1);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palClearPad(PD, PD_LED2); palClearPad(PE, PE_LED2);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palClearPad(PD, PD_LED3); palClearPad(PE, PE_LED3);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palClearPad(PD, PD_LED4); palClearPad(PE, PE_LED4);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palSetPad(PD, PD_LED1); palSetPad(PE, PE_LED1);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palSetPad(PD, PD_LED2); palSetPad(PE, PE_LED2);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palSetPad(PD, PD_LED3); palSetPad(PE, PE_LED3);
chThdSleepMilliseconds(100); chThdSleepMilliseconds(100);
palSetPad(PD, PD_LED4); palSetPad(PE, PE_LED4);
chThdSleepMilliseconds(300); chThdSleepMilliseconds(300);
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
palTogglePort(PD, PAL_PORT_BIT(PD_LED1) | PAL_PORT_BIT(PD_LED2) | palTogglePort(PE, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED2) |
PAL_PORT_BIT(PD_LED3) | PAL_PORT_BIT(PD_LED4)); PAL_PORT_BIT(PE_LED3) | PAL_PORT_BIT(PE_LED4));
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
palTogglePort(PD, PAL_PORT_BIT(PD_LED1) | PAL_PORT_BIT(PD_LED2) | palTogglePort(PE, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED2) |
PAL_PORT_BIT(PD_LED3) | PAL_PORT_BIT(PD_LED4)); PAL_PORT_BIT(PE_LED3) | PAL_PORT_BIT(PE_LED4));
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
palTogglePad(PD, PD_LED1); palTogglePad(PE, PE_LED1);
chThdSleepMilliseconds(250); chThdSleepMilliseconds(250);
palTogglePad(PD, PD_LED1); palTogglePad(PE, PE_LED1);
palTogglePad(PD, PD_LED2); palTogglePad(PE, PE_LED2);
chThdSleepMilliseconds(250); chThdSleepMilliseconds(250);
palTogglePad(PD, PD_LED2); palTogglePad(PE, PE_LED2);
palTogglePad(PD, PD_LED3); palTogglePad(PE, PE_LED3);
chThdSleepMilliseconds(250); chThdSleepMilliseconds(250);
palTogglePad(PD, PD_LED3); palTogglePad(PE, PE_LED3);
palTogglePad(PD, PD_LED4); palTogglePad(PE, PE_LED4);
chThdSleepMilliseconds(250); chThdSleepMilliseconds(250);
palTogglePad(PD, PD_LED4); palTogglePad(PE, PE_LED4);
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
palClearPort(PD, PAL_PORT_BIT(PD_LED1) | PAL_PORT_BIT(PD_LED3)); palClearPort(PE, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED3));
palSetPort(PD, PAL_PORT_BIT(PD_LED2) | PAL_PORT_BIT(PD_LED4)); palSetPort(PE, PAL_PORT_BIT(PE_LED2) | PAL_PORT_BIT(PE_LED4));
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
palClearPort(PD, PAL_PORT_BIT(PD_LED2) | PAL_PORT_BIT(PD_LED4)); palClearPort(PE, PAL_PORT_BIT(PE_LED2) | PAL_PORT_BIT(PE_LED4));
palSetPort(PD, PAL_PORT_BIT(PD_LED1) | PAL_PORT_BIT(PD_LED3)); palSetPort(PE, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED3));
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
} }
palSetPort(PD, PAL_PORT_BIT(PD_LED1) | PAL_PORT_BIT(PD_LED2) | palSetPort(PE, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED2) |
PAL_PORT_BIT(PD_LED3) | PAL_PORT_BIT(PD_LED4)); PAL_PORT_BIT(PE_LED3) | PAL_PORT_BIT(PE_LED4));
} }
return 0; return 0;
} }

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@ -0,0 +1,164 @@
***************************************************************************
Options: -O2 -fomit-frame-pointer -falign-functions=16
Settings: SYSCLK=64
***************************************************************************
*** ChibiOS/RT test suite
***
*** Kernel: 2.5.1unstable
*** Compiled: Nov 20 2012 - 16:19:08
*** Compiler: GCC 4.5.2 (build: 2011.11) build on 2011-11-30 Tool Version v1.4
*** Architecture: Power Architecture
*** Core Variant: e200z0
*** Port Info: VLE mode
*** Platform: SPC560B/Cxx Car Body and Convenience
*** Test Board: Generic SPC560B/C
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Threads, enqueuing test #2)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Threads, priority change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.4 (Threads, delays)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.1 (Semaphores, enqueuing)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Semaphores, timeout)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Semaphores, atomic signal-wait)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.4 (Binary Semaphores, functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.1 (Mutexes, priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Mutexes, priority return)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.5 (Mutexes, status)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.6 (CondVar, signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.7 (CondVar, broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.8 (CondVar, boost test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.1 (Messages, loop)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.1 (Mailboxes, queuing and timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.1 (Events, registration and dispatch)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.2 (Events, wait and broadcast)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.3 (Events, timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.1 (Heap, allocation and fragmentation test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.3 (Dynamic APIs, registry and references)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Queues, output queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 199448 msgs/S, 398896 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 167946 msgs/S, 335892 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 167945 msgs/S, 335890 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 582216 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 133232 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 188820 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 51758 reschedules/S, 310548 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 407140 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 593352 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 813014 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 818228 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 643056 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 1052 bytes
--- Thread: 72 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- EventS: 4 bytes
--- EventL: 16 bytes
--- Mutex : 16 bytes
--- CondV.: 8 bytes
--- Queue : 36 bytes
--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------
Final result: SUCCESS

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@ -56,16 +56,31 @@
#define SPC5_LINFLEX1_TXI_NUMBER 100 #define SPC5_LINFLEX1_TXI_NUMBER 100
#define SPC5_LINFLEX1_ERR_NUMBER 101 #define SPC5_LINFLEX1_ERR_NUMBER 101
#define SPC5_HAS_LINFLEX2 FALSE #define SPC5_HAS_LINFLEX2 TRUE
#define SPC5_LINFLEX2_PCTL 50
#define SPC5_LINFLEX2_RXI_HANDLER vector119
#define SPC5_LINFLEX2_TXI_HANDLER vector120
#define SPC5_LINFLEX2_ERR_HANDLER vector121
#define SPC5_LINFLEX2_RXI_NUMBER 119
#define SPC5_LINFLEX2_TXI_NUMBER 120
#define SPC5_LINFLEX2_ERR_NUMBER 121
#define SPC5_HAS_LINFLEX3 FALSE #define SPC5_HAS_LINFLEX3 TRUE
#define SPC5_LINFLEX3_PCTL 51
#define SPC5_LINFLEX3_RXI_HANDLER vector122
#define SPC5_LINFLEX3_TXI_HANDLER vector123
#define SPC5_LINFLEX3_ERR_HANDLER vector124
#define SPC5_LINFLEX3_RXI_NUMBER 122
#define SPC5_LINFLEX3_TXI_NUMBER 123
#define SPC5_LINFLEX3_ERR_NUMBER 124
/* SIU/SIUL attributes.*/ /* SIU/SIUL attributes.*/
#define SPC5_HAS_SIU FALSE #define SPC5_HAS_SIU FALSE
#define SPC5_SIU_PCTL 68
#define SPC5_SIU_SUPPORTS_PORTS TRUE #define SPC5_SIU_SUPPORTS_PORTS TRUE
#define SPC5_SIU_NUM_PORTS 4 #define SPC5_SIU_NUM_PORTS 8
#define SPC5_SIU_NUM_PCRS 108 #define SPC5_SIU_NUM_PCRS 123
#define SPC5_SIU_NUM_PADSELS 36 #define SPC5_SIU_NUM_PADSELS 32
/** @} */ /** @} */
#endif /* _SPC560BC_REGISTRY_H_ */ #endif /* _SPC560BC_REGISTRY_H_ */

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@ -63,7 +63,7 @@
/* SIU/SIUL attributes.*/ /* SIU/SIUL attributes.*/
#define SPC5_HAS_SIU FALSE #define SPC5_HAS_SIU FALSE
#define SPC5_SIU_SUPPORTS_PORTS TRUE #define SPC5_SIU_SUPPORTS_PORTS TRUE
#define SPC5_SIU_NUM_PORTS 4 #define SPC5_SIU_NUM_PORTS 8
#define SPC5_SIU_NUM_PCRS 108 #define SPC5_SIU_NUM_PCRS 108
#define SPC5_SIU_NUM_PADSELS 36 #define SPC5_SIU_NUM_PADSELS 36
/** @} */ /** @} */

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@ -65,6 +65,12 @@
void _pal_lld_init(const PALConfig *config) { void _pal_lld_init(const PALConfig *config) {
unsigned i; unsigned i;
#if defined(SPC5_SIU_PCTL)
/* SIUL clock gating if present.*/
halSPCSetPeripheralClockMode(SPC5_SIU_PCTL,
SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
#endif
/* Initialize PCR registers for undefined pads.*/ /* Initialize PCR registers for undefined pads.*/
for (i = 0; i < SPC5_SIU_NUM_PCRS; i++) for (i = 0; i < SPC5_SIU_NUM_PCRS; i++)
SIU.PCR[i].R = config->default_mode; SIU.PCR[i].R = config->default_mode;

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@ -175,25 +175,45 @@ typedef struct {
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief I/O port 1 identifier. * @brief I/O port A identifier.
*/ */
#define PA 0 #define PA 0
/** /**
* @brief I/O port 2 identifier. * @brief I/O port B identifier.
*/ */
#define PB 1 #define PB 1
/** /**
* @brief I/O port 3 identifier. * @brief I/O port C identifier.
*/ */
#define PC 2 #define PC 2
/** /**
* @brief I/O port 4 identifier. * @brief I/O port D identifier.
*/ */
#define PD 3 #define PD 3
/**
* @brief I/O port E identifier.
*/
#define PE 4
/**
* @brief I/O port F identifier.
*/
#define PF 5
/**
* @brief I/O port G identifier.
*/
#define PG 6
/**
* @brief I/O port H identifier.
*/
#define PH 7
/*===========================================================================*/ /*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */ /* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */ /* functions, if so please put them in pal_lld.c. */