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More detailed settings for DMAv1 driver. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8128 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
Giovanni Di Sirio 2015-07-29 12:55:15 +00:00
parent ade92163ac
commit 20bd480258
5 changed files with 37 additions and 11 deletions
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6
os/hal/ports/STM32/LLD/DMAv1/notes.txt
View File

@ -14,7 +14,11 @@ Driver capability:
The file registry must export:
STM32_ADVANCED_DMA - TRUE if CSELR is present.
STM32_ADVANCED_DMA - TRUE not used by the DMA drivers but other
drivers use it to enable checks on DMA
channels. Probably will be removed in the
future.
STM32_DMA_SUPPORTS_CSELR - TRUE if the DMA have a CSELR register.
STM32_DMAn_NUM_CHANNELS - Number of channels in DMA1.
STM32_DMAn_CHx_HANDLER - Vector name for IRQ "x".
STM32_DMAn_CHxyz_HANDLER - Vector name for shared IRQs "x", "y" and "z".

2
os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
View File

@ -70,7 +70,7 @@
#define STM32_DMA1_CH7_NUMBER STM32_DMA1_CH4567_NUMBER
#endif
#if STM32_ADVANCED_DMA == TRUE
#if STM32_DMA_SUPPORTS_CSELR == TRUE
#define ADDR_DMA1_CSELR &DMA1_CSELR->CSELR
#define ADDR_DMA2_CSELR &DMA2_CSELR->CSELR
#else

16
os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h
View File

@ -157,7 +157,7 @@
* @name Request line selector macro
* @{
*/
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
#if STM32_DMA_SUPPORTS_CSELR || defined(__DOXYGEN__)
#define STM32_DMA_CR_CHSEL_MASK (15U << 16U)
#define STM32_DMA_CR_CHSEL(n) ((n) << 16U)
#else
@ -192,6 +192,18 @@
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_DMA_SUPPORTS_CSELR)
#error "STM32_DMA_SUPPORTS_CSELR not defined in registry"
#endif
#if !defined(STM32_DMA1_NUM_CHANNELS)
#error "STM32_DMA1_NUM_CHANNELS not defined in registry"
#endif
#if !defined(STM32_DMA2_NUM_CHANNELS)
#error "STM32_DMA2_NUM_CHANNELS not defined in registry"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@ -297,7 +309,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
*
* @special
*/
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
#if STM32_DMA_SUPPORTS_CSELR || defined(__DOXYGEN__)
#define dmaStreamSetMode(dmastp, mode) { \
uint32_t cselr = *(dmastp)->cselr; \
cselr &= ~(0x0000000FU << (dmastp)->shift); \

21
os/hal/ports/STM32/STM32F0xx/stm32_registry.h
View File

@ -72,7 +72,8 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -281,7 +282,8 @@
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -501,7 +503,8 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -688,7 +691,8 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -863,7 +867,8 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -1046,7 +1051,8 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -1246,7 +1252,8 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68

3
os/hal/ports/STM32/STM32L0xx/stm32_registry.h
View File

@ -66,6 +66,7 @@
/* DMA attributes.*/
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR TRUE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -288,6 +289,7 @@
/* DMA attributes.*/
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR TRUE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@ -520,6 +522,7 @@
/* DMA attributes.*/
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_CSELR TRUE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68