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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4814 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2012-11-11 09:37:58 +00:00
parent 463b16c3ce
commit 2002722c01
16 changed files with 0 additions and 2219 deletions
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93
boards/NONSTANDARD_MSP430_F5437/board.c
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(__MSP430_HAS_PORTA_R__) || defined(__MSP430_HAS_PORT1_R__)
{VAL_P1OUT, VAL_P1DIR},
#endif
#if defined(__MSP430_HAS_PORTA_R__) || defined(__MSP430_HAS_PORT2_R__)
{VAL_P2OUT, VAL_P2DIR},
#endif
#if defined(__MSP430_HAS_PORTB_R__) || defined(__MSP430_HAS_PORT3_R__)
{VAL_P3OUT, VAL_P3DIR},
#endif
#if defined(__MSP430_HAS_PORTB_R__) || defined(__MSP430_HAS_PORT4_R__)
{VAL_P4OUT, VAL_P4DIR},
#endif
#if defined(__MSP430_HAS_PORTC_R__) || defined(__MSP430_HAS_PORT5_R__)
{VAL_P5OUT, VAL_P5DIR},
#endif
#if defined(__MSP430_HAS_PORTC_R__) || defined(__MSP430_HAS_PORT6_R__)
{VAL_P6OUT, VAL_P6DIR},
#endif
#if defined(__MSP430_HAS_PORTD_R__) || defined(__MSP430_HAS_PORT7_R__)
{VAL_P7OUT, VAL_P7DIR},
#endif
#if defined(__MSP430_HAS_PORTD_R__) || defined(__MSP430_HAS_PORT8_R__)
{VAL_P8OUT, VAL_P8DIR},
#endif
#if defined(__MSP430_HAS_PORTE_R__) || defined(__MSP430_HAS_PORT9_R__)
{VAL_P9OUT, VAL_P9DIR},
#endif
#if defined(__MSP430_HAS_PORTE_R__) || defined(__MSP430_HAS_PORT10_R__)
{VAL_P10OUT, VAL_P10DIR},
#endif
#if defined(__MSP430_HAS_PORTF_R__) || defined(__MSP430_HAS_PORT11_R__)
{VAL_P11OUT, VAL_P11DIR},
#endif
#if defined(__MSP430_HAS_PORTJ_R__)
{VAL_P12OUT, VAL_P12DIR},
#endif
};
#endif
CH_IRQ_HANDLER(TIMER0_A0) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Timer 0 setup, uses SMCLK as source.
*/
TA0CCTL0 = CCIE; /* Interrupt on compare enabled. */
TA0CTL = TACLR; /* Clean start. */
TA0CCR0 = DCOCLK / 4 / CH_FREQUENCY - 1; /* Counter upper limit. */
TA0CTL = TASSEL_2 | ID_2 | MC_1; /* SMCLK, clock divider 4, contionous mode. */
}

108
boards/NONSTANDARD_MSP430_F5437/board.h
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for the NONSTANDARD MSP430-F5437 proto board.
*/
/*
* Board identifier.
*/
#define BOARD_NONSTANDARD_MSP430_F5437
#define BOARD_NAME "NONSTANDARD MSP430-F5437"
/*
* Clock constants.
*/
#define LFXT1CLK (32768) // Hz
#define DCOCLK (20000000ul) // Hz
/*
* Pin definitions for the NONSTANDARD MSP430-F5437 board.
*/
#define P3_O_TXD0 (4)
#define P3_O_TXD0_MASK (1 << P3_O_TXD0)
#define P3_I_RXD0 (5)
#define P3_I_RXD0_MASK (1 << P3_I_RXD0)
#define P5_O_TXD1 (6)
#define P5_O_TXD1_MASK (1 << P5_O_TXD1)
#define P5_I_RXD1 (7)
#define P5_I_RXD1_MASK (1 << P5_I_RXD1)
#define P6_O_GREEN_LED (1)
#define P6_O_GREEN_LED_MASK (1 << P6_O_GREEN_LED)
#define P6_O_RED_LED (2)
#define P6_O_RED_LED_MASK (1 << P6_O_RED_LED)
/*
* Initial I/O ports settings.
*/
#define VAL_P1OUT 0x00
#define VAL_P1DIR 0xFF
#define VAL_P2OUT 0x00
#define VAL_P2DIR 0xFF
#define VAL_P3OUT P3_O_TXD0_MASK
#define VAL_P3DIR ~P3_I_RXD0_MASK
#define VAL_P4OUT 0x00
#define VAL_P4DIR 0xFF
#define VAL_P5OUT P5_O_TXD1_MASK
#define VAL_P5DIR ~P5_I_RXD1_MASK
#define VAL_P6OUT ~P6_O_GREEN_LED_MASK
#define VAL_P6DIR (P6_O_GREEN_LED_MASK | P6_O_RED_LED_MASK)
#define VAL_P7OUT 0x00
#define VAL_P7DIR 0xFF
#define VAL_P8OUT 0x00
#define VAL_P8DIR 0xFF
#define VAL_P9OUT 0x00
#define VAL_P9DIR 0xFF
#define VAL_P10OUT 0x00
#define VAL_P10DIR 0xFF
#define VAL_P11OUT 0x00
#define VAL_P11DIR 0xFF
#define VAL_P12OUT 0x00
#define VAL_P12DIR 0xFF
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/NONSTANDARD_MSP430_F5437/board.mk
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# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/NONSTANDARD_MSP430_F5437/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/NONSTANDARD_MSP430_F5437

78
os/hal/platforms/MSP430X/hal_lld.c
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/hal_lld.c
* @brief MSP430 HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{
*/
#include "ch.h"
#include "hal.h"
#include "F5XX_F6XX_CORE_LIB/HAL_PMM.h"
#include "F5XX_F6XX_CORE_LIB/HAL_UCS.h"
#define HZ_TO_KHZ(f_Hz) (f_Hz/1000)
#define SELECT_PMMCOREV(f_Hz) (f_Hz <= 8000000ul ? PMMCOREV_0 : \
(f_Hz <= 12000000ul ? PMMCOREV_1 : \
(f_Hz <= 20000000ul ? PMMCOREV_2 : PMMCOREV_3)))
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
#if MSP430_USE_CLOCK == MSP430_CLOCK_SOURCE_XT2CLK
#error "XT2CLK is not implemented"
#elif MSP430_USE_CLOCK == MSP430_CLOCK_SOURCE_DCOCLK
SetVCore(SELECT_PMMCOREV(DCOCLK)); /* Set core voltage */
SELECT_FLLREF(SELREF__REFOCLK); /* Set DCO FLL reference = REFO */
SELECT_ACLK(SELA__REFOCLK); /* Set ACLK = REFO */
Init_FLL_Settle(HZ_TO_KHZ(DCOCLK),DCOCLK/LFXT1CLK);
#else
#error "unknown clock source specified"
#endif
}
/** @} */

176
os/hal/platforms/MSP430X/pal_lld.c
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/pal_lld.c
* @brief MSP430 Digital I/O low level driver code.
*
* @addtogroup PAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief MSP430 I/O ports configuration.
* @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT
* and @p PxDIR are configured as specified.
*
* @param[in] config the MSP430 ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
#if defined(__MSP430_HAS_PORTA_R__) || defined(__MSP430_HAS_PORT1_R__)
IOPORT1->iop_full.ie = 0;
IOPORT1->iop_full.ifg = 0;
IOPORT1->iop_full.sel = 0;
IOPORT1->iop_common.out = config->P1Data.out;
IOPORT1->iop_common.dir = config->P1Data.dir;
#endif
#if defined(__MSP430_HAS_PORTA_R__) || defined(__MSP430_HAS_PORT2_R__)
IOPORT2->iop_full.ie = 0;
IOPORT2->iop_full.ifg = 0;
IOPORT2->iop_full.sel = 0;
IOPORT2->iop_common.out = config->P2Data.out;
IOPORT2->iop_common.dir = config->P2Data.dir;
#endif
#if defined(__MSP430_HAS_PORTB_R__) || defined(__MSP430_HAS_PORT3_R__)
IOPORT3->iop_simple.sel = 0;
IOPORT3->iop_common.out = config->P3Data.out;
IOPORT3->iop_common.dir = config->P3Data.dir;
#endif
#if defined(__MSP430_HAS_PORTB_R__) || defined(__MSP430_HAS_PORT4_R__)
IOPORT4->iop_simple.sel = 0;
IOPORT4->iop_common.out = config->P4Data.out;
IOPORT4->iop_common.dir = config->P4Data.dir;
#endif
#if defined(__MSP430_HAS_PORTC_R__) || defined(__MSP430_HAS_PORT5_R__)
IOPORT5->iop_simple.sel = 0;
IOPORT5->iop_common.out = config->P5Data.out;
IOPORT5->iop_common.dir = config->P5Data.dir;
#endif
#if defined(__MSP430_HAS_PORTC_R__) || defined(__MSP430_HAS_PORT6_R__)
IOPORT6->iop_simple.sel = 0;
IOPORT6->iop_common.out = config->P6Data.out;
IOPORT6->iop_common.dir = config->P6Data.dir;
#endif
#if defined(__MSP430_HAS_PORTD_R__) || defined(__MSP430_HAS_PORT7_R__)
IOPORT7->iop_simple.sel = 0;
IOPORT7->iop_common.out = config->P7Data.out;
IOPORT7->iop_common.dir = config->P7Data.dir;
#endif
#if defined(__MSP430_HAS_PORTD_R__) || defined(__MSP430_HAS_PORT8_R__)
IOPORT8->iop_simple.sel = 0;
IOPORT8->iop_common.out = config->P8Data.out;
IOPORT8->iop_common.dir = config->P8Data.dir;
#endif
#if defined(__MSP430_HAS_PORTE_R__) || defined(__MSP430_HAS_PORT9_R__)
IOPORT9->iop_simple.sel = 0;
IOPORT9->iop_common.out = config->P9Data.out;
IOPORT9->iop_common.dir = config->P9Data.dir;
#endif
#if defined(__MSP430_HAS_PORTE_R__) || defined(__MSP430_HAS_PORT10_R__)
IOPORT10->iop_simple.sel = 0;
IOPORT10->iop_common.out = config->P10Data.out;
IOPORT10->iop_common.dir = config->P10Data.dir;
#endif
#if defined(__MSP430_HAS_PORTF_R__) || defined(__MSP430_HAS_PORT11_R__)
IOPORT11->iop_simple.sel = 0;
IOPORT11->iop_common.out = config->P11Data.out;
IOPORT11->iop_common.dir = config->P11Data.dir;
#endif
#if defined(__MSP430_HAS_PORTJ_R__)
IOPORT12->iop_common.out = config->P12Data.out;
IOPORT12->iop_common.dir = config->P12Data.dir;
#endif
}
/**
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide. Unconnected pads are set to
* high logic state by default.
* @note This function does not alter the @p PxSEL registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode) {
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_INPUT:
port->iop_common.dir &= ~mask;
break;
case PAL_MODE_UNCONNECTED:
port->iop_common.out |= mask;
case PAL_MODE_OUTPUT_PUSHPULL:
port->iop_common.dir |= mask;
break;
}
}
#endif /* HAL_USE_PAL */
/** @} */

457
os/hal/platforms/MSP430X/pal_lld.h
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/pal_lld.h
* @brief MSP430 Digital I/O low level driver header.
*
* @addtogroup PAL
* @{
*/
#ifndef _PAL_LLD_H_
#define _PAL_LLD_H_
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Unsupported modes and specific modes */
/*===========================================================================*/
#undef PAL_MODE_INPUT_PULLUP
#undef PAL_MODE_INPUT_PULLDOWN
#undef PAL_MODE_INPUT_ANALOG
#undef PAL_MODE_OUTPUT_OPENDRAIN
/*===========================================================================*/
/* I/O Ports Types and constants. */
/*===========================================================================*/
/**
* @brief Simple MSP430 I/O port.
*/
struct msp430_port_simple_t {
volatile uint8_t in;
volatile uint8_t in_h;
volatile uint8_t out;
volatile uint8_t out_h;
volatile uint8_t dir;
volatile uint8_t dir_h;
volatile uint8_t ren;
volatile uint8_t ren_h;
volatile uint8_t ds;
volatile uint8_t ds_h;
#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__) || defined(__MSP430_HAS_PORTA_R__) || \
defined(__MSP430_HAS_PORT3_R__) || defined(__MSP430_HAS_PORT4_R__) || defined(__MSP430_HAS_PORTB_R__) || \
defined(__MSP430_HAS_PORT5_R__) || defined(__MSP430_HAS_PORT6_R__) || defined(__MSP430_HAS_PORTC_R__) || \
defined(__MSP430_HAS_PORT7_R__) || defined(__MSP430_HAS_PORT8_R__) || defined(__MSP430_HAS_PORTD_R__) || \
defined(__MSP430_HAS_PORT9_R__) || defined(__MSP430_HAS_PORT10_R__) || defined(__MSP430_HAS_PORTE_R__) || \
defined(__MSP430_HAS_PORT11_R__) || defined(__MSP430_HAS_PORTF_R__)
volatile uint8_t sel;
volatile uint8_t sel_h;
#endif
};
/**
* @brief Full MSP430 I/O port.
*/
struct msp430_port_full_t {
volatile uint8_t in;
volatile uint8_t in_h;
volatile uint8_t out;
volatile uint8_t out_h;
volatile uint8_t dir;
volatile uint8_t dir_h;
volatile uint8_t ren;
volatile uint8_t ren_h;
volatile uint8_t ds;
volatile uint8_t ds_h;
#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__) || defined(__MSP430_HAS_PORTA_R__) || \
defined(__MSP430_HAS_PORT3_R__) || defined(__MSP430_HAS_PORT4_R__) || defined(__MSP430_HAS_PORTB_R__) || \
defined(__MSP430_HAS_PORT5_R__) || defined(__MSP430_HAS_PORT6_R__) || defined(__MSP430_HAS_PORTC_R__) || \
defined(__MSP430_HAS_PORT7_R__) || defined(__MSP430_HAS_PORT8_R__) || defined(__MSP430_HAS_PORTD_R__) || \
defined(__MSP430_HAS_PORT9_R__) || defined(__MSP430_HAS_PORT10_R__) || defined(__MSP430_HAS_PORTE_R__) || \
defined(__MSP430_HAS_PORT11_R__) || defined(__MSP430_HAS_PORTF_R__)
volatile uint8_t sel;
volatile uint8_t sel_h;
#endif
#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__) || defined(__MSP430_HAS_PORTA_R__)
volatile uint8_t pad[14];
volatile uint8_t ies;
volatile uint8_t ies_h;
volatile uint8_t ie;
volatile uint8_t ie_h;
volatile uint8_t ifg;
volatile uint8_t ifg_h;
#endif
};
/**
* @brief Simplified MSP430 I/O port representation.
* @details This structure represents the common part of all the MSP430 I/O
* ports.
*/
struct msp430_port_common {
volatile uint8_t in;
volatile uint8_t in_h;
volatile uint8_t out;
volatile uint8_t out_h;
volatile uint8_t dir;
volatile uint8_t dir_h;
};
/**
* @brief Generic MSP430 I/O port.
*/
typedef union {
struct msp430_port_common iop_common;
struct msp430_port_simple_t iop_simple;
struct msp430_port_full_t iop_full;
} msp430_ioport_t;
/**
* @brief Setup registers common to all the MSP430 ports.
*/
typedef struct {
volatile uint8_t out;
volatile uint8_t dir;
} msp430_dio_setup_t;
/**
* @brief MSP430 I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialize the digital I/O
* subsystem. This represents only the initial setup, specific pads
* or whole ports can be reprogrammed at later time.
*/
typedef struct {
#if defined(__MSP430_HAS_PORT1_R__) || \
defined(__MSP430_HAS_PORTA_R__) || \
defined(__DOXYGEN__)
/** @brief Port 1 setup data.*/
msp430_dio_setup_t P1Data;
#endif
#if defined(__MSP430_HAS_PORT2_R__) || \
defined(__MSP430_HAS_PORTA_R__) || \
defined(__DOXYGEN__)
/** @brief Port 2 setup data.*/
msp430_dio_setup_t P2Data;
#endif
#if defined(__MSP430_HAS_PORT3_R__) || \
defined(__MSP430_HAS_PORTB_R__) || \
defined(__DOXYGEN__)
/** @brief Port 3 setup data.*/
msp430_dio_setup_t P3Data;
#endif
#if defined(__MSP430_HAS_PORT4_R__) || \
defined(__MSP430_HAS_PORTB_R__) || \
defined(__DOXYGEN__)
/** @brief Port 4 setup data.*/
msp430_dio_setup_t P4Data;
#endif
#if defined(__MSP430_HAS_PORT5_R__) || \
defined(__MSP430_HAS_PORTC_R__) || \
defined(__DOXYGEN__)
/** @brief Port 5 setup data.*/
msp430_dio_setup_t P5Data;
#endif
#if defined(__MSP430_HAS_PORT6_R__) || \
defined(__MSP430_HAS_PORTC_R__) || \
defined(__DOXYGEN__)
/** @brief Port 6 setup data.*/
msp430_dio_setup_t P6Data;
#endif
#if defined(__MSP430_HAS_PORT7_R__) || \
defined(__MSP430_HAS_PORTD_R__) || \
defined(__DOXYGEN__)
/** @brief Port 7 setup data.*/
msp430_dio_setup_t P7Data;
#endif
#if defined(__MSP430_HAS_PORT8_R__) || \
defined(__MSP430_HAS_PORTD_R__) || \
defined(__DOXYGEN__)
/** @brief Port 8 setup data.*/
msp430_dio_setup_t P8Data;
#endif
#if defined(__MSP430_HAS_PORT9_R__) || \
defined(__MSP430_HAS_PORTE_R__) || \
defined(__DOXYGEN__)
/** @brief Port 9 setup data.*/
msp430_dio_setup_t P9Data;
#endif
#if defined(__MSP430_HAS_PORT10_R__) || \
defined(__MSP430_HAS_PORTE_R__) || \
defined(__DOXYGEN__)
/** @brief Port 10 setup data.*/
msp430_dio_setup_t P10Data;
#endif
#if defined(__MSP430_HAS_PORT11_R__) || \
defined(__MSP430_HAS_PORTF_R__) || \
defined(__DOXYGEN__)
/** @brief Port 11 setup data.*/
msp430_dio_setup_t P11Data;
#endif
#if defined(__MSP430_HAS_PORTJ_R__) || \
defined(__DOXYGEN__)
/** @brief Port 12 setup data.*/
msp430_dio_setup_t P12Data;
#endif
} PALConfig;
/**
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 8
/**
* @brief Whole port mask.
* @details This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
/**
* @brief Digital I/O port sized unsigned type.
*/
typedef uint8_t ioportmask_t;
/**
* @brief Digital I/O modes.
*/
typedef uint16_t iomode_t;
/**
* @brief Port Identifier.
* @details This type can be a scalar or some kind of pointer, do not make
* any assumption about it, use the provided macros when populating
* variables of this type.
*/
typedef msp430_ioport_t *ioportid_t;
/*===========================================================================*/
/* I/O Ports Identifiers. */
/*===========================================================================*/
/**
* @brief I/O port A identifier.
* @details This port identifier is mapped on the MSP430 port 1 (P1).
*/
#if defined(__MSP430_HAS_PORT1_R__) || \
defined(__MSP430_HAS_PORTA_R__) || \
defined(__DOXYGEN__)
#define IOPORT1 ((ioportid_t)(PAIN_+0))
#endif
/**
* @brief I/O port A identifier.
* @details This port identifier is mapped on the MSP430 port 2 (P2).
*/
#if defined(__MSP430_HAS_PORT2_R__) || \
defined(__MSP430_HAS_PORTA_R__) || \
defined(__DOXYGEN__)
#define IOPORT2 ((ioportid_t)(PAIN_+1))
#endif
/**
* @brief I/O port B identifier.
* @details This port identifier is mapped on the MSP430 port 3 (P3).
*/
#if defined(__MSP430_HAS_PORT3_R__) || \
defined(__MSP430_HAS_PORTB_R__) || \
defined(__DOXYGEN__)
#define IOPORT3 ((ioportid_t)(PBIN_+0))
#endif
/**
* @brief I/O port B identifier.
* @details This port identifier is mapped on the MSP430 port 4 (P4).
*/
#if defined(__MSP430_HAS_PORT4_R__) || \
defined(__MSP430_HAS_PORTB_R__) || \
defined(__DOXYGEN__)
#define IOPORT4 ((ioportid_t)(PBIN_+1))
#endif
/**
* @brief I/O port C identifier.
* @details This port identifier is mapped on the MSP430 port 5 (P5).
*/
#if defined(__MSP430_HAS_PORT5_R__) || \
defined(__MSP430_HAS_PORTC_R__) || \
defined(__DOXYGEN__)
#define IOPORT5 ((ioportid_t)(PCIN_+0))
#endif
/**
* @brief I/O port C identifier.
* @details This port identifier is mapped on the MSP430 port 6 (P6).
*/
#if defined(__MSP430_HAS_PORT6_R__) || \
defined(__MSP430_HAS_PORTC_R__) || \
defined(__DOXYGEN__)
#define IOPORT6 ((ioportid_t)(PCIN_+1))
#endif
/**
* @brief I/O port D identifier.
* @details This port identifier is mapped on the MSP430 port 7 (P7).
*/
#if defined(__MSP430_HAS_PORT7_R__) || \
defined(__MSP430_HAS_PORTD_R__) || \
defined(__DOXYGEN__)
#define IOPORT7 ((ioportid_t)(PDIN_+0))
#endif
/**
* @brief I/O port D identifier.
* @details This port identifier is mapped on the MSP430 port 8 (P8).
*/
#if defined(__MSP430_HAS_PORT8_R__) || \
defined(__MSP430_HAS_PORTD_R__) || \
defined(__DOXYGEN__)
#define IOPORT8 ((ioportid_t)(PDIN_+1))
#endif
/**
* @brief I/O port E identifier.
* @details This port identifier is mapped on the MSP430 port 9 (P9).
*/
#if defined(__MSP430_HAS_PORT9_R__) || \
defined(__MSP430_HAS_PORTE_R__) || \
defined(__DOXYGEN__)
#define IOPORT9 ((ioportid_t)(PEIN_+0))
#endif
/**
* @brief I/O port E identifier.
* @details This port identifier is mapped on the MSP430 port 10 (P10).
*/
#if defined(__MSP430_HAS_PORT10_R__) || \
defined(__MSP430_HAS_PORTE_R__) || \
defined(__DOXYGEN__)
#define IOPORT10 ((ioportid_t)(PEIN_+1))
#endif
/**
* @brief I/O port F identifier.
* @details This port identifier is mapped on the MSP430 port 11 (P11).
*/
#if defined(__MSP430_HAS_PORT11_R__) || \
defined(__MSP430_HAS_PORTF_R__) || \
defined(__DOXYGEN__)
#define IOPORT11 ((ioportid_t)(PFIN_+0))
#endif
/**
* @brief I/O port J identifier.
* @details This port identifier is mapped on the MSP430 port J (P12).
*/
#if defined(__MSP430_HAS_PORTJ_R__) || \
defined(__DOXYGEN__)
#define IOPORT12 ((ioportid_t)(PJIN_+0))
#endif
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */
/*===========================================================================*/
/**
* @brief Low level PAL subsystem initialization.
* @details In MSP430 programs all the ports as input.
*
* @param[in] config the MSP430 ports configuration
*
* @notapi
*/
#define pal_lld_init(config) _pal_lld_init(config)
/**
* @brief Reads the physical I/O port states.
* @details This function is implemented by reading the PxIN register, the
* implementation has no side effects.
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->iop_common.in)
/**
* @brief Reads the output latch.
* @details This function is implemented by reading the PxOUT register, the
* implementation has no side effects.
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->iop_common.out)
/**
* @brief Writes a bits mask on a I/O port.
* @details This function is implemented by writing the PxOUT register, the
* implementation has no side effects.
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->iop_common.out = (bits))
/**
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide.
* @note This function does not alter the @p PxSEL registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] offset group bit offset within the port
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, offset, mode) \
_pal_lld_setgroupmode(port, mask << offset, mode)
extern const PALConfig pal_default_config;
#ifdef __cplusplus
extern "C" {
#endif
void _pal_lld_init(const PALConfig *config);
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode);
#ifdef __cplusplus
}
#endif
#endif /* _PAL_LLD_H_ */
#endif /* HAL_USE_PAL */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup MSP430_DRIVERS MSP430 Drivers
* @details This section describes all the supported drivers on the MSP430
* platform and the implementation details of the single drivers.
*
* @ingroup platforms
*/
/**
* @defgroup MSP430_HAL MSP430 Initialization Support
* @details The MSP430 HAL support is responsible for system initialization.
*
* @section msp430_hal_1 Supported HW resources
* - DCOCTL.
* - BCSCTL1.
* - BCSCTL2.
* .
* @section msp430_hal_2 MSP430 HAL driver implementation features
* - Clock source selection.
* .
* @ingroup MSP430_DRIVERS
*/
/**
* @defgroup MSP430_PAL MSP430 PAL Support
* @details The MSP430 PAL driver uses the PORT peripherals.
*
* @section msp430_pal_1 Supported HW resources
* - PORT1 (where present).
* - PORT2 (where present).
* - PORT3 (where present).
* - PORT4 (where present).
* - PORT5 (where present).
* - PORT6 (where present).
* - PORT7 (where present).
* - PORT8 (where present).
* - PORT9 (where present).
* - PORT10 (where present).
* - PORT11 (where present).
* - PORT12 (PORT_J) (where present).
* .
* @section msp430_pal_2 MSP430 PAL driver implementation features
* The PAL driver implementation fully supports the following hardware
* capabilities:
* - 8 bits wide ports.
* - Atomic set/reset/toggle functions because special MSP430 instruction set.
* - Output latched regardless of the pad setting.
* - Direct read of input pads regardless of the pad setting.
* .
* @section msp430_pal_3 Supported PAL setup modes
* The MSP430 PAL driver supports the following I/O modes:
* - @p PAL_MODE_RESET.
* - @p PAL_MODE_UNCONNECTED.
* - @p PAL_MODE_INPUT.
* - @p PAL_MODE_OUTPUT_PUSHPULL.
* .
* Any attempt to setup an invalid mode is ignored.
*
* @section msp430_pal_4 Suboptimal behavior
* The MSP430 PORT is less than optimal in several areas, the limitations
* should be taken in account while using the PAL driver:
* - Bus/group writes is not atomic.
* - Pad/group mode setup is not atomic.
* .
* @ingroup MSP430_DRIVERS
*/
/**
* @defgroup MSP430_SERIAL MSP430 Serial Support
* @details The MSP430 Serial driver uses the USART peripherals in a
* buffered, interrupt driven, implementation.
*
* @section msp430_serial_1 Supported HW resources
* The serial driver can support any of the following hardware resources:
* - USART0.
* - USART1.
* .
* @section msp430_serial_2 MSP430 Serial driver implementation features
* - Each USART can be independently enabled and programmed.
* - Fully interrupt driven.
* .
* @ingroup MSP430_DRIVERS
*/

362
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/serial_lld.c
* @brief MSP430 low level serial driver code.
*
* @addtogroup SERIAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
#if USE_MSP430_USART0 || defined(__DOXYGEN__)
/** @brief USART0 serial driver identifier.*/
SerialDriver SD1;
#endif
#if USE_MSP430_USART1 || defined(__DOXYGEN__)
/** @brief USART1 serial driver identifier.*/
SerialDriver SD2;
#endif
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/** @brief Driver default configuration.*/
static const SerialConfig default_config = {
UBR(SERIAL_DEFAULT_BITRATE),
UCBRS_0 + UCBRF_13 + UCOS16, /* Modln UCBRSx=0, UCBRFx=0, over sampling */
0x00 /* parity disabled, 8-bit data, one stop bit, UART mode, asynchronous mode */
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void set_error(SerialDriver *sdp, uint8_t urctl) {
ioflags_t sts = 0;
if (urctl & UCOE)
sts |= SD_OVERRUN_ERROR;
if (urctl & UCPE)
sts |= SD_PARITY_ERROR;
if (urctl & UCFE)
sts |= SD_FRAMING_ERROR;
if (urctl & UCBRK)
sts |= SD_BREAK_DETECTED;
chSysLockFromIsr();
chIOAddFlagsI(sdp, sts);
chSysUnlockFromIsr();
}
#if USE_MSP430_USART0 || defined(__DOXYGEN__)
static void notify1(GenericQueue *qp) {
(void)qp;
if (!(UCA0IE & UCTXIE)) {
msg_t b = sdRequestDataI(&SD1);
if (b != Q_EMPTY) {
UCA0IE |= UCTXIE;
UCA0TXBUF = (uint8_t)b;
}
}
}
/**
* @brief USART0 initialization.
*
* @param[in] config the architecture-dependent serial driver configuration
*/
static void usart0_init(const SerialConfig *config) {
UCA0CTL1 = UCSWRST; /* Put state machine in reset. */
/* USART init */
P3SEL |= (P3_O_TXD0_MASK | P3_I_RXD0_MASK);
UCA0CTL1 |= UCSSEL_2; /* SMCLK as clock source. */
UCA0MCTL = config->sc_mod; /* Modulator. */
UCA0BR1 = (uint8_t)(config->sc_div >> 8); /* Divider high. */
UCA0BR0 = (uint8_t)(config->sc_div >> 0); /* Divider low. */
/* Clear USART status.*/
(void)UCA0RXBUF;
/* USART enable.*/
UCA0CTL0 = config->sc_ctl; /* Various settings. */
UCA0CTL1 &= ~UCSWRST; /* Initialize USCI state machine. */
UCA0IE |= UCRXIE; /* Enables RX interrupt. */
}
/**
* @brief USART0 de-initialization.
*/
static void usart0_deinit(void) {
UCA0IE &= ~UCRXIE; /* Disables RX interrupt. */
UCA0CTL1 |= UCSWRST; /* Put state machine in reset. */
}
#endif /* USE_MSP430_USART0 */
#if USE_MSP430_USART1 || defined(__DOXYGEN__)
static void notify2(GenericQueue *qp) {
(void)qp;
if (!(UCA1IE & UCTXIE)) {
msg_t b = sdRequestDataI(&SD2);
if (b != Q_EMPTY) {
UCA1IE |= UCTXIE;
UCA1TXBUF = (uint8_t)b;
}
}
}
/**
* @brief USART1 initialization.
*
* @param[in] config the architecture-dependent serial driver configuration
*/
static void usart1_init(const SerialConfig *config) {
UCA1CTL1 = UCSWRST; /* Put state machine in reset. */
/* USART init */
P5SEL |= (P5_O_TXD1_MASK | P5_I_RXD1_MASK);
UCA1CTL1 |= UCSSEL_2; /* SMCLK as clock source. */
UCA1MCTL = config->sc_mod; /* Modulator. */
UCA1BR1 = (uint8_t)(config->sc_div >> 8); /* Divider high. */
UCA1BR0 = (uint8_t)(config->sc_div >> 0); /* Divider low. */
/* Clear USART status.*/
(void)UCA1RXBUF;
/* USART enable.*/
UCA1CTL0 = config->sc_ctl; /* Various settings. */
UCA1CTL1 &= ~UCSWRST; /* Initialize USCI state machine. */
UCA1IE |= UCRXIE; /* Enables RX interrupt. */
}
/**
* @brief USART1 de-initialization.
*/
static void usart1_deinit(void) {
UCA1IE &= ~UCRXIE; /* Disables RX interrupt. */
UCA1CTL1 |= UCSWRST; /* Put state machine in reset. */
}
#endif /* USE_MSP430_USART1 */
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if USE_MSP430_USART0 || defined(__DOXYGEN__)
/**
* @brief USART0 TX interrupt handler segment.
*/
#define _USART0_TRANSMIT_ISR() { \
msg_t b; \
chSysLockFromIsr(); \
b = sdRequestDataI(&SD1); \
chSysUnlockFromIsr(); \
if (b < Q_OK) \
UCA0IE &= ~UCTXIE; \
else \
UCA0TXBUF = b; \
}
/**
* @brief USART0 RX interrupt handler segment.
*/
#define _USART0_RECEIVE_ISR() { \
uint8_t urctl; \
if ((urctl = UCA0STAT) & UCRXERR) \
set_error(&SD1, urctl); \
chSysLockFromIsr(); \
sdIncomingDataI(&SD1, UCA0RXBUF); \
chSysUnlockFromIsr(); \
}
/**
* @brief USART0 TX/RX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USCI_A0) {
CH_IRQ_PROLOGUE();
#if defined(__IAR_SYSTEMS_ICC__)
switch(__even_in_range(UCA0IV,4))
#else
switch(*(volatile uint16_t*)UCA0IV)
#endif
{
case 2: /* Vector 2 - RXIFG */
_USART0_RECEIVE_ISR();
break;
case 4: /* Vector 4 - TXIFG */
_USART0_TRANSMIT_ISR();
break;
default:
break;
}
CH_IRQ_EPILOGUE();
}
#endif /* USE_MSP430_USART0 */
#if USE_MSP430_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 TX interrupt handler segment.
*/
#define _USART1_TRANSMIT_ISR() { \
msg_t b; \
chSysLockFromIsr(); \
b = sdRequestDataI(&SD2); \
chSysUnlockFromIsr(); \
if (b < Q_OK) \
UCA1IE &= ~UCTXIE; \
else \
UCA1TXBUF = b; \
}
/**
* @brief USART0 RX interrupt handler segment.
*/
#define _USART1_RECEIVE_ISR() { \
uint8_t urctl; \
if ((urctl = UCA1STAT) & UCRXERR) \
set_error(&SD2, urctl); \
chSysLockFromIsr(); \
sdIncomingDataI(&SD2, UCA1RXBUF); \
chSysUnlockFromIsr(); \
}
/**
* @brief USART1 TX/RX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USCI_A1) {
CH_IRQ_PROLOGUE();
#if defined(__IAR_SYSTEMS_ICC__)
switch(__even_in_range(UCA1IV,4))
#else
switch(*(volatile uint16_t*)UCA1IV)
#endif
{
case 2: /* Vector 2 - RXIFG */
_USART1_RECEIVE_ISR();
break;
case 4: /* Vector 4 - TXIFG */
_USART1_TRANSMIT_ISR();
break;
default:
break;
}
CH_IRQ_EPILOGUE();
}
#endif /* USE_MSP430_USART1 */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
#if USE_MSP430_USART0
sdObjectInit(&SD1, NULL, notify1);
#endif
#if USE_MSP430_USART1
sdObjectInit(&SD2, NULL, notify2);
#endif
}
/**
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
if (config == NULL)
config = &default_config;
#if USE_MSP430_USART0
if (&SD1 == sdp) {
usart0_init(config);
return;
}
#endif
#if USE_MSP430_USART1
if (&SD2 == sdp) {
usart1_init(config);
return;
}
#endif
}
/**
* @brief Low level serial driver stop.
* @details De-initializes the USART, stops the associated clock, resets the
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {
#if USE_MSP430_USART0
if (&SD1 == sdp) {
usart0_deinit();
return;
}
#endif
#if USE_MSP430_USART1
if (&SD2 == sdp) {
usart1_deinit();
return;
}
#endif
}
#endif /* HAL_USE_SERIAL */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/serial_lld.h
* @brief MSP430 low level serial driver header.
*
* @addtogroup SERIAL
* @{
*/
#ifndef _SERIAL_LLD_H_
#define _SERIAL_LLD_H_
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief USART0 driver enable switch.
* @details If set to @p TRUE the support for USART0 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_MSP430_USART0) || defined(__DOXYGEN__)
#define USE_MSP430_USART0 TRUE
#endif
/**
* @brief USART1 driver enable switch.
* @details If set to @p TRUE the support for USART1 is included.
* @note The default is @p FALSE.
*/
#if !defined(USE_MSP430_USART1) || defined(__DOXYGEN__)
#define USE_MSP430_USART1 TRUE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief MSP430 Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
*/
typedef struct {
/**
* @brief Initialization value for the UBRx registers.
*/
uint16_t sc_div;
/**
* @brief Initialization value for the MOD register.
*/
uint8_t sc_mod;
/**
* @brief Initialization value for the CTL register.
*/
uint8_t sc_ctl;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \
/* Driver state.*/ \
sdstate_t state; \
/* Input queue.*/ \
InputQueue iqueue; \
/* Output queue.*/ \
OutputQueue oqueue; \
/* Input circular buffer.*/ \
uint8_t ib[SERIAL_BUFFERS_SIZE]; \
/* Output circular buffer.*/ \
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
/* End of the mandatory fields.*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Macro for baud rate computation.
* @note Make sure the final baud rate is within tolerance.
*/
#define UBR(b) (SMCLK / (b) / 16)
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if USE_MSP430_USART0 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif
#if USE_MSP430_USART1 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
void sd_lld_stop(SerialDriver *sdp);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SERIAL */
#endif /* _SERIAL_LLD_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/chcore.c
* @brief MSP430 architecture port code.
*
* @addtogroup MSP430_CORE
* @{
*/
#include "ch.h"
/**
* @brief Performs a context switch between two threads.
* @details This is the most critical code in any port, this function
* is responsible for the context switch between 2 threads.
* @note The implementation of this code affects <b>directly</b> the context
* switch performance so optimize here as much as you can.
* @note The function is declared as a weak symbol, it is possible to
* redefine it in your application code.
*
* @param[in] ntp the thread to be switched in
* @param[in] otp the thread to be switched out
*/
#if defined(__IAR_SYSTEMS_ICC__)
#if !defined(__DOXYGEN__)
#pragma no_epilogue
#endif
void port_switch(Thread *ntp, Thread *otp) {
asm ("pushm.a #8, r11");
asm ("mova sp, 10(r13)"); /* Save the current stack pointer (otp-Thread). */
asm ("mova 10(r12), sp"); /* Restore old pointer (of ntp-Thread). */
asm ("popm.a #8, r11");
}
#else
#if !defined(__DOXYGEN__)
__attribute__((naked, weak))
#endif
void port_switch(Thread *ntp, Thread *otp) {
register struct intctx *sp asm("r1");
asm volatile ("pushm.a #8, r11" : : : "memory");
otp->p_ctx.sp = sp;
sp = ntp->p_ctx.sp;
asm volatile ("popm.a #8, r11 \n\t" \
"reta" : : "r" (sp) : "memory");
}
#endif
/**
* @brief Halts the system.
* @details This function is invoked by the operating system when an
* unrecoverable error is detected (for example because a programming
* error in the application code that triggers an assertion while in
* debug mode).
* @note The function is declared as a weak symbol, it is possible to
* redefine it in your application code.
*/
#if !defined(__DOXYGEN__)
#if !defined(__IAR_SYSTEMS_ICC__)
__attribute__((weak))
#endif
#endif
void port_halt(void) {
port_disable();
while (TRUE) {
}
}
#if defined(__IAR_SYSTEMS_ICC__)
#pragma required=chThdExit /* http://tech.groups.yahoo.com/group/msp430/message/32860 */
#endif
/**
* @brief Start a thread by invoking its work function.
* @details If the work function returns @p chThdExit() is automatically
* invoked.
*/
void _port_thread_start(void) {
chSysUnlock();
#if defined(__IAR_SYSTEMS_ICC__)
asm("mova r11, r12"); /* Pass arg to thread (with IAR-Compiler). */
#else
asm("mova r11, r15"); /* Pass arg to thread (with GCC-Compiler). */
#endif
asm("calla r10"); /* Start thread. */
asm("calla #chThdExit"); /* Perform clean up on thread return. */
}
/** @} */

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os/ports/common/MSP430X/chcore.h
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@ -1,316 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/chcore.h
* @brief MSP430 architecture port macros and structures.
*
* @addtogroup MSP430_CORE
* @{
*/
#ifndef _CHCORE_H_
#define _CHCORE_H_
#include <intrinsics.h>
#include "chtypes.h"
#if CH_DBG_ENABLE_STACK_CHECK
#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
#endif
/**
* @brief Enables the use of a wait state in the idle thread loop.
*/
#ifndef ENABLE_WFI_IDLE
#define ENABLE_WFI_IDLE 0
#endif
/**
* @brief Macro defining the MSP430 architecture.
*/
#define CH_ARCHITECTURE_MSP430
/**
* @brief Name of the implemented architecture.
*/
#define CH_ARCHITECTURE_NAME "MSP430"
/**
* @brief Name of the architecture variant (optional).
*/
#define CH_CORE_VARIANT_NAME "MSP430X"
/**
* @brief Name of the compiler supported by this port.
*/
#if defined(__IAR_SYSTEMS_ICC__)
#define CH_COMPILER_NAME __VERSION__
#elif defined(__GNUC__)
#define CH_COMPILER_NAME "GCC "__VERSION__
#else
#error "Unsupported compiler in use."
#endif
/**
* @brief Port-specific information string.
*/
#define CH_PORT_INFO "None"
/**
* @brief 16 bits stack and memory alignment enforcement.
*/
typedef uint16_t stkalign_t;
/**
* @brief Generic MSP430 register.
*/
typedef void *regmsp_t;
/**
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
*/
struct extctx {
regmsp_t r12;
regmsp_t r13;
regmsp_t r14;
regmsp_t r15;
regmsp_t sr;
regmsp_t pc;
};
/**
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching.
*/
struct intctx {
regmsp_t r4;
regmsp_t r5;
regmsp_t r6;
regmsp_t r7;
regmsp_t r8;
regmsp_t r9;
regmsp_t r10;
regmsp_t r11;
regmsp_t pc;
};
/**
* @brief Platform dependent part of the @p Thread structure.
* @details This structure usually contains just the saved stack pointer
* defined as a pointer to a @p intctx structure.
*/
struct context {
struct intctx *sp;
};
/**
* @brief Platform dependent part of the @p chThdCreateI() API.
* @details This code usually setup the context switching frame represented
* by an @p intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace + \
wsize - \
sizeof(struct intctx)); \
tp->p_ctx.sp->r10 = (regmsp_t)pf; \
tp->p_ctx.sp->r11 = arg; \
tp->p_ctx.sp->pc = (regmsp_t)_port_thread_start; \
}
/**
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
* @brief Per-thread stack overhead for interrupts servicing.
* @details This constant is used in the calculation of the correct working
* area size.
* This value can be zero on those architecture where there is a
* separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
* @note In this port the default is 32 bytes per thread.
*/
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 32
#endif
/**
* @brief Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* @brief Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
* @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_PROLOGUE()
/**
* @brief IRQ epilogue code.
* @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_EPILOGUE() { \
dbg_check_lock(); \
if (chSchIsPreemptionRequired()) \
chSchDoReschedule(); \
dbg_check_unlock(); \
}
#define ISRNAME(pre, id) pre##id
/**
* @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the
* port implementation.
*/
#if defined(__IAR_SYSTEMS_ICC__)
#define STRINGVECTOR(x) #x
#define VECTOR_ID(x) STRINGVECTOR( vector=x##_VECTOR )
#define PORT_IRQ_HANDLER(id) \
_Pragma( VECTOR_ID(id) ) \
__interrupt void ISRNAME(vect,id)(void)
#else
//#define PORT_IRQ_HANDLER(id) ISR(id,vect##id)
#define PORT_IRQ_HANDLER(id) void __attribute__((__interrupt__ (id##_VECTOR))) ISRNAME(vect,id)(void)
#endif
/**
* @brief Port-related initialization code.
* @note This function is empty in this port.
*/
#define port_init()
/**
* @brief Kernel-lock action.
* @details Usually this function just disables interrupts but may perform more
* actions.
* @note Implemented as global interrupt disable.
*/
#define port_lock() __disable_interrupt()
/**
* @brief Kernel-unlock action.
* @details Usually this function just enables interrupts but may perform more
* actions.
* @note Implemented as global interrupt enable.
*/
#define port_unlock() __enable_interrupt()
/**
* @brief Kernel-lock action from an interrupt handler.
* @details This function is invoked before invoking I-class APIs from
* interrupt handlers. The implementation is architecture dependent,
* in its simplest form it is void.
* @note This function is empty in this port.
*/
#define port_lock_from_isr()
/**
* @brief Kernel-unlock action from an interrupt handler.
* @details This function is invoked after invoking I-class APIs from interrupt
* handlers. The implementation is architecture dependent, in its
* simplest form it is void.
* @note This function is empty in this port.
*/
#define port_unlock_from_isr()
/**
* @brief Disables all the interrupt sources.
* @note Of course non-maskable interrupt sources are not included.
* @note Implemented as global interrupt disable.
*/
#define port_disable() __disable_interrupt()
/**
* @brief Disables the interrupt sources below kernel-level priority.
* @note Interrupt sources above kernel level remains enabled.
* @note Same as @p port_disable() in this port, there is no difference
* between the two states.
*/
#define port_suspend() __disable_interrupt()
/**
* @brief Enables all the interrupt sources.
* @note Implemented as global interrupt enable.
*/
#define port_enable() __enable_interrupt()
/**
* @brief Enters an architecture-dependent IRQ-waiting mode.
* @details The function is meant to return when an interrupt becomes pending.
* The simplest implementation is an empty function or macro but this
* would not take advantage of architecture-specific power saving
* modes.
* @note This port function is implemented as inlined code for performance
* reasons.
* @note The port code does not define a low power mode, this macro has to
* be defined externally. The default implementation is a "nop", not
* a real low power mode.
*/
#if ENABLE_WFI_IDLE != 0
#ifndef port_wait_for_interrupt
#define port_wait_for_interrupt() { \
__no_operation(); \
}
#endif
#else
#define port_wait_for_interrupt()
#endif
#ifdef __cplusplus
extern "C" {
#endif
void port_switch(Thread *ntp, Thread *otp);
void port_halt(void);
void _port_thread_start(void);
#ifdef __cplusplus
}
#endif
#endif /* _CHCORE_H_ */
/** @} */

81
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@ -1,81 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file MSP430/chtypes.h
* @brief MSP430 architecture port system types.
*
* @addtogroup MSP430_CORE
* @{
*/
#ifndef _CHTYPES_H_
#define _CHTYPES_H_
#define __need_NULL
#define __need_size_t
#define __need_ptrdiff_t
#include <stddef.h>
#if !defined(_STDINT_H) && !defined(__STDINT_H_)
#include <stdint.h>
#endif
typedef int16_t bool_t; /**< Fast boolean type. */
typedef uint8_t tmode_t; /**< Thread flags. */
typedef uint8_t tstate_t; /**< Thread state. */
typedef uint8_t trefs_t; /**< Thread references counter. */
typedef uint16_t tprio_t; /**< Thread priority. */
typedef int16_t msg_t; /**< Inter-thread message. */
typedef int16_t eventid_t; /**< Event Id. */
typedef uint16_t eventmask_t; /**< Events mask. */
typedef uint16_t systime_t; /**< System time. */
typedef int16_t cnt_t; /**< Resources counter. */
/**
* @brief Inline function modifier.
*/
#define INLINE inline
/**
* @brief ROM constant modifier.
* @note It is set to use the "const" keyword in this port.
*/
#define ROMCONST const
/**
* @brief Packed structure modifier (within).
* @note It uses the "packed" GCC attribute.
*/
#define PACK_STRUCT_STRUCT __attribute__((packed))
/**
* @brief Packed structure modifier (before).
*/
#define PACK_STRUCT_BEGIN #pragma pack(1)
/**
* @brief Packed structure modifier (after).
*/
#define PACK_STRUCT_END #pragma pack()
#endif /* _CHTYPES_H_ */
/** @} */

95
os/ports/common/MSP430X/port.dox
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@ -1,95 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup MSP430 MSP430
* @details MSP430 port for the GCC/IAR compiler.
*
* @section MSP430_INTRO Introduction
* This port supports all the cores implementing the MSP430 architecture.
*
* @section MSP430_STATES Mapping of the System States in the MSP430 port
* The ChibiOS/RT logical @ref system_states are mapped as follow in the MSP430
* port:
* - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a
* special hardware state associated.
* - <b>Normal</b>. This is the state the system has after executing
* @p chSysInit(). Interrupts are enabled.
* - <b>Suspended</b>. Interrupts are disabled.
* - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
* Suspended state because there are no fast interrupts in this architecture.
* - <b>Sleep</b>. Not yet implemented.
* - <b>S-Locked</b>. Interrupts are disabled.
* - <b>I-Locked</b>. This state is equivalent to the SRI state, the
* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
* order to formally change state because this may change).
* - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
* - <b>Serving Fast Interrupt</b>. Not present in this architecture.
* - <b>Serving Non-Maskable Interrupt</b>. The MSP430 has several non
* maskable interrupt sources that can be associated to this state.
* - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
* .
* @section MSP430_NOTES The MSP430 port notes
* - The MSP430 does not have a dedicated interrupt stack, make sure to reserve
* enough stack space for interrupts in each thread stack. This can be done
* by modifying the @p INT_REQUIRED_STACK configuration options.
* - The state of the hardware multiplier is not saved in the thread context,
* make sure to use it in <b>Suspended</b> state (interrupts masked).
* - The port code does not define the switch to a low power mode for the
* idle thread because the MSP430 has several low power modes. You can
* select the proper low power mode for you application by defining the
* macro @p port_wait_for_interrupt().
* .
* @ingroup gcc
*/
/**
* @defgroup MSP430_CONF Configuration Options
* @details MSP430 Configuration Options. The MSP430 port allows some
* architecture-specific configurations settings that can be overridden
* by redefining them in @p chconf.h. Usually there is no need to change
* the default values.
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space
* used by the interrupt handlers.<br>
* The default for this value is @p 32, this space is allocated for each
* thread so be careful in order to not waste precious RAM space.
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
* thread. Usually there is no need to change this value unless inserting
* code in the IDLE thread hook macro.
* .
* @ingroup MSP430
*/
/**
* @defgroup MSP430_CORE Core Port Implementation
* @details MSP430 specific port code, structures and macros.
*
* @ingroup MSP430
*/
/**
* @defgroup MSP430_STARTUP Startup Support
* @details ChibiOS/RT doed not provide startup files for the MSP430, there
* are no special startup requirement so the normal toolchain-provided
* startup files can be used.
*
* @ingroup MSP430
*/

6
os/ports/common/MSP430X/port.mk
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@ -1,6 +0,0 @@
# List of the ChibiOS/RT MSP430 port files.
PORTSRC = ${CHIBIOS}/os/ports/common/MSP430X/chcore.c
PORTASM =
PORTINC = ${CHIBIOS}/os/ports/common/MSP430X

87
os/ports/common/MSP430X/rules.mk
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@ -1,87 +0,0 @@
# MSP430 makefile scripts and rules.
# Automatic compiler options
OPT = $(USE_OPT)
COPT = $(USE_COPT)
CPPOPT = $(USE_CPPOPT)
ifeq ($(USE_LINK_GC),yes)
OPT += -ffunction-sections -fdata-sections
endif
# Source files groups
SRC = $(CSRC)$(CPPSRC)
# Object files groups
COBJS = $(CSRC:.c=.o)
CPPOBJS = $(CPPSRC:.cpp=.o)
ASMOBJS = $(ASMSRC:.s=.o)
OBJS = $(ASMOBJS) $(COBJS) $(CPPOBJS)
# Paths
IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
# Macros
DEFS = $(DDEFS) $(UDEFS)
ADEFS = $(DADEFS) $(UADEFS)
# Libs
LIBS = $(DLIBS) $(ULIBS)
MCFLAGS = -mmcu=$(MCU)
ODFLAGS = -x --syms
ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
CPFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
ifeq ($(LINK_GC),yes)
LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)
else
LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)
endif
# Generate dependency information
CPFLAGS += -MD -MP -MF .dep/$(@F).d
#
# Makefile rules
#
all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dmp MAKE_ALL_RULE_HOOK
MAKE_ALL_RULE_HOOK:
$(CPPOBJS) : %.o : %.cpp
@echo
$(CPPC) -c $(CPPFLAGS) -I . $(IINCDIR) $< -o $@
$(COBJS) : %.o : %.c
@echo
$(CC) -c $(CPFLAGS) -I . $(IINCDIR) $< -o $@
$(ASMOBJS) : %.o : %.s
@echo
$(AS) -c $(ASFLAGS) -I . $(IINCDIR) $< -o $@
%elf: $(OBJS)
@echo
$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
%hex: %elf
$(HEX) $< $@
%bin: %elf
$(BIN) $< $@
%dmp: %elf
$(OD) $(ODFLAGS) $< > $@
clean:
-rm -f $(OBJS)
-rm -f $(CSRC:.c=.lst) $(CPPSRC:.cpp=.lst) $(ASMSRC:.s=.lst)
-rm -f $(PROJECT).elf $(PROJECT).dmp $(PROJECT).map $(PROJECT).hex $(PROJECT).bin
-rm -fR .dep
#
# Include the dependency files, should be the last of the makefile
#
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF ***

1
readme.txt
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@ -131,7 +131,6 @@
(backported to 2.4.3).
- FIX: Fixed STM8L, cosmic compiler: c_lreg not saved (bug 3566342)(backported
to 2.2.10 and 2.4.3).
- NEW: MSP430X basic support.
- NEW: AT91SAM7A3 basic support.
- NEW: Unified the STM32F4xx and STM32F2xx platform code. The STM32F2xx now is
only supported as an STM32F4xx variant and not tested separately.