Documentation related fixes.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2225 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2010-10-03 08:45:34 +00:00
parent c62d4d6407
commit 1b56dd572e
5 changed files with 26 additions and 33 deletions

View File

@ -35,6 +35,8 @@
/** /**
* @defgroup types Types * @defgroup types Types
* @details The system types are defined into the port layer, please refer to
* the core port implementation section.
* @ingroup kernel * @ingroup kernel
*/ */
@ -163,13 +165,8 @@
* @ingroup kernel * @ingroup kernel
*/ */
/**
* @defgroup core Port Templates
* @ingroup kernel
*/
/** /**
* @defgroup internals Internals * @defgroup internals Internals
* @ingroup kernel * @ingroup kernel
*/ */

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@ -261,6 +261,27 @@ typedef uint32_t stkalign_t __attribute__ ((aligned (4)));
*/ */
typedef void *regarm_t; typedef void *regarm_t;
#if defined(__DOXYGEN__)
/**
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
* @note It is implemented to match the Cortex-Mx exception context.
*/
struct extctx {
/* Dummy definition, just for Doxygen.*/
};
/**
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching.
*/
struct intctx {
/* Dummy definition, just for Doxygen.*/
};
#endif
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
/** /**
* @brief Platform dependent part of the @p Thread structure. * @brief Platform dependent part of the @p Thread structure.

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@ -47,11 +47,6 @@ struct cmxctx {
}; };
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
/**
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
*/
struct extctx { struct extctx {
regarm_t xpsr; regarm_t xpsr;
regarm_t r12; regarm_t r12;
@ -62,14 +57,7 @@ struct extctx {
regarm_t r3; regarm_t r3;
regarm_t pc; regarm_t pc;
}; };
#endif
#if !defined(__DOXYGEN__)
/**
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching.
*/
struct intctx { struct intctx {
regarm_t r8; regarm_t r8;
regarm_t r9; regarm_t r9;

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@ -33,12 +33,6 @@
/*===========================================================================*/ /*===========================================================================*/
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
/**
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
* @note It is implemented to match the Cortex-Mx exception context.
*/
struct extctx { struct extctx {
regarm_t r0; regarm_t r0;
regarm_t r1; regarm_t r1;
@ -49,14 +43,7 @@ struct extctx {
regarm_t pc; regarm_t pc;
regarm_t xpsr; regarm_t xpsr;
}; };
#endif
#if !defined(__DOXYGEN__)
/**
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching.
*/
struct intctx { struct intctx {
regarm_t r4; regarm_t r4;
regarm_t r5; regarm_t r5;

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@ -26,7 +26,7 @@
* architectures. * architectures.
* *
* @section ARMCMx_STATES_A System logical states in ARMv6-M mode * @section ARMCMx_STATES_A System logical states in ARMv6-M mode
* The ChibiOS/RT logical system states are mapped as follow in the ARM * The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM
* Cortex-M0 port: * Cortex-M0 port:
* - <b>Init</b>. This state is represented by the startup code and the * - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a * initialization code before @p chSysInit() is executed. It has not a
@ -60,7 +60,7 @@
* was running when @p chSysHalt() was invoked. * was running when @p chSysHalt() was invoked.
* *
* @section ARMCMx_STATES_B System logical states in ARMv7-M mode * @section ARMCMx_STATES_B System logical states in ARMv7-M mode
* The ChibiOS/RT logical system states are mapped as follow in the ARM * The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM
* Cortex-M3 port: * Cortex-M3 port:
* - <b>Init</b>. This state is represented by the startup code and the * - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a * initialization code before @p chSysInit() is executed. It has not a