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Fixed various errors. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6940 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2014-05-19 14:11:00 +00:00
parent 73cbca4d15
commit 19abd0018b
13 changed files with 22 additions and 24 deletions
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4
demos/STM32/NIL-STM32F051-DISCOVERY/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

4
demos/STM32/RT-STM32F051-DISCOVERY/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

6
os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c
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@ -422,8 +422,7 @@ void i2c_lld_start(I2CDriver *i2cp) {
rccEnableI2C1(FALSE); rccEnableI2C1(FALSE);
#if defined(STM32_I2C1_GLOBAL_NUMBER) || defined(__DOXYGEN__) #if defined(STM32_I2C1_GLOBAL_NUMBER) || defined(__DOXYGEN__)
nvicEnableVector(STM32_I2C1_GLOBAL_NUMBER, nvicEnableVector(STM32_I2C1_GLOBAL_NUMBER, STM32_I2C_I2C1_IRQ_PRIORITY);
CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
#elif defined(STM32_I2C1_EVENT_NUMBER) && defined(STM32_I2C1_ERROR_NUMBER) #elif defined(STM32_I2C1_EVENT_NUMBER) && defined(STM32_I2C1_ERROR_NUMBER)
nvicEnableVector(STM32_I2C1_EVENT_NUMBER, STM32_I2C_I2C1_IRQ_PRIORITY); nvicEnableVector(STM32_I2C1_EVENT_NUMBER, STM32_I2C_I2C1_IRQ_PRIORITY);
nvicEnableVector(STM32_I2C1_ERROR_NUMBER, STM32_I2C_I2C1_IRQ_PRIORITY); nvicEnableVector(STM32_I2C1_ERROR_NUMBER, STM32_I2C_I2C1_IRQ_PRIORITY);
@ -456,8 +455,7 @@ void i2c_lld_start(I2CDriver *i2cp) {
rccEnableI2C2(FALSE); rccEnableI2C2(FALSE);
#if defined(STM32_I2C2_GLOBAL_NUMBER) || defined(__DOXYGEN__) #if defined(STM32_I2C2_GLOBAL_NUMBER) || defined(__DOXYGEN__)
nvicEnableVector(STM32_I2C2_GLOBAL_NUMBER, nvicEnableVector(STM32_I2C2_GLOBAL_NUMBER, STM32_I2C_I2C2_IRQ_PRIORITY);
CORTEX_PRIORITY_MASK(STM32_I2C_I2C2_IRQ_PRIORITY));
#elif defined(STM32_I2C2_EVENT_NUMBER) && defined(STM32_I2C2_ERROR_NUMBER) #elif defined(STM32_I2C2_EVENT_NUMBER) && defined(STM32_I2C2_ERROR_NUMBER)
nvicEnableVector(STM32_I2C2_EVENT_NUMBER, STM32_I2C_I2C2_IRQ_PRIORITY); nvicEnableVector(STM32_I2C2_EVENT_NUMBER, STM32_I2C_I2C2_IRQ_PRIORITY);
nvicEnableVector(STM32_I2C2_ERROR_NUMBER, STM32_I2C_I2C2_IRQ_PRIORITY); nvicEnableVector(STM32_I2C2_ERROR_NUMBER, STM32_I2C_I2C2_IRQ_PRIORITY);

4
testhal/STM32/STM32F0xx/ADC/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

2
testhal/STM32/STM32F0xx/EXT/chconf.h
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@ -137,7 +137,7 @@
* *
* @note The default is @p TRUE. * @note The default is @p TRUE.
*/ */
#define CH_CFG_USE_TM TRUE #define CH_CFG_USE_TM FALSE
/** /**
* @brief Threads registry APIs. * @brief Threads registry APIs.

4
testhal/STM32/STM32F0xx/EXT/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

4
testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

2
testhal/STM32/STM32F0xx/PWM-ICU/chconf.h
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@ -137,7 +137,7 @@
* *
* @note The default is @p TRUE. * @note The default is @p TRUE.
*/ */
#define CH_CFG_USE_TM TRUE #define CH_CFG_USE_TM FALSE
/** /**
* @brief Threads registry APIs. * @brief Threads registry APIs.

4
testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

2
testhal/STM32/STM32F0xx/SPI/chconf.h
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@ -137,7 +137,7 @@
* *
* @note The default is @p TRUE. * @note The default is @p TRUE.
*/ */
#define CH_CFG_USE_TM TRUE #define CH_CFG_USE_TM FALSE
/** /**
* @brief Threads registry APIs. * @brief Threads registry APIs.

4
testhal/STM32/STM32F0xx/SPI/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")

2
testhal/STM32/STM32F0xx/UART/chconf.h
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@ -137,7 +137,7 @@
* *
* @note The default is @p TRUE. * @note The default is @p TRUE.
*/ */
#define CH_CFG_USE_TM TRUE #define CH_CFG_USE_TM FALSE
/** /**
* @brief Threads registry APIs. * @brief Threads registry APIs.

4
testhal/STM32/STM32F0xx/UART/mcuconf.h
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@ -90,8 +90,8 @@
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")