From 18fb8f676f0f650d83f69bc29ab45b04b73e86c1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Mar 2011 10:09:57 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2808 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c | 2 +- demos/ARMCM3-STM32F103-FATFS-GCC/main.c | 4 +- os/hal/include/adc.h | 55 +++-- os/hal/include/can.h | 2 +- os/hal/include/mac.h | 2 +- os/hal/include/mmc_spi.h | 28 +-- os/hal/include/pal.h | 6 +- os/hal/include/serial_usb.h | 10 +- os/hal/include/spi.h | 28 +-- os/hal/platforms/AT91SAM7/mac_lld.c | 44 ++-- os/hal/platforms/AT91SAM7/mac_lld.h | 25 +-- os/hal/platforms/AT91SAM7/spi_lld.c | 88 ++++---- os/hal/platforms/AT91SAM7/spi_lld.h | 20 +- os/hal/platforms/LPC11xx/spi_lld.c | 102 +++++----- os/hal/platforms/LPC11xx/spi_lld.h | 34 ++-- os/hal/platforms/LPC13xx/spi_lld.c | 100 +++++----- os/hal/platforms/LPC13xx/spi_lld.h | 32 +-- os/hal/platforms/LPC214x/spi_lld.c | 96 ++++----- os/hal/platforms/LPC214x/spi_lld.h | 30 +-- os/hal/platforms/STM32/adc_lld.c | 50 ++--- os/hal/platforms/STM32/adc_lld.h | 46 ++--- os/hal/platforms/STM32/can_lld.c | 136 ++++++------- os/hal/platforms/STM32/can_lld.h | 80 ++++---- os/hal/platforms/STM32/pwm_lld.c | 140 ++++++------- os/hal/platforms/STM32/pwm_lld.h | 28 +-- os/hal/platforms/STM32/spi_lld.c | 96 ++++----- os/hal/platforms/STM32/spi_lld.h | 26 +-- os/hal/platforms/STM32/uart_lld.c | 168 ++++++++-------- os/hal/platforms/STM32/uart_lld.h | 50 ++--- os/hal/platforms/STM8S/spi_lld.c | 42 ++-- os/hal/platforms/STM8S/spi_lld.h | 26 +-- os/hal/src/adc.c | 78 ++++---- os/hal/src/can.c | 80 ++++---- os/hal/src/mac.c | 10 +- os/hal/src/mmc_spi.c | 199 +++++++++---------- os/hal/src/pal.c | 12 +- os/hal/src/pwm.c | 18 +- os/hal/src/spi.c | 77 +++---- os/hal/src/uart.c | 97 ++++----- os/hal/templates/adc_lld.c | 2 +- os/hal/templates/adc_lld.h | 22 +- os/hal/templates/can_lld.c | 2 +- os/hal/templates/can_lld.h | 52 ++--- os/hal/templates/mac_lld.h | 14 +- os/hal/templates/pwm_lld.c | 2 +- os/hal/templates/pwm_lld.h | 12 +- os/hal/templates/spi_lld.c | 2 +- os/hal/templates/spi_lld.h | 12 +- os/hal/templates/uart_lld.h | 18 +- readme.txt | 14 +- testhal/STM32/CAN/main.c | 16 +- 51 files changed, 1152 insertions(+), 1183 deletions(-) diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c b/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c index 4d0516c2c..4f43cef2a 100644 --- a/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c +++ b/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c @@ -69,7 +69,7 @@ static size_t network_device_read(void) { if (macWaitReceiveDescriptor(Ð1, &rd, TIME_IMMEDIATE) != RDY_OK) return 0; - size = rd.rd_size; + size = rd.size; macReadReceiveDescriptor(&rd, uip_buf, size); macReleaseReceiveDescriptor(&rd); return size; diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/main.c b/demos/ARMCM3-STM32F103-FATFS-GCC/main.c index eb314d6ad..ec6769c47 100644 --- a/demos/ARMCM3-STM32F103-FATFS-GCC/main.c +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/main.c @@ -310,8 +310,8 @@ int main(void) { * Normal main() thread activity, in this demo it does nothing except * sleeping in a loop and listen for events. */ - chEvtRegister(&MMCD1.mmc_inserted_event, &el0, 0); - chEvtRegister(&MMCD1.mmc_removed_event, &el1, 1); + chEvtRegister(&MMCD1.inserted_event, &el0, 0); + chEvtRegister(&MMCD1.removed_event, &el1, 1); while (TRUE) { if (!shelltp) shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); diff --git a/os/hal/include/adc.h b/os/hal/include/adc.h index d94d99aa3..8bc013b38 100644 --- a/os/hal/include/adc.h +++ b/os/hal/include/adc.h @@ -92,9 +92,9 @@ typedef enum { * @notapi */ #define _adc_reset_i(adcp) { \ - if ((adcp)->ad_thread != NULL) { \ - Thread *tp = (adcp)->ad_thread; \ - (adcp)->ad_thread = NULL; \ + if ((adcp)->thread != NULL) { \ + Thread *tp = (adcp)->thread; \ + (adcp)->thread = NULL; \ tp->p_u.rdymsg = RDY_RESET; \ chSchReadyI(tp); \ } \ @@ -108,9 +108,9 @@ typedef enum { * @notapi */ #define _adc_reset_s(adcp) { \ - if ((adcp)->ad_thread != NULL) { \ - Thread *tp = (adcp)->ad_thread; \ - (adcp)->ad_thread = NULL; \ + if ((adcp)->thread != NULL) { \ + Thread *tp = (adcp)->thread; \ + (adcp)->thread = NULL; \ chSchWakeupS(tp, RDY_RESET); \ } \ } @@ -123,9 +123,9 @@ typedef enum { * @notapi */ #define _adc_wakeup_isr(adcp) { \ - if ((adcp)->ad_thread != NULL) { \ - Thread *tp = (adcp)->ad_thread; \ - (adcp)->ad_thread = NULL; \ + if ((adcp)->thread != NULL) { \ + Thread *tp = (adcp)->thread; \ + (adcp)->thread = NULL; \ chSysLockFromIsr(); \ tp->p_u.rdymsg = RDY_OK; \ chSchReadyI(tp); \ @@ -152,9 +152,8 @@ typedef enum { * @notapi */ #define _adc_isr_half_code(adcp) { \ - if ((adcp)->ad_grpp->acg_endcb != NULL) { \ - (adcp)->ad_grpp->acg_endcb(adcp, (adcp)->ad_samples, \ - (adcp)->ad_depth / 2); \ + if ((adcp)->grpp->end_cb != NULL) { \ + (adcp)->grpp->end_cb(adcp, (adcp)->samples, (adcp)->depth / 2); \ } \ } @@ -173,40 +172,38 @@ typedef enum { * @notapi */ #define _adc_isr_full_code(adcp) { \ - if ((adcp)->ad_grpp->acg_circular) { \ + if ((adcp)->grpp->circular) { \ /* Callback handling.*/ \ - if ((adcp)->ad_grpp->acg_endcb != NULL) { \ - if ((adcp)->ad_depth > 1) { \ + if ((adcp)->grpp->end_cb != NULL) { \ + if ((adcp)->depth > 1) { \ /* Invokes the callback passing the 2nd half of the buffer.*/ \ - size_t half = (adcp)->ad_depth / 2; \ - (adcp)->ad_grpp->acg_endcb(adcp, (adcp)->ad_samples + half, half); \ + size_t half = (adcp)->depth / 2; \ + (adcp)->grpp->end_cb(adcp, (adcp)->samples + half, half); \ } \ else { \ /* Invokes the callback passing the whole buffer.*/ \ - (adcp)->ad_grpp->acg_endcb(adcp, (adcp)->ad_samples, \ - (adcp)->ad_depth); \ + (adcp)->grpp->end_cb(adcp, (adcp)->samples, (adcp)->depth); \ } \ } \ } \ else { \ /* End conversion.*/ \ adc_lld_stop_conversion(adcp); \ - if ((adcp)->ad_grpp->acg_endcb != NULL) { \ - (adcp)->ad_state = ADC_COMPLETE; \ - if ((adcp)->ad_depth > 1) { \ + if ((adcp)->grpp->end_cb != NULL) { \ + (adcp)->state = ADC_COMPLETE; \ + if ((adcp)->depth > 1) { \ /* Invokes the callback passing the 2nd half of the buffer.*/ \ - size_t half = (adcp)->ad_depth / 2; \ - (adcp)->ad_grpp->acg_endcb(adcp, (adcp)->ad_samples + half, half); \ + size_t half = (adcp)->depth / 2; \ + (adcp)->grpp->end_cb(adcp, (adcp)->samples + half, half); \ } \ else { \ /* Invokes the callback passing the whole buffer.*/ \ - (adcp)->ad_grpp->acg_endcb(adcp, (adcp)->ad_samples, \ - (adcp)->ad_depth); \ + (adcp)->grpp->end_cb(adcp, (adcp)->samples, (adcp)->depth); \ } \ - if ((adcp)->ad_state == ADC_COMPLETE) \ - (adcp)->ad_state = ADC_READY; \ + if ((adcp)->state == ADC_COMPLETE) \ + (adcp)->state = ADC_READY; \ } \ - (adcp)->ad_grpp = NULL; \ + (adcp)->grpp = NULL; \ _adc_wakeup_isr(adcp); \ } \ } diff --git a/os/hal/include/can.h b/os/hal/include/can.h index dc258193a..d294f0b08 100644 --- a/os/hal/include/can.h +++ b/os/hal/include/can.h @@ -103,7 +103,7 @@ typedef enum { * * @iclass */ -#define canAddFlagsI(canp, mask) ((canp)->cd_status |= (mask)) +#define canAddFlagsI(canp, mask) ((canp)->status |= (mask)) /*===========================================================================*/ /* External declarations. */ diff --git a/os/hal/include/mac.h b/os/hal/include/mac.h index 8978f007e..81d8ea27f 100644 --- a/os/hal/include/mac.h +++ b/os/hal/include/mac.h @@ -64,7 +64,7 @@ * @api */ #if CH_USE_EVENTS || defined(__DOXYGEN__) -#define macGetReceiveEventSource(macp) (&(macp)->md_rdevent) +#define macGetReceiveEventSource(macp) (&(macp)->rdevent) #endif /** diff --git a/os/hal/include/mmc_spi.h b/os/hal/include/mmc_spi.h index 241fae54a..9f717ed39 100644 --- a/os/hal/include/mmc_spi.h +++ b/os/hal/include/mmc_spi.h @@ -18,7 +18,7 @@ */ /** - * @file mmc_spi.h + * @file spi.h * @brief MMC over SPI driver header. * * @addtogroup MMC_SPI @@ -133,47 +133,47 @@ typedef struct { /** * @brief Driver state. */ - mmcstate_t mmc_state; + mmcstate_t state; /** * @brief Current configuration data. */ - const MMCConfig *mmc_config; + const MMCConfig *config; /** * @brief SPI driver associated to this MMC driver. */ - SPIDriver *mmc_spip; + SPIDriver *spip; /** * @brief SPI low speed configuration used during initialization. */ - const SPIConfig *mmc_lscfg; + const SPIConfig *lscfg; /** * @brief SPI high speed configuration used during transfers. */ - const SPIConfig *mmc_hscfg; + const SPIConfig *hscfg; /** * @brief Write protect status query function. */ - mmcquery_t mmc_is_protected; + mmcquery_t is_protected; /** * @brief Insertion status query function. */ - mmcquery_t mmc_is_inserted; + mmcquery_t is_inserted; /** * @brief Card insertion event source. */ - EventSource mmc_inserted_event; + EventSource inserted_event; /** * @brief Card removal event source. */ - EventSource mmc_removed_event; + EventSource removed_event; /** * @brief MMC insertion polling timer. */ - VirtualTimer mmc_vt; + VirtualTimer vt; /** * @brief Insertion counter. */ - uint_fast8_t mmc_cnt; + uint_fast8_t cnt; } MMCDriver; /*===========================================================================*/ @@ -188,7 +188,7 @@ typedef struct { * * @api */ -#define mmcGetDriverState(mmcp) ((mmcp)->mmc_state) +#define mmcGetDriverState(mmcp) ((mmcp)->state) /** * @brief Returns the write protect status. @@ -200,7 +200,7 @@ typedef struct { * * @api */ -#define mmcIsWriteProtected(mmcp) ((mmcp)->mmc_is_protected()) +#define mmcIsWriteProtected(mmcp) ((mmcp)->is_protected()) /*===========================================================================*/ /* External declarations. */ diff --git a/os/hal/include/pal.h b/os/hal/include/pal.h index 6f3c4a7e5..e7a7f90c4 100644 --- a/os/hal/include/pal.h +++ b/os/hal/include/pal.h @@ -123,17 +123,17 @@ typedef struct { /** * @brief Port identifier. */ - ioportid_t bus_portid; + ioportid_t portid; /** * @brief Bus mask aligned to port bit 0. * @note The bus mask implicitly define the bus width. A logical AND is * performed on the bus data. */ - ioportmask_t bus_mask; + ioportmask_t mask; /** * @brief Offset, within the port, of the least significant bit of the bus. */ - uint_fast8_t bus_offset; + uint_fast8_t offset; } IOBus; /*===========================================================================*/ diff --git a/os/hal/include/serial_usb.h b/os/hal/include/serial_usb.h index 3cfa1441b..b1d90cfb5 100644 --- a/os/hal/include/serial_usb.h +++ b/os/hal/include/serial_usb.h @@ -85,23 +85,23 @@ typedef struct { /** * @brief USB driver to use. */ - USBDriver *usbp; + USBDriver *usbp; /** * @brief USB driver configuration structure. */ - USBConfig usb_config; + USBConfig usb_config; /* * @brief Endpoint used for data transmission. */ - usbep_t data_request_ep; + usbep_t data_request_ep; /* * @brief Endpoint used for data reception. */ - usbep_t data_available_ep; + usbep_t data_available_ep; /* * @brief Endpoint used for interrupt request. */ - usbep_t interrupt_request_ep; + usbep_t interrupt_request_ep; } SerialUSBConfig; /** diff --git a/os/hal/include/spi.h b/os/hal/include/spi.h index ccf3e4e63..29ea01e4d 100644 --- a/os/hal/include/spi.h +++ b/os/hal/include/spi.h @@ -120,7 +120,7 @@ typedef enum { * @iclass */ #define spiStartIgnoreI(spip, n) { \ - (spip)->spd_state = SPI_ACTIVE; \ + (spip)->state = SPI_ACTIVE; \ spi_lld_ignore(spip, n); \ } @@ -142,7 +142,7 @@ typedef enum { * @iclass */ #define spiStartExchangeI(spip, n, txbuf, rxbuf) { \ - (spip)->spd_state = SPI_ACTIVE; \ + (spip)->state = SPI_ACTIVE; \ spi_lld_exchange(spip, n, txbuf, rxbuf); \ } @@ -162,7 +162,7 @@ typedef enum { * @iclass */ #define spiStartSendI(spip, n, txbuf) { \ - (spip)->spd_state = SPI_ACTIVE; \ + (spip)->state = SPI_ACTIVE; \ spi_lld_send(spip, n, txbuf); \ } @@ -182,7 +182,7 @@ typedef enum { * @iclass */ #define spiStartReceiveI(spip, n, rxbuf) { \ - (spip)->spd_state = SPI_ACTIVE; \ + (spip)->state = SPI_ACTIVE; \ spi_lld_receive(spip, n, rxbuf); \ } @@ -215,9 +215,9 @@ typedef enum { * @notapi */ #define _spi_wait_s(spip) { \ - chDbgAssert((spip)->spd_thread == NULL, \ + chDbgAssert((spip)->thread == NULL, \ "_spi_wait(), #1", "already waiting"); \ - (spip)->spd_thread = chThdSelf(); \ + (spip)->thread = chThdSelf(); \ chSchGoSleepS(THD_STATE_SUSPENDED); \ } @@ -229,9 +229,9 @@ typedef enum { * @notapi */ #define _spi_wakeup_isr(spip) { \ - if ((spip)->spd_thread != NULL) { \ - Thread *tp = (spip)->spd_thread; \ - (spip)->spd_thread = NULL; \ + if ((spip)->thread != NULL) { \ + Thread *tp = (spip)->thread; \ + (spip)->thread = NULL; \ chSysLockFromIsr(); \ chSchReadyI(tp); \ chSysUnlockFromIsr(); \ @@ -257,11 +257,11 @@ typedef enum { * @notapi */ #define _spi_isr_code(spip) { \ - if ((spip)->spd_config->spc_endcb) { \ - (spip)->spd_state = SPI_COMPLETE; \ - (spip)->spd_config->spc_endcb(spip); \ - if ((spip)->spd_state == SPI_COMPLETE) \ - (spip)->spd_state = SPI_READY; \ + if ((spip)->config->end_cb) { \ + (spip)->state = SPI_COMPLETE; \ + (spip)->config->end_cb(spip); \ + if ((spip)->state == SPI_COMPLETE) \ + (spip)->state = SPI_READY; \ } \ _spi_wakeup_isr(spip); \ } diff --git a/os/hal/platforms/AT91SAM7/mac_lld.c b/os/hal/platforms/AT91SAM7/mac_lld.c index ee71b2e23..15529ac04 100644 --- a/os/hal/platforms/AT91SAM7/mac_lld.c +++ b/os/hal/platforms/AT91SAM7/mac_lld.c @@ -100,9 +100,9 @@ static void serve_interrupt(void) { if ((isr & AT91C_EMAC_RCOMP) || (rsr & RSR_BITS)) { if (rsr & AT91C_EMAC_REC) { chSysLockFromIsr(); - chSemResetI(Ð1.md_rdsem, 0); + chSemResetI(Ð1.rdsem, 0); #if CH_USE_EVENTS - chEvtBroadcastI(Ð1.md_rdevent); + chEvtBroadcastI(Ð1.rdevent); #endif chSysUnlockFromIsr(); } @@ -112,7 +112,7 @@ static void serve_interrupt(void) { if ((isr & AT91C_EMAC_TCOMP) || (tsr & TSR_BITS)) { if (tsr & AT91C_EMAC_COMP) { chSysLockFromIsr(); - chSemResetI(Ð1.md_tdsem, 0); + chSemResetI(Ð1.tdsem, 0); chSysUnlockFromIsr(); } AT91C_BASE_EMAC->EMAC_TSR = TSR_BITS; @@ -291,9 +291,9 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp, else edp->w2 = W2_T_LOCKED | W2_T_USED | W2_T_LAST_BUFFER; chSysUnlock(); - tdp->td_offset = 0; - tdp->td_size = EMAC_TRANSMIT_BUFFERS_SIZE; - tdp->td_physdesc = edp; + tdp->offset = 0; + tdp->size = EMAC_TRANSMIT_BUFFERS_SIZE; + tdp->physdesc = edp; return RDY_OK; } @@ -315,13 +315,13 @@ size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp, uint8_t *buf, size_t size) { - if (size > tdp->td_size - tdp->td_offset) - size = tdp->td_size - tdp->td_offset; + if (size > tdp->size - tdp->offset) + size = tdp->size - tdp->offset; if (size > 0) { - memcpy((uint8_t *)(tdp->td_physdesc->w1 & W1_T_ADDRESS_MASK) + - tdp->td_offset, + memcpy((uint8_t *)(tdp->physdesc->w1 & W1_T_ADDRESS_MASK) + + tdp->offset, buf, size); - tdp->td_offset += size; + tdp->offset += size; } return size; } @@ -337,9 +337,9 @@ size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp, void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) { chSysLock(); - tdp->td_physdesc->w2 = (tdp->td_physdesc->w2 & + tdp->physdesc->w2 = (tdp->physdesc->w2 & ~(W2_T_LOCKED | W2_T_USED | W2_T_LENGTH_MASK)) | - tdp->td_offset; + tdp->offset; AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_TSTART; chSysUnlock(); } @@ -400,9 +400,9 @@ restart: * End Of Frame found. */ if (rxptr->w2 & W2_R_FRAME_END) { - rdp->rd_offset = 0; - rdp->rd_size = rxptr->w2 & W2_T_LENGTH_MASK; - rdp->rd_physdesc = edp; + rdp->offset = 0; + rdp->size = rxptr->w2 & W2_T_LENGTH_MASK; + rdp->physdesc = edp; return RDY_OK; } @@ -435,11 +435,11 @@ restart: size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp, uint8_t *buf, size_t size) { - if (size > rdp->rd_size - rdp->rd_offset) - size = rdp->rd_size - rdp->rd_offset; + if (size > rdp->size - rdp->offset) + size = rdp->size - rdp->offset; if (size > 0) { - uint8_t *src = (uint8_t *)(rdp->rd_physdesc->w1 & W1_R_ADDRESS_MASK) + - rdp->rd_offset; + uint8_t *src = (uint8_t *)(rdp->physdesc->w1 & W1_R_ADDRESS_MASK) + + rdp->offset; uint8_t *limit = &rb[EMAC_RECEIVE_DESCRIPTORS * EMAC_RECEIVE_BUFFERS_SIZE]; if (src >= limit) src -= EMAC_RECEIVE_DESCRIPTORS * EMAC_RECEIVE_BUFFERS_SIZE; @@ -449,7 +449,7 @@ size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp, } else memcpy(buf, src, size); - rdp->rd_offset += size; + rdp->offset += size; } return size; } @@ -465,7 +465,7 @@ size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp, */ void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) { bool_t done; - EMACDescriptor *edp = rdp->rd_physdesc; + EMACDescriptor *edp = rdp->physdesc; unsigned n = EMAC_RECEIVE_DESCRIPTORS; do { diff --git a/os/hal/platforms/AT91SAM7/mac_lld.h b/os/hal/platforms/AT91SAM7/mac_lld.h index 21503dd53..ed8fb1ee2 100644 --- a/os/hal/platforms/AT91SAM7/mac_lld.h +++ b/os/hal/platforms/AT91SAM7/mac_lld.h @@ -66,7 +66,7 @@ #define W1_T_ADDRESS_MASK 0xFFFFFFFF #define W2_T_LENGTH_MASK 0x000007FF -#define W2_T_LOCKED 0x00000800 /* Not an EMAC flag, used by the driver */ +#define W2_T_LOCKED 0x00000800 /* Not an EMAC flag. */ #define W2_T_RFU1 0x00003000 #define W2_T_LAST_BUFFER 0x00008000 #define W2_T_NO_CRC 0x00010000 @@ -130,10 +130,10 @@ typedef struct { * @brief Structure representing a MAC driver. */ typedef struct { - Semaphore md_tdsem; /**< Transmit semaphore. */ - Semaphore md_rdsem; /**< Receive semaphore. */ + Semaphore tdsem; /**< Transmit semaphore. */ + Semaphore rdsem; /**< Receive semaphore. */ #if CH_USE_EVENTS - EventSource md_rdevent; /**< Receive event source. */ + EventSource rdevent; /**< Receive event source. */ #endif /* End of the mandatory fields.*/ } MACDriver; @@ -142,22 +142,23 @@ typedef struct { * @brief Structure representing a transmit descriptor. */ typedef struct { - size_t td_offset; /**< Current write offset. */ - size_t td_size; /**< Available space size. */ + size_t offset; /**< Current write offset. */ + size_t size; /**< Available space size. */ /* End of the mandatory fields.*/ - EMACDescriptor *td_physdesc; /**< Pointer to the physical - descriptor. */ + EMACDescriptor *physdesc; /**< Pointer to the physical + descriptor. */ } MACTransmitDescriptor; /** * @brief Structure representing a receive descriptor. */ typedef struct { - size_t rd_offset; /**< Current read offset. */ - size_t rd_size; /**< Available data size. */ + size_t offset; /**< Current read offset. */ + size_t size; /**< Available data size. */ /* End of the mandatory fields.*/ - EMACDescriptor *rd_physdesc; /**< Pointer to the first descriptor - of the buffers chain. */ + EMACDescriptor *physdesc; /**< Pointer to the first + descriptor of the buffers + chain. */ } MACReceiveDescriptor; /*===========================================================================*/ diff --git a/os/hal/platforms/AT91SAM7/spi_lld.c b/os/hal/platforms/AT91SAM7/spi_lld.c index 316ff65c9..ec3853872 100644 --- a/os/hal/platforms/AT91SAM7/spi_lld.c +++ b/os/hal/platforms/AT91SAM7/spi_lld.c @@ -121,14 +121,14 @@ __attribute__((noinline)) * @param[in] spip pointer to the @p SPIDriver object */ static void spi_lld_serve_interrupt(SPIDriver *spip) { - uint32_t sr = spip->spd_spi->SPI_SR; + uint32_t sr = spip->spi->SPI_SR; if ((sr & AT91C_SPI_ENDRX) != 0) { - (void)spip->spd_spi->SPI_RDR; /* Clears eventual overflow.*/ - spip->spd_spi->SPI_PTCR = AT91C_PDC_RXTDIS | + (void)spip->spi->SPI_RDR; /* Clears eventual overflow.*/ + spip->spi->SPI_PTCR = AT91C_PDC_RXTDIS | AT91C_PDC_TXTDIS; /* PDC disabled. */ - spip->spd_spi->SPI_IDR = AT91C_SPI_ENDRX; /* Interrupt disabled. */ - spip->spd_spi->SPI_CR = AT91C_SPI_SPIDIS; /* SPI disabled. */ + spip->spi->SPI_IDR = AT91C_SPI_ENDRX; /* Interrupt disabled. */ + spip->spi->SPI_CR = AT91C_SPI_SPIDIS; /* SPI disabled. */ /* Portable SPI ISR code defined in the high level driver, note, it is a macro.*/ _spi_isr_code(spip); @@ -182,7 +182,7 @@ void spi_lld_init(void) { #if AT91SAM7_SPI_USE_SPI0 spiObjectInit(&SPID1); - SPID1.spd_spi = AT91C_BASE_SPI0; + SPID1.spi = AT91C_BASE_SPI0; spi_init(AT91C_BASE_SPI0); AT91C_BASE_PIOA->PIO_PDR = SPI0_MISO | SPI0_MOSI | SPI0_SCK; AT91C_BASE_PIOA->PIO_ASR = SPI0_MISO | SPI0_MOSI | SPI0_SCK; @@ -194,7 +194,7 @@ void spi_lld_init(void) { #if AT91SAM7_SPI_USE_SPI1 spiObjectInit(&SPID2); - SPID2.spd_spi = AT91C_BASE_SPI1; + SPID2.spi = AT91C_BASE_SPI1; spi_init(AT91C_BASE_SPI1); AT91C_BASE_PIOA->PIO_PDR = SPI1_MISO | SPI1_MOSI | SPI1_SCK; AT91C_BASE_PIOA->PIO_BSR = SPI1_MISO | SPI1_MOSI | SPI1_SCK; @@ -214,7 +214,7 @@ void spi_lld_init(void) { */ void spi_lld_start(SPIDriver *spip) { - if (spip->spd_state == SPI_STOP) { + if (spip->state == SPI_STOP) { #if AT91SAM7_SPI_USE_SPI0 if (&SPID1 == spip) { /* Clock activation.*/ @@ -233,7 +233,7 @@ void spi_lld_start(SPIDriver *spip) { #endif } /* Configuration.*/ - spip->spd_spi->SPI_CSR[0] = spip->spd_config->spc_csr; + spip->spi->SPI_CSR[0] = spip->config->csr; } /** @@ -245,7 +245,7 @@ void spi_lld_start(SPIDriver *spip) { */ void spi_lld_stop(SPIDriver *spip) { - if (spip->spd_state != SPI_STOP) { + if (spip->state != SPI_STOP) { #if AT91SAM7_SPI_USE_SPI0 if (&SPID1 == spip) { AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_SPI0); @@ -270,7 +270,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palClearPad(spip->config->ssport, spip->config->sspad); } /** @@ -283,7 +283,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palSetPad(spip->config->ssport, spip->config->sspad); } /** @@ -299,13 +299,13 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { - spip->spd_spi->SPI_TCR = n; - spip->spd_spi->SPI_RCR = n; - spip->spd_spi->SPI_TPR = (AT91_REG)idle_buf; - spip->spd_spi->SPI_RPR = (AT91_REG)idle_buf; - spip->spd_spi->SPI_IER = AT91C_SPI_ENDRX; - spip->spd_spi->SPI_CR = AT91C_SPI_SPIEN; - spip->spd_spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; + spip->spi->SPI_TCR = n; + spip->spi->SPI_RCR = n; + spip->spi->SPI_TPR = (AT91_REG)idle_buf; + spip->spi->SPI_RPR = (AT91_REG)idle_buf; + spip->spi->SPI_IER = AT91C_SPI_ENDRX; + spip->spi->SPI_CR = AT91C_SPI_SPIEN; + spip->spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; } /** @@ -323,13 +323,13 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { - spip->spd_spi->SPI_TCR = n; - spip->spd_spi->SPI_RCR = n; - spip->spd_spi->SPI_TPR = (AT91_REG)txbuf; - spip->spd_spi->SPI_RPR = (AT91_REG)rxbuf; - spip->spd_spi->SPI_IER = AT91C_SPI_ENDRX; - spip->spd_spi->SPI_CR = AT91C_SPI_SPIEN; - spip->spd_spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; + spip->spi->SPI_TCR = n; + spip->spi->SPI_RCR = n; + spip->spi->SPI_TPR = (AT91_REG)txbuf; + spip->spi->SPI_RPR = (AT91_REG)rxbuf; + spip->spi->SPI_IER = AT91C_SPI_ENDRX; + spip->spi->SPI_CR = AT91C_SPI_SPIEN; + spip->spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; } /** @@ -344,13 +344,13 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - spip->spd_spi->SPI_TCR = n; - spip->spd_spi->SPI_RCR = n; - spip->spd_spi->SPI_TPR = (AT91_REG)txbuf; - spip->spd_spi->SPI_RPR = (AT91_REG)idle_buf; - spip->spd_spi->SPI_IER = AT91C_SPI_ENDRX; - spip->spd_spi->SPI_CR = AT91C_SPI_SPIEN; - spip->spd_spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; + spip->spi->SPI_TCR = n; + spip->spi->SPI_RCR = n; + spip->spi->SPI_TPR = (AT91_REG)txbuf; + spip->spi->SPI_RPR = (AT91_REG)idle_buf; + spip->spi->SPI_IER = AT91C_SPI_ENDRX; + spip->spi->SPI_CR = AT91C_SPI_SPIEN; + spip->spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; } /** @@ -365,13 +365,13 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - spip->spd_spi->SPI_TCR = n; - spip->spd_spi->SPI_RCR = n; - spip->spd_spi->SPI_TPR = (AT91_REG)idle_buf; - spip->spd_spi->SPI_RPR = (AT91_REG)rxbuf; - spip->spd_spi->SPI_IER = AT91C_SPI_ENDRX; - spip->spd_spi->SPI_CR = AT91C_SPI_SPIEN; - spip->spd_spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; + spip->spi->SPI_TCR = n; + spip->spi->SPI_RCR = n; + spip->spi->SPI_TPR = (AT91_REG)idle_buf; + spip->spi->SPI_RPR = (AT91_REG)rxbuf; + spip->spi->SPI_IER = AT91C_SPI_ENDRX; + spip->spi->SPI_CR = AT91C_SPI_SPIEN; + spip->spi->SPI_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; } /** @@ -388,11 +388,11 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - spip->spd_spi->SPI_CR = AT91C_SPI_SPIEN; - spip->spd_spi->SPI_TDR = frame; - while ((spip->spd_spi->SPI_SR & AT91C_SPI_RDRF) == 0) + spip->spi->SPI_CR = AT91C_SPI_SPIEN; + spip->spi->SPI_TDR = frame; + while ((spip->spi->SPI_SR & AT91C_SPI_RDRF) == 0) ; - return spip->spd_spi->SPI_RDR; + return spip->spi->SPI_RDR; } #endif /* HAL_USE_SPI */ diff --git a/os/hal/platforms/AT91SAM7/spi_lld.h b/os/hal/platforms/AT91SAM7/spi_lld.h index 3b0bfaaba..ec0af3740 100644 --- a/os/hal/platforms/AT91SAM7/spi_lld.h +++ b/os/hal/platforms/AT91SAM7/spi_lld.h @@ -127,20 +127,20 @@ typedef struct { /** * @brief Operation complete callback or @p NULL. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ - ioportid_t spc_ssport; + ioportid_t ssport; /** * @brief The chip select line pad number. */ - uint16_t spc_sspad; + uint16_t sspad; /** * @brief SPI Chip Select Register initialization data. */ - uint32_t spc_csr; + uint32_t csr; } SPIConfig; /** @@ -150,25 +150,25 @@ struct SPIDriver { /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) @@ -178,7 +178,7 @@ struct SPIDriver { /** * @brief Pointer to the SPIx registers block. */ - AT91PS_SPI spd_spi; + AT91PS_SPI spi; }; /*===========================================================================*/ diff --git a/os/hal/platforms/LPC11xx/spi_lld.c b/os/hal/platforms/LPC11xx/spi_lld.c index 47766088c..b165c42ee 100644 --- a/os/hal/platforms/LPC11xx/spi_lld.c +++ b/os/hal/platforms/LPC11xx/spi_lld.c @@ -58,27 +58,27 @@ SPIDriver SPID2; * @param[in] spip pointer to the @p SPIDriver object */ static void ssp_fifo_preload(SPIDriver *spip) { - LPC_SSP_TypeDef *ssp = spip->spd_ssp; - uint32_t n = spip->spd_txcnt > LPC11xx_SSP_FIFO_DEPTH ? - LPC11xx_SSP_FIFO_DEPTH : spip->spd_txcnt; + LPC_SSP_TypeDef *ssp = spip->ssp; + uint32_t n = spip->txcnt > LPC11xx_SSP_FIFO_DEPTH ? + LPC11xx_SSP_FIFO_DEPTH : spip->txcnt; while(((ssp->SR & SR_TNF) != 0) && (n > 0)) { - if (spip->spd_txptr != NULL) { + if (spip->txptr != NULL) { if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) { - const uint16_t *p = spip->spd_txptr; + const uint16_t *p = spip->txptr; ssp->DR = *p++; - spip->spd_txptr = p; + spip->txptr = p; } else { - const uint8_t *p = spip->spd_txptr; + const uint8_t *p = spip->txptr; ssp->DR = *p++; - spip->spd_txptr = p; + spip->txptr = p; } } else ssp->DR = 0xFFFFFFFF; n--; - spip->spd_txcnt--; + spip->txcnt--; } } @@ -88,7 +88,7 @@ static void ssp_fifo_preload(SPIDriver *spip) { * @param[in] spip pointer to the @p SPIDriver object */ static void spi_serve_interrupt(SPIDriver *spip) { - LPC_SSP_TypeDef *ssp = spip->spd_ssp; + LPC_SSP_TypeDef *ssp = spip->ssp; if ((ssp->MIS & MIS_ROR) != 0) { /* The overflow condition should never happen because priority is given @@ -97,22 +97,22 @@ static void spi_serve_interrupt(SPIDriver *spip) { } ssp->ICR = ICR_RT | ICR_ROR; while ((ssp->SR & SR_RNE) != 0) { - if (spip->spd_rxptr != NULL) { + if (spip->rxptr != NULL) { if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) { - uint16_t *p = spip->spd_rxptr; + uint16_t *p = spip->rxptr; *p++ = ssp->DR; - spip->spd_rxptr = p; + spip->rxptr = p; } else { - uint8_t *p = spip->spd_rxptr; + uint8_t *p = spip->rxptr; *p++ = ssp->DR; - spip->spd_rxptr = p; + spip->rxptr = p; } } else (void)ssp->DR; - if (--spip->spd_rxcnt == 0) { - chDbgAssert(spip->spd_txcnt == 0, + if (--spip->rxcnt == 0) { + chDbgAssert(spip->txcnt == 0, "spi_serve_interrupt(), #1", "counter out of synch"); /* Stops the IRQ sources.*/ ssp->IMSC = 0; @@ -123,7 +123,7 @@ static void spi_serve_interrupt(SPIDriver *spip) { } } ssp_fifo_preload(spip); - if (spip->spd_txcnt == 0) + if (spip->txcnt == 0) ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_RX; } @@ -176,7 +176,7 @@ void spi_lld_init(void) { #if LPC11xx_SPI_USE_SSP0 spiObjectInit(&SPID1); - SPID1.spd_ssp = LPC_SSP0; + SPID1.ssp = LPC_SSP0; LPC_IOCON->SCK_LOC = LPC11xx_SPI_SCK0_SELECTOR; #if LPC11xx_SPI_SCK0_SELECTOR == SCK0_IS_PIO0_10 LPC_IOCON->JTAG_TCK_PIO0_10 = 0xC2; /* SCK0 without resistors. */ @@ -191,7 +191,7 @@ void spi_lld_init(void) { #if LPC11xx_SPI_USE_SSP1 spiObjectInit(&SPID2); - SPID2.spd_ssp = LPC_SSP1; + SPID2.ssp = LPC_SSP1; LPC_IOCON->PIO2_1 = 0xC2; /* SCK1 without resistors. */ LPC_IOCON->PIO2_2 = 0xC2; /* MISO1 without resistors. */ LPC_IOCON->PIO2_3 = 0xC2; /* MOSI1 without resistors. */ @@ -207,7 +207,7 @@ void spi_lld_init(void) { */ void spi_lld_start(SPIDriver *spip) { - if (spip->spd_state == SPI_STOP) { + if (spip->state == SPI_STOP) { /* Clock activation.*/ #if LPC11xx_SPI_USE_SSP0 if (&SPID1 == spip) { @@ -229,11 +229,11 @@ void spi_lld_start(SPIDriver *spip) { #endif } /* Configuration.*/ - spip->spd_ssp->CR1 = 0; - spip->spd_ssp->ICR = ICR_RT | ICR_ROR; - spip->spd_ssp->CR0 = spip->spd_config->spc_cr0; - spip->spd_ssp->CPSR = spip->spd_config->spc_cpsr; - spip->spd_ssp->CR1 = CR1_SSE; + spip->ssp->CR1 = 0; + spip->ssp->ICR = ICR_RT | ICR_ROR; + spip->ssp->CR0 = spip->config->cr0; + spip->ssp->CPSR = spip->config->cpsr; + spip->ssp->CR1 = CR1_SSE; } /** @@ -245,10 +245,10 @@ void spi_lld_start(SPIDriver *spip) { */ void spi_lld_stop(SPIDriver *spip) { - if (spip->spd_state != SPI_STOP) { - spip->spd_ssp->CR1 = 0; - spip->spd_ssp->CR0 = 0; - spip->spd_ssp->CPSR = 0; + if (spip->state != SPI_STOP) { + spip->ssp->CR1 = 0; + spip->ssp->CR0 = 0; + spip->ssp->CPSR = 0; #if LPC11xx_SPI_USE_SSP0 if (&SPID1 == spip) { LPC_SYSCON->PRESETCTRL &= ~1; @@ -277,7 +277,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palClearPad(spip->config->ssport, spip->config->sspad); } /** @@ -290,7 +290,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palSetPad(spip->config->ssport, spip->config->sspad); } /** @@ -306,11 +306,11 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { - spip->spd_rxptr = NULL; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -331,11 +331,11 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -353,11 +353,11 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - spip->spd_rxptr = NULL; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -375,11 +375,11 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -396,10 +396,10 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - spip->spd_ssp->DR = (uint32_t)frame; - while ((spip->spd_ssp->SR & SR_RNE) == 0) + spip->ssp->DR = (uint32_t)frame; + while ((spip->ssp->SR & SR_RNE) == 0) ; - return (uint16_t)spip->spd_ssp->DR; + return (uint16_t)spip->ssp->DR; } #endif /* HAL_USE_SPI */ diff --git a/os/hal/platforms/LPC11xx/spi_lld.h b/os/hal/platforms/LPC11xx/spi_lld.h index e0525387a..a99557b4a 100644 --- a/os/hal/platforms/LPC11xx/spi_lld.h +++ b/os/hal/platforms/LPC11xx/spi_lld.h @@ -194,13 +194,13 @@ /** * @brief SSP0 clock. */ -#define LPC11xx_SERIAL_SSP0_PCLK \ +#define LPC11xx_SERIAL_SSP0_PCLK \ (LPC11xx_MAINCLK / LPC11xx_SERIAL_SSP0CLKDIV) /** * @brief SSP1 clock. */ -#define LPC11xx_SERIAL_SSP1_PCLK \ +#define LPC11xx_SERIAL_SSP1_PCLK \ (LPC11xx_MAINCLK / LPC11xx_SERIAL_SSP1CLKDIV) /*===========================================================================*/ @@ -227,24 +227,24 @@ typedef struct { /** * @brief Operation complete callback or @p NULL. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ - ioportid_t spc_ssport; + ioportid_t ssport; /** * @brief The chip select line pad number. */ - uint16_t spc_sspad; + uint16_t sspad; /** * @brief SSP CR0 initialization data. */ - uint16_t spc_cr0; + uint16_t cr0; /** * @brief SSP CPSR initialization data. */ - uint32_t spc_cpsr; + uint32_t cpsr; } SPIConfig; /** @@ -254,25 +254,25 @@ struct SPIDriver { /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) @@ -282,23 +282,23 @@ struct SPIDriver { /** * @brief Pointer to the SSP registers block. */ - LPC_SSP_TypeDef *spd_ssp; + LPC_SSP_TypeDef *ssp; /** * @brief Number of bytes yet to be received. */ - uint32_t spd_rxcnt; + uint32_t rxcnt; /** * @brief Receive pointer or @p NULL. */ - void *spd_rxptr; + void *rxptr; /** * @brief Number of bytes yet to be transmitted. */ - uint32_t spd_txcnt; + uint32_t txcnt; /** * @brief Transmit pointer or @p NULL. */ - const void *spd_txptr; + const void *txptr; }; /*===========================================================================*/ diff --git a/os/hal/platforms/LPC13xx/spi_lld.c b/os/hal/platforms/LPC13xx/spi_lld.c index 1a98a7a15..0e186ccd8 100644 --- a/os/hal/platforms/LPC13xx/spi_lld.c +++ b/os/hal/platforms/LPC13xx/spi_lld.c @@ -53,27 +53,27 @@ SPIDriver SPID1; * @param[in] spip pointer to the @p SPIDriver object */ static void ssp_fifo_preload(SPIDriver *spip) { - LPC_SSP_TypeDef *ssp = spip->spd_ssp; - uint32_t n = spip->spd_txcnt > LPC13xx_SSP_FIFO_DEPTH ? - LPC13xx_SSP_FIFO_DEPTH : spip->spd_txcnt; + LPC_SSP_TypeDef *ssp = spip->ssp; + uint32_t n = spip->txcnt > LPC13xx_SSP_FIFO_DEPTH ? + LPC13xx_SSP_FIFO_DEPTH : spip->txcnt; while(((ssp->SR & SR_TNF) != 0) && (n > 0)) { - if (spip->spd_txptr != NULL) { + if (spip->txptr != NULL) { if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) { - const uint16_t *p = spip->spd_txptr; + const uint16_t *p = spip->txptr; ssp->DR = *p++; - spip->spd_txptr = p; + spip->txptr = p; } else { - const uint8_t *p = spip->spd_txptr; + const uint8_t *p = spip->txptr; ssp->DR = *p++; - spip->spd_txptr = p; + spip->txptr = p; } } else ssp->DR = 0xFFFFFFFF; n--; - spip->spd_txcnt--; + spip->txcnt--; } } @@ -83,7 +83,7 @@ static void ssp_fifo_preload(SPIDriver *spip) { * @param[in] spip pointer to the @p SPIDriver object */ static void spi_serve_interrupt(SPIDriver *spip) { - LPC_SSP_TypeDef *ssp = spip->spd_ssp; + LPC_SSP_TypeDef *ssp = spip->ssp; if ((ssp->MIS & MIS_ROR) != 0) { /* The overflow condition should never happen because priority is given @@ -92,22 +92,22 @@ static void spi_serve_interrupt(SPIDriver *spip) { } ssp->ICR = ICR_RT | ICR_ROR; while ((ssp->SR & SR_RNE) != 0) { - if (spip->spd_rxptr != NULL) { + if (spip->rxptr != NULL) { if ((ssp->CR0 & CR0_DSSMASK) > CR0_DSS8BIT) { - uint16_t *p = spip->spd_rxptr; + uint16_t *p = spip->rxptr; *p++ = ssp->DR; - spip->spd_rxptr = p; + spip->rxptr = p; } else { - uint8_t *p = spip->spd_rxptr; + uint8_t *p = spip->rxptr; *p++ = ssp->DR; - spip->spd_rxptr = p; + spip->rxptr = p; } } else (void)ssp->DR; - if (--spip->spd_rxcnt == 0) { - chDbgAssert(spip->spd_txcnt == 0, + if (--spip->rxcnt == 0) { + chDbgAssert(spip->txcnt == 0, "spi_serve_interrupt(), #1", "counter out of synch"); /* Stops the IRQ sources.*/ ssp->IMSC = 0; @@ -118,7 +118,7 @@ static void spi_serve_interrupt(SPIDriver *spip) { } } ssp_fifo_preload(spip); - if (spip->spd_txcnt == 0) + if (spip->txcnt == 0) ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_RX; } @@ -155,7 +155,7 @@ void spi_lld_init(void) { #if LPC13xx_SPI_USE_SSP0 spiObjectInit(&SPID1); - SPID1.spd_ssp = LPC_SSP; + SPID1.ssp = LPC_SSP; LPC_IOCON->SCKLOC = LPC13xx_SPI_SCK0_SELECTOR; #if LPC13xx_SPI_SCK0_SELECTOR == SCK0_IS_PIO0_10 LPC_IOCON->JTAG_TCK_PIO0_10 = 0xC2; /* SCK0 without resistors. */ @@ -178,7 +178,7 @@ void spi_lld_init(void) { */ void spi_lld_start(SPIDriver *spip) { - if (spip->spd_state == SPI_STOP) { + if (spip->state == SPI_STOP) { /* Clock activation.*/ #if LPC13xx_SPI_USE_SSP0 if (&SPID1 == spip) { @@ -191,11 +191,11 @@ void spi_lld_start(SPIDriver *spip) { #endif } /* Configuration.*/ - spip->spd_ssp->CR1 = 0; - spip->spd_ssp->ICR = ICR_RT | ICR_ROR; - spip->spd_ssp->CR0 = spip->spd_config->spc_cr0; - spip->spd_ssp->CPSR = spip->spd_config->spc_cpsr; - spip->spd_ssp->CR1 = CR1_SSE; + spip->ssp->CR1 = 0; + spip->ssp->ICR = ICR_RT | ICR_ROR; + spip->ssp->CR0 = spip->config->cr0; + spip->ssp->CPSR = spip->config->cpsr; + spip->ssp->CR1 = CR1_SSE; } /** @@ -207,10 +207,10 @@ void spi_lld_start(SPIDriver *spip) { */ void spi_lld_stop(SPIDriver *spip) { - if (spip->spd_state != SPI_STOP) { - spip->spd_ssp->CR1 = 0; - spip->spd_ssp->CR0 = 0; - spip->spd_ssp->CPSR = 0; + if (spip->state != SPI_STOP) { + spip->ssp->CR1 = 0; + spip->ssp->CR0 = 0; + spip->ssp->CPSR = 0; #if LPC13xx_SPI_USE_SSP0 if (&SPID1 == spip) { LPC_SYSCON->PRESETCTRL &= ~1; @@ -231,7 +231,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palClearPad(spip->config->ssport, spip->config->sspad); } /** @@ -244,7 +244,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palSetPad(spip->config->ssport, spip->config->sspad); } /** @@ -260,11 +260,11 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { - spip->spd_rxptr = NULL; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -285,11 +285,11 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -307,11 +307,11 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - spip->spd_rxptr = NULL; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -329,11 +329,11 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -350,10 +350,10 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - spip->spd_ssp->DR = (uint32_t)frame; - while ((spip->spd_ssp->SR & SR_RNE) == 0) + spip->ssp->DR = (uint32_t)frame; + while ((spip->ssp->SR & SR_RNE) == 0) ; - return (uint16_t)spip->spd_ssp->DR; + return (uint16_t)spip->ssp->DR; } #endif /* HAL_USE_SPI */ diff --git a/os/hal/platforms/LPC13xx/spi_lld.h b/os/hal/platforms/LPC13xx/spi_lld.h index 153ce815b..a4479a425 100644 --- a/os/hal/platforms/LPC13xx/spi_lld.h +++ b/os/hal/platforms/LPC13xx/spi_lld.h @@ -167,7 +167,7 @@ /** * @brief SSP0 clock. */ -#define LPC13xx_SERIAL_SSP0_PCLK \ +#define LPC13xx_SERIAL_SSP0_PCLK \ (LPC13xx_MAINCLK / LPC13xx_SERIAL_SSP0CLKDIV) /*===========================================================================*/ @@ -194,24 +194,24 @@ typedef struct { /** * @brief Operation complete callback or @p NULL. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ - ioportid_t spc_ssport; + ioportid_t ssport; /** * @brief The chip select line pad number. */ - uint16_t spc_sspad; + uint16_t sspad; /** * @brief SSP CR0 initialization data. */ - uint16_t spc_cr0; + uint16_t cr0; /** * @brief SSP CPSR initialization data. */ - uint32_t spc_cpsr; + uint32_t cpsr; } SPIConfig; /** @@ -221,25 +221,25 @@ struct SPIDriver { /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) @@ -249,23 +249,23 @@ struct SPIDriver { /** * @brief Pointer to the SSP registers block. */ - LPC_SSP_TypeDef *spd_ssp; + LPC_SSP_TypeDef *ssp; /** * @brief Number of bytes yet to be received. */ - uint32_t spd_rxcnt; + uint32_t rxcnt; /** * @brief Receive pointer or @p NULL. */ - void *spd_rxptr; + void *rxptr; /** * @brief Number of bytes yet to be transmitted. */ - uint32_t spd_txcnt; + uint32_t txcnt; /** * @brief Transmit pointer or @p NULL. */ - const void *spd_txptr; + const void *txptr; }; /*===========================================================================*/ diff --git a/os/hal/platforms/LPC214x/spi_lld.c b/os/hal/platforms/LPC214x/spi_lld.c index f920ecf87..808ede590 100644 --- a/os/hal/platforms/LPC214x/spi_lld.c +++ b/os/hal/platforms/LPC214x/spi_lld.c @@ -53,21 +53,21 @@ SPIDriver SPID1; * @param[in] spip pointer to the @p SPIDriver object */ static void ssp_fifo_preload(SPIDriver *spip) { - SSP *ssp = spip->spd_ssp; - uint32_t n = spip->spd_txcnt > LPC214x_SSP_FIFO_DEPTH ? - LPC214x_SSP_FIFO_DEPTH : spip->spd_txcnt; + SSP *ssp = spip->ssp; + uint32_t n = spip->txcnt > LPC214x_SSP_FIFO_DEPTH ? + LPC214x_SSP_FIFO_DEPTH : spip->txcnt; while(((ssp->SSP_SR & SR_TNF) != 0) && (n > 0)) { - if (spip->spd_txptr != NULL) { + if (spip->txptr != NULL) { if ((ssp->SSP_CR0 & CR0_DSSMASK) > CR0_DSS8BIT) - ssp->SSP_DR = *(uint16_t *)spip->spd_txptr++; + ssp->SSP_DR = *(uint16_t *)spip->txptr++; else - ssp->SSP_DR = *(uint8_t *)spip->spd_txptr++; + ssp->SSP_DR = *(uint8_t *)spip->txptr++; } else ssp->SSP_DR = 0xFFFFFFFF; n--; - spip->spd_txcnt--; + spip->txcnt--; } } @@ -80,7 +80,7 @@ __attribute__((noinline)) * @param[in] spip pointer to the @p SPIDriver object */ static void serve_interrupt(SPIDriver *spip) { - SSP *ssp = spip->spd_ssp; + SSP *ssp = spip->ssp; if ((ssp->SSP_MIS & MIS_ROR) != 0) { /* The overflow condition should never happen because priority is given @@ -89,16 +89,16 @@ static void serve_interrupt(SPIDriver *spip) { } ssp->SSP_ICR = ICR_RT | ICR_ROR; while ((ssp->SSP_SR & SR_RNE) != 0) { - if (spip->spd_rxptr != NULL) { + if (spip->rxptr != NULL) { if ((ssp->SSP_CR0 & CR0_DSSMASK) > CR0_DSS8BIT) - *(uint16_t *)spip->spd_rxptr++ = ssp->SSP_DR; + *(uint16_t *)spip->rxptr++ = ssp->SSP_DR; else - *(uint8_t *)spip->spd_rxptr++ = ssp->SSP_DR; + *(uint8_t *)spip->rxptr++ = ssp->SSP_DR; } else (void)ssp->SSP_DR; - if (--spip->spd_rxcnt == 0) { - chDbgAssert(spip->spd_txcnt == 0, + if (--spip->rxcnt == 0) { + chDbgAssert(spip->txcnt == 0, "spi_serve_interrupt(), #1", "counter out of synch"); /* Stops the IRQ sources.*/ ssp->SSP_IMSC = 0; @@ -109,7 +109,7 @@ static void serve_interrupt(SPIDriver *spip) { } } ssp_fifo_preload(spip); - if (spip->spd_txcnt == 0) + if (spip->txcnt == 0) ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_RX; } @@ -147,7 +147,7 @@ void spi_lld_init(void) { #if LPC214x_SPI_USE_SSP spiObjectInit(&SPID1); - SPID1.spd_ssp = SSPBase; + SPID1.ssp = SSPBase; SetVICVector(SPI1IrqHandler, LPC214x_SPI_SSP_IRQ_PRIORITY, SOURCE_SPI1); #endif } @@ -161,7 +161,7 @@ void spi_lld_init(void) { */ void spi_lld_start(SPIDriver *spip) { - if (spip->spd_state == SPI_STOP) { + if (spip->state == SPI_STOP) { /* Clock activation.*/ #if LPC214x_SPI_USE_SSP if (&SPID1 == spip) { @@ -171,14 +171,14 @@ void spi_lld_start(SPIDriver *spip) { #endif } /* Configuration.*/ - spip->spd_ssp->SSP_CR1 = 0; + spip->ssp->SSP_CR1 = 0; /* Emptying the receive FIFO, it happens to not be empty while debugging.*/ - while (spip->spd_ssp->SSP_SR & SR_RNE) - (void) spip->spd_ssp->SSP_DR; - spip->spd_ssp->SSP_ICR = ICR_RT | ICR_ROR; - spip->spd_ssp->SSP_CR0 = spip->spd_config->spc_cr0; - spip->spd_ssp->SSP_CPSR = spip->spd_config->spc_cpsr; - spip->spd_ssp->SSP_CR1 = CR1_SSE; + while (spip->ssp->SSP_SR & SR_RNE) + (void) spip->ssp->SSP_DR; + spip->ssp->SSP_ICR = ICR_RT | ICR_ROR; + spip->ssp->SSP_CR0 = spip->config->cr0; + spip->ssp->SSP_CPSR = spip->config->cpsr; + spip->ssp->SSP_CR1 = CR1_SSE; } /** @@ -190,10 +190,10 @@ void spi_lld_start(SPIDriver *spip) { */ void spi_lld_stop(SPIDriver *spip) { - if (spip->spd_state != SPI_STOP) { - spip->spd_ssp->SSP_CR1 = 0; - spip->spd_ssp->SSP_CR0 = 0; - spip->spd_ssp->SSP_CPSR = 0; + if (spip->state != SPI_STOP) { + spip->ssp->SSP_CR1 = 0; + spip->ssp->SSP_CR0 = 0; + spip->ssp->SSP_CPSR = 0; #if LPC214x_SPI_USE_SSP if (&SPID1 == spip) { PCONP = (PCONP & PCALL) & ~PCSPI1; @@ -212,7 +212,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palClearPad(spip->config->ssport, spip->config->sspad); } /** @@ -225,7 +225,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palSetPad(spip->config->ssport, spip->config->sspad); } /** @@ -241,11 +241,11 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { - spip->spd_rxptr = NULL; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -266,11 +266,11 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -288,11 +288,11 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - spip->spd_rxptr = NULL; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -310,11 +310,11 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; ssp_fifo_preload(spip); - spip->spd_ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; + spip->ssp->SSP_IMSC = IMSC_ROR | IMSC_RT | IMSC_TX | IMSC_RX; } /** @@ -331,10 +331,10 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - spip->spd_ssp->SSP_DR = (uint32_t)frame; - while ((spip->spd_ssp->SSP_SR & SR_RNE) == 0) + spip->ssp->SSP_DR = (uint32_t)frame; + while ((spip->ssp->SSP_SR & SR_RNE) == 0) ; - return (uint16_t)spip->spd_ssp->SSP_DR; + return (uint16_t)spip->ssp->SSP_DR; } #endif /* HAL_USE_SPI */ diff --git a/os/hal/platforms/LPC214x/spi_lld.h b/os/hal/platforms/LPC214x/spi_lld.h index 0e9a3e782..f2d954e46 100644 --- a/os/hal/platforms/LPC214x/spi_lld.h +++ b/os/hal/platforms/LPC214x/spi_lld.h @@ -99,24 +99,24 @@ typedef struct { /** * @brief Operation complete callback or @p NULL. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ - ioportid_t spc_ssport; + ioportid_t ssport; /** * @brief The chip select line pad number. */ - uint16_t spc_sspad; + uint16_t sspad; /** * @brief SSP CR0 initialization data. */ - uint16_t spc_cr0; + uint16_t cr0; /** * @brief SSP CPSR initialization data. */ - uint32_t spc_cpsr; + uint32_t cpsr; } SPIConfig; /** @@ -126,25 +126,25 @@ struct SPIDriver { /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) @@ -154,23 +154,23 @@ struct SPIDriver { /** * @brief Pointer to the SSP registers block. */ - SSP *spd_ssp; + SSP *ssp; /** * @brief Number of bytes yet to be received. */ - uint32_t spd_rxcnt; + uint32_t rxcnt; /** * @brief Receive pointer or @p NULL. */ - void *spd_rxptr; + void *rxptr; /** * @brief Number of bytes yet to be transmitted. */ - uint32_t spd_txcnt; + uint32_t txcnt; /** * @brief Transmit pointer or @p NULL. */ - const void *spd_txptr; + const void *txptr; }; /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/adc_lld.c b/os/hal/platforms/STM32/adc_lld.c index d8822e0ab..bbe8051d4 100644 --- a/os/hal/platforms/STM32/adc_lld.c +++ b/os/hal/platforms/STM32/adc_lld.c @@ -95,9 +95,9 @@ void adc_lld_init(void) { #if STM32_ADC_USE_ADC1 /* Driver initialization.*/ adcObjectInit(&ADCD1); - ADCD1.ad_adc = ADC1; - ADCD1.ad_dmachp = STM32_DMA1_CH1; - ADCD1.ad_dmaccr = (STM32_ADC_ADC1_DMA_PRIORITY << 12) | + ADCD1.adc = ADC1; + ADCD1.dmachp = STM32_DMA1_CH1; + ADCD1.dmaccr = (STM32_ADC_ADC1_DMA_PRIORITY << 12) | DMA_CCR1_EN | DMA_CCR1_MSIZE_0 | DMA_CCR1_PSIZE_0 | DMA_CCR1_MINC | DMA_CCR1_TCIE | DMA_CCR1_TEIE; @@ -132,21 +132,21 @@ void adc_lld_init(void) { void adc_lld_start(ADCDriver *adcp) { /* If in stopped state then enables the ADC and DMA clocks.*/ - if (adcp->ad_state == ADC_STOP) { + if (adcp->state == ADC_STOP) { #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) { dmaEnable(DMA1_ID); /* NOTE: Must be enabled before the IRQs.*/ NVICEnableVector(DMA1_Channel1_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_ADC1_IRQ_PRIORITY)); - dmaChannelSetPeripheral(adcp->ad_dmachp, &ADC1->DR); + dmaChannelSetPeripheral(adcp->dmachp, &ADC1->DR); RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; } #endif /* ADC setup, the calibration procedure has already been performed during initialization.*/ - adcp->ad_adc->CR1 = ADC_CR1_SCAN; - adcp->ad_adc->CR2 = 0; + adcp->adc->CR1 = ADC_CR1_SCAN; + adcp->adc->CR2 = 0; } } @@ -160,7 +160,7 @@ void adc_lld_start(ADCDriver *adcp) { void adc_lld_stop(ADCDriver *adcp) { /* If in ready state then disables the ADC clock.*/ - if (adcp->ad_state == ADC_READY) { + if (adcp->state == ADC_READY) { #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) { ADC1->CR1 = 0; @@ -182,34 +182,34 @@ void adc_lld_stop(ADCDriver *adcp) { */ void adc_lld_start_conversion(ADCDriver *adcp) { uint32_t ccr, n; - const ADCConversionGroup *grpp = adcp->ad_grpp; + const ADCConversionGroup *grpp = adcp->grpp; /* DMA setup.*/ - ccr = adcp->ad_dmaccr; - if (grpp->acg_circular) + ccr = adcp->dmaccr; + if (grpp->circular) ccr |= DMA_CCR1_CIRC; - if (adcp->ad_depth > 1) { + if (adcp->depth > 1) { /* If the buffer depth is greater than one then the half transfer interrupt interrupt is enabled in order to allows streaming processing.*/ ccr |= DMA_CCR1_HTIE; - n = (uint32_t)grpp->acg_num_channels * (uint32_t)adcp->ad_depth; + n = (uint32_t)grpp->num_channels * (uint32_t)adcp->depth; } else - n = (uint32_t)grpp->acg_num_channels; - dmaChannelSetup(adcp->ad_dmachp, n, adcp->ad_samples, ccr); + n = (uint32_t)grpp->num_channels; + dmaChannelSetup(adcp->dmachp, n, adcp->samples, ccr); /* ADC setup.*/ - adcp->ad_adc->CR1 = grpp->acg_cr1 | ADC_CR1_SCAN; - adcp->ad_adc->CR2 = grpp->acg_cr2 | ADC_CR2_DMA | + adcp->adc->CR1 = grpp->cr1 | ADC_CR1_SCAN; + adcp->adc->CR2 = grpp->cr2 | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON; - adcp->ad_adc->SMPR1 = grpp->acg_smpr1; - adcp->ad_adc->SMPR2 = grpp->acg_smpr2; - adcp->ad_adc->SQR1 = grpp->acg_sqr1; - adcp->ad_adc->SQR2 = grpp->acg_sqr2; - adcp->ad_adc->SQR3 = grpp->acg_sqr3; + adcp->adc->SMPR1 = grpp->smpr1; + adcp->adc->SMPR2 = grpp->smpr2; + adcp->adc->SQR1 = grpp->sqr1; + adcp->adc->SQR2 = grpp->sqr2; + adcp->adc->SQR3 = grpp->sqr3; /* ADC start by writing ADC_CR2_ADON a second time.*/ - adcp->ad_adc->CR2 = grpp->acg_cr2 | ADC_CR2_DMA | + adcp->adc->CR2 = grpp->cr2 | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON; } @@ -222,8 +222,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) { */ void adc_lld_stop_conversion(ADCDriver *adcp) { - dmaChannelDisable(adcp->ad_dmachp); - adcp->ad_adc->CR2 = 0; + dmaChannelDisable(adcp->dmachp); + adcp->adc->CR2 = 0; } #endif /* HAL_USE_ADC */ diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index 876560fca..8f01607d8 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -94,8 +94,8 @@ /** * @brief ADC1 DMA error hook. - * @note The default action for DMA errors is a system halt because DMA error - * can only happen because programming errors. + * @note The default action for DMA errors is a system halt because DMA + * error can only happen because programming errors. */ #if !defined(STM32_ADC1_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() @@ -154,56 +154,56 @@ typedef struct { /** * @brief Enables the circular buffer mode for the group. */ - bool_t acg_circular; + bool_t circular; /** * @brief Number of the analog channels belonging to the conversion group. */ - adc_channels_num_t acg_num_channels; + adc_channels_num_t num_channels; /** * @brief Callback function associated to the group or @p NULL. */ - adccallback_t acg_endcb; + adccallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief ADC CR1 register initialization data. * @note All the required bits must be defined into this field except * @p ADC_CR1_SCAN that is enforced inside the driver. */ - uint32_t acg_cr1; + uint32_t cr1; /** * @brief ADC CR2 register initialization data. * @note All the required bits must be defined into this field except * @p ADC_CR2_DMA, @p ADC_CR2_CONT and @p ADC_CR2_ADON that are * enforced inside the driver. */ - uint32_t acg_cr2; + uint32_t cr2; /** * @brief ADC SMPR1 register initialization data. * @details In this field must be specified the sample times for channels * 10...17. */ - uint32_t acg_smpr1; + uint32_t smpr1; /** * @brief ADC SMPR2 register initialization data. * @details In this field must be specified the sample times for channels * 0...9. */ - uint32_t acg_smpr2; + uint32_t smpr2; /** * @brief ADC SQR1 register initialization data. * @details Conversion group sequence 13...16 + sequence length. */ - uint32_t acg_sqr1; + uint32_t sqr1; /** * @brief ADC SQR2 register initialization data. * @details Conversion group sequence 7...12. */ - uint32_t acg_sqr2; + uint32_t sqr2; /** * @brief ADC SQR3 register initialization data. * @details Conversion group sequence 0...6. */ - uint32_t acg_sqr3; + uint32_t sqr3; } ADCConversionGroup; /** @@ -221,37 +221,37 @@ struct ADCDriver { /** * @brief Driver state. */ - adcstate_t ad_state; + adcstate_t state; /** * @brief Current configuration data. */ - const ADCConfig *ad_config; + const ADCConfig *config; /** * @brief Current samples buffer pointer or @p NULL. */ - adcsample_t *ad_samples; + adcsample_t *samples; /** * @brief Current samples buffer depth or @p 0. */ - size_t ad_depth; + size_t depth; /** * @brief Current conversion group pointer or @p NULL. */ - const ADCConversionGroup *ad_grpp; + const ADCConversionGroup *grpp; #if ADC_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *ad_thread; + Thread *thread; #endif #if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the peripheral. */ - Mutex ad_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore ad_semaphore; + Semaphore semaphore; #endif #endif /* ADC_USE_MUTUAL_EXCLUSION */ #if defined(ADC_DRIVER_EXT_FIELDS) @@ -261,15 +261,15 @@ struct ADCDriver { /** * @brief Pointer to the ADCx registers block. */ - ADC_TypeDef *ad_adc; + ADC_TypeDef *adc; /** * @brief Pointer to the DMA registers block. */ - stm32_dma_channel_t *ad_dmachp; + stm32_dma_channel_t *dmachp; /** * @brief DMA CCR register bit mask. */ - uint32_t ad_dmaccr; + uint32_t dmaccr; }; /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c index 5dc7dc572..594471482 100644 --- a/os/hal/platforms/STM32/can_lld.c +++ b/os/hal/platforms/STM32/can_lld.c @@ -63,9 +63,9 @@ CH_IRQ_HANDLER(CAN1_TX_IRQHandler) { /* No more events until a message is transmitted.*/ CAN1->TSR = CAN_TSR_RQCP0 | CAN_TSR_RQCP1 | CAN_TSR_RQCP2; chSysLockFromIsr(); - while (chSemGetCounterI(&CAND1.cd_txsem) < 0) - chSemSignalI(&CAND1.cd_txsem); - chEvtBroadcastI(&CAND1.cd_txempty_event); + while (chSemGetCounterI(&CAND1.txsem) < 0) + chSemSignalI(&CAND1.txsem); + chEvtBroadcastI(&CAND1.txempty_event); chSysUnlockFromIsr(); CH_IRQ_EPILOGUE(); @@ -86,9 +86,9 @@ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) { /* No more receive events until the queue 0 has been emptied.*/ CAN1->IER &= ~CAN_IER_FMPIE0; chSysLockFromIsr(); - while (chSemGetCounterI(&CAND1.cd_rxsem) < 0) - chSemSignalI(&CAND1.cd_rxsem); - chEvtBroadcastI(&CAND1.cd_rxfull_event); + while (chSemGetCounterI(&CAND1.rxsem) < 0) + chSemSignalI(&CAND1.rxsem); + chEvtBroadcastI(&CAND1.rxfull_event); chSysUnlockFromIsr(); } if ((rf0r & CAN_RF0R_FOVR0) > 0) { @@ -96,7 +96,7 @@ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) { CAN1->RF0R = CAN_RF0R_FOVR0; canAddFlagsI(&CAND1, CAN_OVERFLOW_ERROR); chSysLockFromIsr(); - chEvtBroadcastI(&CAND1.cd_error_event); + chEvtBroadcastI(&CAND1.error_event); chSysUnlockFromIsr(); } @@ -132,7 +132,7 @@ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) { /* Wakeup event.*/ if (msr & CAN_MSR_WKUI) { chSysLockFromIsr(); - chEvtBroadcastI(&CAND1.cd_wakeup_event); + chEvtBroadcastI(&CAND1.wakeup_event); chSysUnlockFromIsr(); } /* Error event.*/ @@ -146,7 +146,7 @@ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) { flags |= CAN_FRAMING_ERROR; chSysLockFromIsr(); canAddFlagsI(&CAND1, flags | (canstatus_t)(flags < 16)); - chEvtBroadcastI(&CAND1.cd_error_event); + chEvtBroadcastI(&CAND1.error_event); chSysUnlockFromIsr(); } @@ -167,7 +167,7 @@ void can_lld_init(void) { #if STM32_CAN_USE_CAN1 /* Driver initialization.*/ canObjectInit(&CAND1); - CAND1.cd_can = CAN1; + CAND1.can = CAN1; #endif } @@ -196,37 +196,37 @@ void can_lld_start(CANDriver *canp) { #endif /* Entering initialization mode. */ - canp->cd_state = CAN_STARTING; - canp->cd_can->MCR = CAN_MCR_INRQ; - while ((canp->cd_can->MSR & CAN_MSR_INAK) == 0) + canp->state = CAN_STARTING; + canp->can->MCR = CAN_MCR_INRQ; + while ((canp->can->MSR & CAN_MSR_INAK) == 0) chThdSleepS(1); /* BTR initialization.*/ - canp->cd_can->BTR = canp->cd_config->cc_btr; + canp->can->BTR = canp->config->btr; /* MCR initialization.*/ - canp->cd_can->MCR = canp->cd_config->cc_mcr; + canp->can->MCR = canp->config->mcr; /* Filters initialization.*/ - canp->cd_can->FMR |= CAN_FMR_FINIT; - if (canp->cd_config->cc_num > 0) { + canp->can->FMR |= CAN_FMR_FINIT; + if (canp->config->num > 0) { uint32_t i, fmask; CAN_FilterRegister_TypeDef *cfp; - canp->cd_can->FA1R = 0; - canp->cd_can->FM1R = 0; - canp->cd_can->FS1R = 0; - canp->cd_can->FFA1R = 0; - cfp = canp->cd_can->sFilterRegister; + canp->can->FA1R = 0; + canp->can->FM1R = 0; + canp->can->FS1R = 0; + canp->can->FFA1R = 0; + cfp = canp->can->sFilterRegister; fmask = 1; for (i = 0; i < CAN_MAX_FILTERS; i++) { - if (i < canp->cd_config->cc_num) { - if (canp->cd_config->cc_filters[i].cf_mode) - canp->cd_can->FM1R |= fmask; - if (canp->cd_config->cc_filters[i].cf_scale) - canp->cd_can->FS1R |= fmask; - if (canp->cd_config->cc_filters[i].cf_assignment) - canp->cd_can->FFA1R |= fmask; - cfp->FR1 = canp->cd_config->cc_filters[i].cf_register1; - cfp->FR2 = canp->cd_config->cc_filters[i].cf_register2; - canp->cd_can->FA1R |= fmask; + if (i < canp->config->num) { + if (canp->config->filters[i].mode) + canp->can->FM1R |= fmask; + if (canp->config->filters[i].scale) + canp->can->FS1R |= fmask; + if (canp->config->filters[i].assignment) + canp->can->FFA1R |= fmask; + cfp->FR1 = canp->config->filters[i].register1; + cfp->FR2 = canp->config->filters[i].register2; + canp->can->FA1R |= fmask; } else { cfp->FR1 = 0; @@ -241,16 +241,16 @@ void can_lld_start(CANDriver *canp) { } else { /* Setup a default filter.*/ - canp->cd_can->sFilterRegister[0].FR1 = 0; - canp->cd_can->sFilterRegister[0].FR2 = 0; - canp->cd_can->FM1R = 0; - canp->cd_can->FFA1R = 0; - canp->cd_can->FS1R = 1; - canp->cd_can->FA1R = 1; + canp->can->sFilterRegister[0].FR1 = 0; + canp->can->sFilterRegister[0].FR2 = 0; + canp->can->FM1R = 0; + canp->can->FFA1R = 0; + canp->can->FS1R = 1; + canp->can->FA1R = 1; } - canp->cd_can->FMR &= ~CAN_FMR_FINIT; + canp->can->FMR &= ~CAN_FMR_FINIT; /* Interrupt sources initialization.*/ - canp->cd_can->IER = CAN_IER_TMEIE | CAN_IER_FMPIE0 | CAN_IER_FMPIE1 | + canp->can->IER = CAN_IER_TMEIE | CAN_IER_FMPIE0 | CAN_IER_FMPIE1 | CAN_IER_WKUIE | CAN_IER_ERRIE | CAN_IER_LECIE | CAN_IER_BOFIE | CAN_IER_EPVIE | CAN_IER_EWGIE | CAN_IER_FOVIE0 | CAN_IER_FOVIE1; @@ -266,7 +266,7 @@ void can_lld_start(CANDriver *canp) { void can_lld_stop(CANDriver *canp) { /* If in ready state then disables the CAN peripheral.*/ - if (canp->cd_state == CAN_READY) { + if (canp->state == CAN_READY) { #if STM32_CAN_USE_CAN1 if (&CAND1 == canp) { CAN1->MCR = 0x00010002; /* Register reset value. */ @@ -294,7 +294,7 @@ void can_lld_stop(CANDriver *canp) { */ bool_t can_lld_can_transmit(CANDriver *canp) { - return (canp->cd_can->TSR & CAN_TSR_TME) != 0; + return (canp->can->TSR & CAN_TSR_TME) != 0; } /** @@ -310,18 +310,18 @@ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) { CAN_TxMailBox_TypeDef *tmbp; /* Pointer to a free transmission mailbox.*/ - tmbp = &canp->cd_can->sTxMailBox[(canp->cd_can->TSR & CAN_TSR_CODE) >> 24]; + tmbp = &canp->can->sTxMailBox[(canp->can->TSR & CAN_TSR_CODE) >> 24]; /* Preparing the message.*/ - if (ctfp->cf_IDE) - tir = ((uint32_t)ctfp->cf_EID << 3) | ((uint32_t)ctfp->cf_RTR << 1) | + if (ctfp->IDE) + tir = ((uint32_t)ctfp->EID << 3) | ((uint32_t)ctfp->RTR << 1) | CAN_TI0R_IDE; else - tir = ((uint32_t)ctfp->cf_SID << 21) | ((uint32_t)ctfp->cf_RTR << 1); - tmbp->TDTR = ctfp->cf_DLC; - tmbp->TDLR = ctfp->cf_data32[0]; - tmbp->TDHR = ctfp->cf_data32[1]; - tmbp->TIR = tir | CAN_TI0R_TXRQ; + tir = ((uint32_t)ctfp->SID << 21) | ((uint32_t)ctfp->RTR << 1); + tmbp->TDTR = ctfp->DLC; + tmbp->TDLR = ctfp->data32[0]; + tmbp->TDHR = ctfp->data32[1]; + tmbp->TIR = tir | CAN_TI0R_TXRQ; } /** @@ -337,7 +337,7 @@ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) { */ bool_t can_lld_can_receive(CANDriver *canp) { - return (canp->cd_can->RF0R & CAN_RF0R_FMP0) > 0; + return (canp->can->RF0R & CAN_RF0R_FMP0) > 0; } /** @@ -352,27 +352,27 @@ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) { uint32_t r; /* Fetches the message.*/ - r = canp->cd_can->sFIFOMailBox[0].RIR; - crfp->cf_RTR = (r & CAN_RI0R_RTR) >> 1; - crfp->cf_IDE = (r & CAN_RI0R_IDE) >> 2; - if (crfp->cf_IDE) - crfp->cf_EID = r >> 3; + r = canp->can->sFIFOMailBox[0].RIR; + crfp->RTR = (r & CAN_RI0R_RTR) >> 1; + crfp->IDE = (r & CAN_RI0R_IDE) >> 2; + if (crfp->IDE) + crfp->EID = r >> 3; else - crfp->cf_SID = r >> 21; - r = canp->cd_can->sFIFOMailBox[0].RDTR; - crfp->cf_DLC = r & CAN_RDT0R_DLC; - crfp->cf_FMI = (uint8_t)(r >> 8); - crfp->cf_TIME = (uint16_t)(r >> 16); - crfp->cf_data32[0] = canp->cd_can->sFIFOMailBox[0].RDLR; - crfp->cf_data32[1] = canp->cd_can->sFIFOMailBox[0].RDHR; + crfp->SID = r >> 21; + r = canp->can->sFIFOMailBox[0].RDTR; + crfp->DLC = r & CAN_RDT0R_DLC; + crfp->FMI = (uint8_t)(r >> 8); + crfp->TIME = (uint16_t)(r >> 16); + crfp->data32[0] = canp->can->sFIFOMailBox[0].RDLR; + crfp->data32[1] = canp->can->sFIFOMailBox[0].RDHR; /* Releases the mailbox.*/ - canp->cd_can->RF0R = CAN_RF0R_RFOM0; + canp->can->RF0R = CAN_RF0R_RFOM0; /* If the queue is empty re-enables the interrupt in order to generate events again.*/ - if ((canp->cd_can->RF0R & CAN_RF0R_FMP0) == 0) - canp->cd_can->IER |= CAN_IER_FMPIE0; + if ((canp->can->RF0R & CAN_RF0R_FMP0) == 0) + canp->can->IER |= CAN_IER_FMPIE0; } #if CAN_USE_SLEEP_MODE || defined(__DOXYGEN__) @@ -385,7 +385,7 @@ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) { */ void can_lld_sleep(CANDriver *canp) { - canp->cd_can->MCR |= CAN_MCR_SLEEP; + canp->can->MCR |= CAN_MCR_SLEEP; } /** @@ -397,7 +397,7 @@ void can_lld_sleep(CANDriver *canp) { */ void can_lld_wakeup(CANDriver *canp) { - canp->cd_can->MCR &= ~CAN_MCR_SLEEP; + canp->can->MCR &= ~CAN_MCR_SLEEP; } #endif /* CAN_USE_SLEEP_MODE */ diff --git a/os/hal/platforms/STM32/can_lld.h b/os/hal/platforms/STM32/can_lld.h index 0d4c9b615..2e82c45e3 100644 --- a/os/hal/platforms/STM32/can_lld.h +++ b/os/hal/platforms/STM32/can_lld.h @@ -121,22 +121,22 @@ typedef uint32_t canstatus_t; */ typedef struct { struct { - uint8_t cf_DLC:4; /**< @brief Data length. */ - uint8_t cf_RTR:1; /**< @brief Frame type. */ - uint8_t cf_IDE:1; /**< @brief Identifier type. */ + uint8_t DLC:4; /**< @brief Data length. */ + uint8_t RTR:1; /**< @brief Frame type. */ + uint8_t IDE:1; /**< @brief Identifier type. */ }; union { struct { - uint32_t cf_SID:11; /**< @brief Standard identifier.*/ + uint32_t SID:11; /**< @brief Standard identifier.*/ }; struct { - uint32_t cf_EID:29; /**< @brief Extended identifier.*/ + uint32_t EID:29; /**< @brief Extended identifier.*/ }; }; union { - uint8_t cf_data8[8]; /**< @brief Frame data. */ - uint16_t cf_data16[4]; /**< @brief Frame data. */ - uint32_t cf_data32[2]; /**< @brief Frame data. */ + uint8_t data8[8]; /**< @brief Frame data. */ + uint16_t data16[4]; /**< @brief Frame data. */ + uint32_t data32[2]; /**< @brief Frame data. */ }; } CANTxFrame; @@ -147,26 +147,26 @@ typedef struct { */ typedef struct { struct { - uint8_t cf_FMI; /**< @brief Filter id. */ - uint16_t cf_TIME; /**< @brief Time stamp. */ + uint8_t FMI; /**< @brief Filter id. */ + uint16_t TIME; /**< @brief Time stamp. */ }; struct { - uint8_t cf_DLC:4; /**< @brief Data length. */ - uint8_t cf_RTR:1; /**< @brief Frame type. */ - uint8_t cf_IDE:1; /**< @brief Identifier type. */ + uint8_t DLC:4; /**< @brief Data length. */ + uint8_t RTR:1; /**< @brief Frame type. */ + uint8_t IDE:1; /**< @brief Identifier type. */ }; union { struct { - uint32_t cf_SID:11; /**< @brief Standard identifier.*/ + uint32_t SID:11; /**< @brief Standard identifier.*/ }; struct { - uint32_t cf_EID:29; /**< @brief Extended identifier.*/ + uint32_t EID:29; /**< @brief Extended identifier.*/ }; }; union { - uint8_t cf_data8[8]; /**< @brief Frame data. */ - uint16_t cf_data16[4]; /**< @brief Frame data. */ - uint32_t cf_data32[2]; /**< @brief Frame data. */ + uint8_t data8[8]; /**< @brief Frame data. */ + uint16_t data16[4]; /**< @brief Frame data. */ + uint32_t data32[2]; /**< @brief Frame data. */ }; } CANRxFrame; @@ -180,27 +180,27 @@ typedef struct { * @note This bit represent the CAN_FM1R register bit associated to this * filter (0=mask mode, 1=list mode). */ - uint32_t cf_mode:1; + uint32_t mode:1; /** * @brief Filter sclae. * @note This bit represent the CAN_FS1R register bit associated to this * filter (0=16 bits mode, 1=32 bits mode). */ - uint32_t cf_scale:1; + uint32_t scale:1; /** * @brief Filter mode. * @note This bit represent the CAN_FFA1R register bit associated to this * filter, must be set to zero in this version of the driver. */ - uint32_t cf_assignment:1; + uint32_t assignment:1; /** * @brief Filter register 1 (identifier). */ - uint32_t cf_register1; + uint32_t register1; /** - * @brief Filter register 2 (mask/identifier depending on cf_mode=0/1). + * @brief Filter register 2 (mask/identifier depending on mode=0/1). */ - uint32_t cf_register2; + uint32_t register2; } CANFilter; /** @@ -212,25 +212,25 @@ typedef struct { * @note Some bits in this register are enforced by the driver regardless * their status in this field. */ - uint32_t cc_mcr; + uint32_t mcr; /** * @brief CAN BTR register initialization data. * @note Some bits in this register are enforced by the driver regardless * their status in this field. */ - uint32_t cc_btr; + uint32_t btr; /** * @brief Number of elements into the filters array. * @note By setting this field to zero a default filter is enabled that * allows all frames, this should be adequate for simple applications. */ - uint32_t cc_num; + uint32_t num; /** * @brief Pointer to an array of @p CANFilter structures. - * @note This field can be set to @p NULL if the field @p cc_num is set to + * @note This field can be set to @p NULL if the field @p num is set to * zero. */ - const CANFilter *cc_filters; + const CANFilter *filters; } CANConfig; /** @@ -240,19 +240,19 @@ typedef struct { /** * @brief Driver state. */ - canstate_t cd_state; + canstate_t state; /** * @brief Current configuration data. */ - const CANConfig *cd_config; + const CANConfig *config; /** * @brief Transmission queue semaphore. */ - Semaphore cd_txsem; + Semaphore txsem; /** * @brief Receive queue semaphore. */ - Semaphore cd_rxsem; + Semaphore rxsem; /** * @brief One or more frames become available. * @note After broadcasting this event it will not be broadcasted again @@ -262,34 +262,34 @@ typedef struct { * invoking @p chReceive() when listening to this event. This behavior * minimizes the interrupt served by the system because CAN traffic. */ - EventSource cd_rxfull_event; + EventSource rxfull_event; /** * @brief One or more transmission slots become available. */ - EventSource cd_txempty_event; + EventSource txempty_event; /** * @brief A CAN bus error happened. */ - EventSource cd_error_event; + EventSource error_event; /** * @brief Error flags set when an error event is broadcasted. */ - canstatus_t cd_status; + canstatus_t status; #if CAN_USE_SLEEP_MODE || defined (__DOXYGEN__) /** * @brief Entering sleep state event. */ - EventSource cd_sleep_event; + EventSource sleep_event; /** * @brief Exiting sleep state event. */ - EventSource cd_wakeup_event; + EventSource wakeup_event; #endif /* CAN_USE_SLEEP_MODE */ /* End of the mandatory fields.*/ /** * @brief Pointer to the CAN registers. */ - CAN_TypeDef *cd_can; + CAN_TypeDef *can; } CANDriver; /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c index a101b284a..6a5b210df 100644 --- a/os/hal/platforms/STM32/pwm_lld.c +++ b/os/hal/platforms/STM32/pwm_lld.c @@ -107,20 +107,20 @@ PWMDriver PWMD5; static void serve_interrupt(PWMDriver *pwmp) { uint16_t sr; - sr = pwmp->pd_tim->SR; - sr &= pwmp->pd_tim->DIER; - pwmp->pd_tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | + sr = pwmp->tim->SR; + sr &= pwmp->tim->DIER; + pwmp->tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF | TIM_SR_UIF); if ((sr & TIM_SR_CC1IF) != 0) - pwmp->pd_config->pc_channels[0].pcc_callback(pwmp); + pwmp->config->channels[0].callback(pwmp); if ((sr & TIM_SR_CC2IF) != 0) - pwmp->pd_config->pc_channels[1].pcc_callback(pwmp); + pwmp->config->channels[1].callback(pwmp); if ((sr & TIM_SR_CC3IF) != 0) - pwmp->pd_config->pc_channels[2].pcc_callback(pwmp); + pwmp->config->channels[2].callback(pwmp); if ((sr & TIM_SR_CC4IF) != 0) - pwmp->pd_config->pc_channels[3].pcc_callback(pwmp); + pwmp->config->channels[3].callback(pwmp); if ((sr & TIM_SR_UIF) != 0) - pwmp->pd_config->pc_callback(pwmp); + pwmp->config->callback(pwmp); } #endif /* STM32_PWM_USE_TIM2 || ... || STM32_PWM_USE_TIM5 */ @@ -142,7 +142,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) { CH_IRQ_PROLOGUE(); TIM1->SR = ~TIM_SR_UIF; - PWMD1.pd_config->pc_callback(&PWMD1); + PWMD1.config->callback(&PWMD1); CH_IRQ_EPILOGUE(); } @@ -163,13 +163,13 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) { sr = TIM1->SR & TIM1->DIER; TIM1->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF); if ((sr & TIM_SR_CC1IF) != 0) - PWMD1.pd_config->pc_channels[0].pcc_callback(&PWMD1); + PWMD1.config->channels[0].callback(&PWMD1); if ((sr & TIM_SR_CC2IF) != 0) - PWMD1.pd_config->pc_channels[1].pcc_callback(&PWMD1); + PWMD1.config->channels[1].callback(&PWMD1); if ((sr & TIM_SR_CC3IF) != 0) - PWMD1.pd_config->pc_channels[2].pcc_callback(&PWMD1); + PWMD1.config->channels[2].callback(&PWMD1); if ((sr & TIM_SR_CC4IF) != 0) - PWMD1.pd_config->pc_channels[3].pcc_callback(&PWMD1); + PWMD1.config->channels[3].callback(&PWMD1); CH_IRQ_EPILOGUE(); } @@ -253,36 +253,36 @@ void pwm_lld_init(void) { #if STM32_PWM_USE_TIM1 /* Driver initialization.*/ pwmObjectInit(&PWMD1); - PWMD1.pd_enabled_channels = 0; - PWMD1.pd_tim = TIM1; + PWMD1.enabled_channels = 0; + PWMD1.tim = TIM1; #endif #if STM32_PWM_USE_TIM2 /* Driver initialization.*/ pwmObjectInit(&PWMD2); - PWMD2.pd_enabled_channels = 0; - PWMD2.pd_tim = TIM2; + PWMD2.enabled_channels = 0; + PWMD2.tim = TIM2; #endif #if STM32_PWM_USE_TIM3 /* Driver initialization.*/ pwmObjectInit(&PWMD3); - PWMD3.pd_enabled_channels = 0; - PWMD3.pd_tim = TIM3; + PWMD3.enabled_channels = 0; + PWMD3.tim = TIM3; #endif #if STM32_PWM_USE_TIM4 /* Driver initialization.*/ pwmObjectInit(&PWMD4); - PWMD4.pd_enabled_channels = 0; - PWMD4.pd_tim = TIM4; + PWMD4.enabled_channels = 0; + PWMD4.tim = TIM4; #endif #if STM32_PWM_USE_TIM5 /* Driver initialization.*/ pwmObjectInit(&PWMD5); - PWMD5.pd_enabled_channels = 0; - PWMD5.pd_tim = TIM5; + PWMD5.enabled_channels = 0; + PWMD5.tim = TIM5; #endif } @@ -297,9 +297,9 @@ void pwm_lld_start(PWMDriver *pwmp) { uint16_t ccer; /* Reset channels.*/ - pwmp->pd_enabled_channels = 0; /* All channels disabled. */ + pwmp->enabled_channels = 0; /* All channels disabled. */ - if (pwmp->pd_state == PWM_STOP) { + if (pwmp->state == PWM_STOP) { /* Clock activation and timer reset.*/ #if STM32_PWM_USE_TIM1 if (&PWMD1 == pwmp) { @@ -352,11 +352,11 @@ void pwm_lld_start(PWMDriver *pwmp) { /* All channels configured in PWM1 mode with preload enabled and will stay that way until the driver is stopped.*/ - pwmp->pd_tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | + pwmp->tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2PE; - pwmp->pd_tim->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | + pwmp->tim->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE; @@ -364,23 +364,23 @@ void pwm_lld_start(PWMDriver *pwmp) { else { /* Driver re-configuration scenario, it must be stopped first.*/ /* Really required ?????????? */ - pwmp->pd_tim->CR1 = 0; /* Timer stopped. */ - pwmp->pd_tim->CR2 = 0; /* Timer stopped. */ - pwmp->pd_tim->SMCR = 0; /* Slave mode disabled. */ - pwmp->pd_tim->CCR1 = 0; /* Comparator 1 disabled. */ - pwmp->pd_tim->CCR2 = 0; /* Comparator 2 disabled. */ - pwmp->pd_tim->CCR3 = 0; /* Comparator 3 disabled. */ - pwmp->pd_tim->CCR4 = 0; /* Comparator 4 disabled. */ - pwmp->pd_tim->CNT = 0; + pwmp->tim->CR1 = 0; /* Timer stopped. */ + pwmp->tim->CR2 = 0; /* Timer stopped. */ + pwmp->tim->SMCR = 0; /* Slave mode disabled. */ + pwmp->tim->CCR1 = 0; /* Comparator 1 disabled. */ + pwmp->tim->CCR2 = 0; /* Comparator 2 disabled. */ + pwmp->tim->CCR3 = 0; /* Comparator 3 disabled. */ + pwmp->tim->CCR4 = 0; /* Comparator 4 disabled. */ + pwmp->tim->CNT = 0; } /* Timer configuration.*/ - pwmp->pd_tim->CR2 = pwmp->pd_config->pc_cr2; - pwmp->pd_tim->PSC = pwmp->pd_config->pc_psc; - pwmp->pd_tim->ARR = pwmp->pd_config->pc_arr; + pwmp->tim->CR2 = pwmp->config->cr2; + pwmp->tim->PSC = pwmp->config->psc; + pwmp->tim->ARR = pwmp->config->arr; /* Output enables and polarities setup.*/ ccer = 0; - switch (pwmp->pd_config->pc_channels[0].pcc_mode) { + switch (pwmp->config->channels[0].mode) { case PWM_OUTPUT_ACTIVE_LOW: ccer |= TIM_CCER_CC1P; case PWM_OUTPUT_ACTIVE_HIGH: @@ -388,7 +388,7 @@ void pwm_lld_start(PWMDriver *pwmp) { default: ; } - switch (pwmp->pd_config->pc_channels[1].pcc_mode) { + switch (pwmp->config->channels[1].mode) { case PWM_OUTPUT_ACTIVE_LOW: ccer |= TIM_CCER_CC2P; case PWM_OUTPUT_ACTIVE_HIGH: @@ -396,7 +396,7 @@ void pwm_lld_start(PWMDriver *pwmp) { default: ; } - switch (pwmp->pd_config->pc_channels[2].pcc_mode) { + switch (pwmp->config->channels[2].mode) { case PWM_OUTPUT_ACTIVE_LOW: ccer |= TIM_CCER_CC3P; case PWM_OUTPUT_ACTIVE_HIGH: @@ -404,7 +404,7 @@ void pwm_lld_start(PWMDriver *pwmp) { default: ; } - switch (pwmp->pd_config->pc_channels[3].pcc_mode) { + switch (pwmp->config->channels[3].mode) { case PWM_OUTPUT_ACTIVE_LOW: ccer |= TIM_CCER_CC4P; case PWM_OUTPUT_ACTIVE_HIGH: @@ -412,13 +412,13 @@ void pwm_lld_start(PWMDriver *pwmp) { default: ; } - pwmp->pd_tim->CCER = ccer; - pwmp->pd_tim->EGR = TIM_EGR_UG; /* Update event. */ - pwmp->pd_tim->SR = 0; /* Clear pending IRQs. */ - pwmp->pd_tim->DIER = pwmp->pd_config->pc_callback == NULL ? 0 : TIM_DIER_UIE; - pwmp->pd_tim->BDTR = TIM_BDTR_MOE; + pwmp->tim->CCER = ccer; + pwmp->tim->EGR = TIM_EGR_UG; /* Update event. */ + pwmp->tim->SR = 0; /* Clear pending IRQs. */ + pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE; + pwmp->tim->BDTR = TIM_BDTR_MOE; /* Timer configured and started.*/ - pwmp->pd_tim->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN; + pwmp->tim->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN; } /** @@ -431,19 +431,19 @@ void pwm_lld_start(PWMDriver *pwmp) { void pwm_lld_stop(PWMDriver *pwmp) { /* If in ready state then disables the PWM clock.*/ - if (pwmp->pd_state == PWM_READY) { - pwmp->pd_enabled_channels = 0; /* All channels disabled. */ - pwmp->pd_tim->CR1 = 0; - pwmp->pd_tim->CR2 = 0; - pwmp->pd_tim->CCER = 0; /* Outputs disabled. */ - pwmp->pd_tim->CCR1 = 0; /* Comparator 1 disabled. */ - pwmp->pd_tim->CCR2 = 0; /* Comparator 2 disabled. */ - pwmp->pd_tim->CCR3 = 0; /* Comparator 3 disabled. */ - pwmp->pd_tim->CCR4 = 0; /* Comparator 4 disabled. */ - pwmp->pd_tim->BDTR = 0; - pwmp->pd_tim->DIER = 0; - pwmp->pd_tim->SR = 0; - pwmp->pd_tim->EGR = TIM_EGR_UG; /* Update event. */ + if (pwmp->state == PWM_READY) { + pwmp->enabled_channels = 0; /* All channels disabled. */ + pwmp->tim->CR1 = 0; + pwmp->tim->CR2 = 0; + pwmp->tim->CCER = 0; /* Outputs disabled. */ + pwmp->tim->CCR1 = 0; /* Comparator 1 disabled. */ + pwmp->tim->CCR2 = 0; /* Comparator 2 disabled. */ + pwmp->tim->CCR3 = 0; /* Comparator 3 disabled. */ + pwmp->tim->CCR4 = 0; /* Comparator 4 disabled. */ + pwmp->tim->BDTR = 0; + pwmp->tim->DIER = 0; + pwmp->tim->SR = 0; + pwmp->tim->EGR = TIM_EGR_UG; /* Update event. */ #if STM32_PWM_USE_TIM1 if (&PWMD1 == pwmp) { @@ -492,15 +492,15 @@ void pwm_lld_enable_channel(PWMDriver *pwmp, pwmchannel_t channel, pwmcnt_t width) { - *(&pwmp->pd_tim->CCR1 + (channel * 2)) = width; /* New duty cycle. */ - if ((pwmp->pd_enabled_channels & (1 << channel)) == 0) { + *(&pwmp->tim->CCR1 + (channel * 2)) = width; /* New duty cycle. */ + if ((pwmp->enabled_channels & (1 << channel)) == 0) { /* The channel is not enabled yet.*/ - pwmp->pd_enabled_channels |= (1 << channel); + pwmp->enabled_channels |= (1 << channel); /* If there is a callback associated to the channel then the proper interrupt is cleared and enabled.*/ - if (pwmp->pd_config->pc_channels[channel].pcc_callback) { - pwmp->pd_tim->SR = ~(2 << channel); - pwmp->pd_tim->DIER |= (2 << channel); + if (pwmp->config->channels[channel].callback) { + pwmp->tim->SR = ~(2 << channel); + pwmp->tim->DIER |= (2 << channel); } } } @@ -517,9 +517,9 @@ void pwm_lld_enable_channel(PWMDriver *pwmp, */ void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { - *(&pwmp->pd_tim->CCR1 + (channel * 2)) = 0; - pwmp->pd_tim->DIER &= ~(2 << channel); - pwmp->pd_enabled_channels &= ~(1 << channel); + *(&pwmp->tim->CCR1 + (channel * 2)) = 0; + pwmp->tim->DIER &= ~(2 << channel); + pwmp->enabled_channels &= ~(1 << channel); } #endif /* HAL_USE_PWM */ diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index 1e9dd855a..5954a29b0 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -186,13 +186,13 @@ typedef struct { /** * @brief Channel active logic level. */ - pwmmode_t pcc_mode; + pwmmode_t mode; /** * @brief Channel callback pointer. * @note This callback is invoked on the channel compare event. If set to * @p NULL then the callback is disabled. */ - pwmcallback_t pcc_callback; + pwmcallback_t callback; /* End of the mandatory fields.*/ } PWMChannelConfig; @@ -205,25 +205,25 @@ typedef struct { * @note This callback is invoked on PWM counter reset. If set to * @p NULL then the callback is disabled. */ - pwmcallback_t pc_callback; + pwmcallback_t callback; /** * @brief Channels configurations. */ - PWMChannelConfig pc_channels[PWM_CHANNELS]; + PWMChannelConfig channels[PWM_CHANNELS]; /* End of the mandatory fields.*/ /** * @brief TIM PSC (pre-scaler) register initialization data. */ - uint16_t pc_psc; + uint16_t psc; /** * @brief TIM ARR (auto-reload) register initialization data. */ - uint16_t pc_arr; + uint16_t arr; /** * @brief TIM CR2 register initialization data. * @note The value of this field should normally be equal to zero. */ - uint16_t pc_cr2; + uint16_t cr2; } PWMConfig; /** @@ -233,11 +233,11 @@ struct PWMDriver { /** * @brief Driver state. */ - pwmstate_t pd_state; + pwmstate_t state; /** * @brief Current driver configuration data. */ - const PWMConfig *pd_config; + const PWMConfig *config; #if defined(PWM_DRIVER_EXT_FIELDS) PWM_DRIVER_EXT_FIELDS #endif @@ -245,11 +245,11 @@ struct PWMDriver { /** * @brief Bit mask of the enabled channels. */ - uint32_t pd_enabled_channels; + uint32_t enabled_channels; /** * @brief Pointer to the TIMx registers block. */ - TIM_TypeDef *pd_tim; + TIM_TypeDef *tim; }; /*===========================================================================*/ @@ -272,7 +272,7 @@ struct PWMDriver { * and/or the STM32 Reference Manual for the right clock * source. * @param[in] pwmclk PWM clock frequency in cycles - * @return The value to be stored in the @p pc_psc field of the + * @return The value to be stored in the @p psc field of the * @p PWMConfig structure. */ #define PWM_COMPUTE_PSC(clksrc, pwmclk) \ @@ -284,7 +284,7 @@ struct PWMDriver { * * @param[in] pwmclk PWM clock frequency in cycles * @param[in] pwmperiod PWM cycle period in nanoseconds - * @return The value to be stored in the @p pc_arr field of the + * @return The value to be stored in the @p arr field of the * @p PWMConfig structure. */ #define PWM_COMPUTE_ARR(pwmclk, pwmperiod) \ @@ -305,7 +305,7 @@ struct PWMDriver { * @api */ #define PWM_FRACTION_TO_WIDTH(pwmp, numerator, denominator) \ - ((uint16_t)((((uint32_t)(pwmp)->pd_config->pc_arr + 1UL) * \ + ((uint16_t)((((uint32_t)(pwmp)->config->arr + 1UL) * \ (uint32_t)(denominator)) / (uint32_t)(numerator))) /** diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c index 1987373ae..53f0ae1c7 100644 --- a/os/hal/platforms/STM32/spi_lld.c +++ b/os/hal/platforms/STM32/spi_lld.c @@ -66,8 +66,8 @@ static uint16_t dummyrx; * @param[in] spip pointer to the @p SPIDriver object */ #define dma_stop(spip) { \ - dmaChannelDisable(spip->spd_dmatx); \ - dmaChannelDisable(spip->spd_dmarx); \ + dmaChannelDisable(spip->dmatx); \ + dmaChannelDisable(spip->dmarx); \ } /** @@ -76,8 +76,8 @@ static uint16_t dummyrx; * @param[in] spip pointer to the @p SPIDriver object */ #define dma_start(spip) { \ - dmaChannelEnable((spip)->spd_dmarx); \ - dmaChannelEnable((spip)->spd_dmatx); \ + dmaChannelEnable((spip)->dmarx); \ + dmaChannelEnable((spip)->dmatx); \ } /** @@ -219,26 +219,26 @@ void spi_lld_init(void) { #if STM32_SPI_USE_SPI1 spiObjectInit(&SPID1); - SPID1.spd_thread = NULL; - SPID1.spd_spi = SPI1; - SPID1.spd_dmarx = STM32_DMA1_CH2; - SPID1.spd_dmatx = STM32_DMA1_CH3; + SPID1.thread = NULL; + SPID1.spi = SPI1; + SPID1.dmarx = STM32_DMA1_CH2; + SPID1.dmatx = STM32_DMA1_CH3; #endif #if STM32_SPI_USE_SPI2 spiObjectInit(&SPID2); - SPID2.spd_thread = NULL; - SPID2.spd_spi = SPI2; - SPID2.spd_dmarx = STM32_DMA1_CH4; - SPID2.spd_dmatx = STM32_DMA1_CH5; + SPID2.thread = NULL; + SPID2.spi = SPI2; + SPID2.dmarx = STM32_DMA1_CH4; + SPID2.dmatx = STM32_DMA1_CH5; #endif #if STM32_SPI_USE_SPI3 spiObjectInit(&SPID3); - SPID3.spd_thread = NULL; - SPID3.spd_spi = SPI3; - SPID3.spd_dmarx = STM32_DMA2_CH1; - SPID3.spd_dmatx = STM32_DMA2_CH2; + SPID3.thread = NULL; + SPID3.spi = SPI3; + SPID3.dmarx = STM32_DMA2_CH1; + SPID3.dmatx = STM32_DMA2_CH2; #endif } @@ -252,7 +252,7 @@ void spi_lld_init(void) { void spi_lld_start(SPIDriver *spip) { /* If in stopped state then enables the SPI and DMA clocks.*/ - if (spip->spd_state == SPI_STOP) { + if (spip->state == SPI_STOP) { #if STM32_SPI_USE_SPI1 if (&SPID1 == spip) { dmaEnable(DMA1_ID); /* NOTE: Must be enabled before the IRQs.*/ @@ -285,23 +285,23 @@ void spi_lld_start(SPIDriver *spip) { #endif /* DMA setup.*/ - dmaChannelSetPeripheral(spip->spd_dmarx, &spip->spd_spi->DR); - dmaChannelSetPeripheral(spip->spd_dmatx, &spip->spd_spi->DR); + dmaChannelSetPeripheral(spip->dmarx, &spip->spi->DR); + dmaChannelSetPeripheral(spip->dmatx, &spip->spi->DR); } /* More DMA setup.*/ - if ((spip->spd_config->spc_cr1 & SPI_CR1_DFF) == 0) - spip->spd_dmaccr = (STM32_SPI_SPI2_DMA_PRIORITY << 12) | + if ((spip->config->cr1 & SPI_CR1_DFF) == 0) + spip->dmaccr = (STM32_SPI_SPI2_DMA_PRIORITY << 12) | DMA_CCR1_TEIE; /* 8 bits transfers. */ else - spip->spd_dmaccr = (STM32_SPI_SPI2_DMA_PRIORITY << 12) | + spip->dmaccr = (STM32_SPI_SPI2_DMA_PRIORITY << 12) | DMA_CCR1_TEIE | DMA_CCR1_MSIZE_0 | DMA_CCR1_PSIZE_0; /* 16 bits transfers. */ /* SPI setup and enable.*/ - spip->spd_spi->CR1 = 0; - spip->spd_spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN; - spip->spd_spi->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR | SPI_CR1_SPE; + spip->spi->CR1 = 0; + spip->spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN; + spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR | SPI_CR1_SPE; } /** @@ -314,10 +314,10 @@ void spi_lld_start(SPIDriver *spip) { void spi_lld_stop(SPIDriver *spip) { /* If in ready state then disables the SPI clock.*/ - if (spip->spd_state == SPI_READY) { + if (spip->state == SPI_READY) { /* SPI disable.*/ - spip->spd_spi->CR1 = 0; + spip->spi->CR1 = 0; #if STM32_SPI_USE_SPI1 if (&SPID1 == spip) { @@ -355,7 +355,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palClearPad(spip->config->ssport, spip->config->sspad); } /** @@ -368,7 +368,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palSetPad(spip->config->ssport, spip->config->sspad); } /** @@ -384,10 +384,10 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { - dmaChannelSetup(spip->spd_dmarx, n, &dummyrx, - spip->spd_dmaccr | DMA_CCR1_TCIE | DMA_CCR1_EN); - dmaChannelSetup(spip->spd_dmatx, n, &dummytx, - spip->spd_dmaccr | DMA_CCR1_DIR | DMA_CCR1_EN); + dmaChannelSetup(spip->dmarx, n, &dummyrx, + spip->dmaccr | DMA_CCR1_TCIE | DMA_CCR1_EN); + dmaChannelSetup(spip->dmatx, n, &dummytx, + spip->dmaccr | DMA_CCR1_DIR | DMA_CCR1_EN); } /** @@ -408,11 +408,11 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { - dmaChannelSetup(spip->spd_dmarx, n, rxbuf, - spip->spd_dmaccr | DMA_CCR1_TCIE | DMA_CCR1_MINC | + dmaChannelSetup(spip->dmarx, n, rxbuf, + spip->dmaccr | DMA_CCR1_TCIE | DMA_CCR1_MINC | DMA_CCR1_EN); - dmaChannelSetup(spip->spd_dmatx, n, txbuf, - spip->spd_dmaccr | DMA_CCR1_DIR | DMA_CCR1_MINC | + dmaChannelSetup(spip->dmatx, n, txbuf, + spip->dmaccr | DMA_CCR1_DIR | DMA_CCR1_MINC | DMA_CCR1_EN); } @@ -431,10 +431,10 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - dmaChannelSetup(spip->spd_dmarx, n, &dummyrx, - spip->spd_dmaccr | DMA_CCR1_TCIE | DMA_CCR1_EN); - dmaChannelSetup(spip->spd_dmatx, n, txbuf, - spip->spd_dmaccr | DMA_CCR1_DIR | DMA_CCR1_MINC | + dmaChannelSetup(spip->dmarx, n, &dummyrx, + spip->dmaccr | DMA_CCR1_TCIE | DMA_CCR1_EN); + dmaChannelSetup(spip->dmatx, n, txbuf, + spip->dmaccr | DMA_CCR1_DIR | DMA_CCR1_MINC | DMA_CCR1_EN); } @@ -453,11 +453,11 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - dmaChannelSetup(spip->spd_dmarx, n, rxbuf, - spip->spd_dmaccr | DMA_CCR1_TCIE | DMA_CCR1_MINC | + dmaChannelSetup(spip->dmarx, n, rxbuf, + spip->dmaccr | DMA_CCR1_TCIE | DMA_CCR1_MINC | DMA_CCR1_EN); - dmaChannelSetup(spip->spd_dmatx, n, &dummytx, - spip->spd_dmaccr | DMA_CCR1_DIR | DMA_CCR1_EN); + dmaChannelSetup(spip->dmatx, n, &dummytx, + spip->dmaccr | DMA_CCR1_DIR | DMA_CCR1_EN); } /** @@ -474,10 +474,10 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - spip->spd_spi->DR = frame; - while ((spip->spd_spi->SR & SPI_SR_RXNE) == 0) + spip->spi->DR = frame; + while ((spip->spi->SR & SPI_SR_RXNE) == 0) ; - return spip->spd_spi->DR; + return spip->spi->DR; } #endif /* HAL_USE_SPI */ diff --git a/os/hal/platforms/STM32/spi_lld.h b/os/hal/platforms/STM32/spi_lld.h index 9e29c5d68..306540ed7 100644 --- a/os/hal/platforms/STM32/spi_lld.h +++ b/os/hal/platforms/STM32/spi_lld.h @@ -187,20 +187,20 @@ typedef struct { /** * @brief Operation complete callback or @p NULL. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ - ioportid_t spc_ssport; + ioportid_t ssport; /** * @brief The chip select line pad number. */ - uint16_t spc_sspad; + uint16_t sspad; /** * @brief SPI initialization data. */ - uint16_t spc_cr1; + uint16_t cr1; } SPIConfig; /** @@ -210,25 +210,25 @@ struct SPIDriver{ /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) @@ -238,19 +238,19 @@ struct SPIDriver{ /** * @brief Pointer to the SPIx registers block. */ - SPI_TypeDef *spd_spi; + SPI_TypeDef *spi; /** * @brief Pointer to the receive DMA channel registers block. */ - stm32_dma_channel_t *spd_dmarx; + stm32_dma_channel_t *dmarx; /** * @brief Pointer to the transmit DMA channel registers block. */ - stm32_dma_channel_t *spd_dmatx; + stm32_dma_channel_t *dmatx; /** * @brief DMA priority bit mask. */ - uint32_t spd_dmaccr; + uint32_t dmaccr; }; /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c index e05051a73..2f25f6c56 100644 --- a/os/hal/platforms/STM32/uart_lld.c +++ b/os/hal/platforms/STM32/uart_lld.c @@ -90,13 +90,13 @@ static void set_rx_idle_loop(UARTDriver *uartp) { /* RX DMA channel preparation, if the char callback is defined then the TCIE interrupt is enabled too.*/ - if (uartp->ud_config->uc_rxchar == NULL) + if (uartp->config->rxchar_cb == NULL) ccr = DMA_CCR1_CIRC | DMA_CCR1_TEIE; else ccr = DMA_CCR1_CIRC | DMA_CCR1_TEIE | DMA_CCR1_TCIE; - dmaSetupChannel(uartp->ud_dmap, uartp->ud_dmarx, 1, - &uartp->ud_rxbuf, uartp->ud_dmaccr | ccr); - dmaEnableChannel(uartp->ud_dmap, uartp->ud_dmarx); + dmaSetupChannel(uartp->dmap, uartp->dmarx, 1, + &uartp->rxbuf, uartp->dmaccr | ccr); + dmaEnableChannel(uartp->dmap, uartp->dmarx); } /** @@ -108,15 +108,15 @@ static void set_rx_idle_loop(UARTDriver *uartp) { static void usart_stop(UARTDriver *uartp) { /* Stops RX and TX DMA channels.*/ - dmaDisableChannel(uartp->ud_dmap, uartp->ud_dmarx); - dmaDisableChannel(uartp->ud_dmap, uartp->ud_dmatx); - dmaClearChannel(uartp->ud_dmap, uartp->ud_dmarx); - dmaClearChannel(uartp->ud_dmap, uartp->ud_dmatx); + dmaDisableChannel(uartp->dmap, uartp->dmarx); + dmaDisableChannel(uartp->dmap, uartp->dmatx); + dmaClearChannel(uartp->dmap, uartp->dmarx); + dmaClearChannel(uartp->dmap, uartp->dmatx); /* Stops USART operations.*/ - uartp->ud_usart->CR1 = 0; - uartp->ud_usart->CR2 = 0; - uartp->ud_usart->CR3 = 0; + uartp->usart->CR1 = 0; + uartp->usart->CR2 = 0; + uartp->usart->CR3 = 0; } /** @@ -127,16 +127,16 @@ static void usart_stop(UARTDriver *uartp) { */ static void usart_start(UARTDriver *uartp) { uint16_t cr1; - USART_TypeDef *u = uartp->ud_usart; + USART_TypeDef *u = uartp->usart; /* Defensive programming, starting from a clean state.*/ usart_stop(uartp); /* Baud rate setting.*/ - if (uartp->ud_usart == USART1) - u->BRR = STM32_PCLK2 / uartp->ud_config->uc_speed; + if (uartp->usart == USART1) + u->BRR = STM32_PCLK2 / uartp->config->speed; else - u->BRR = STM32_PCLK1 / uartp->ud_config->uc_speed; + u->BRR = STM32_PCLK1 / uartp->config->speed; /* Resetting eventual pending status flags.*/ (void)u->SR; /* SR reset step 1.*/ @@ -145,14 +145,14 @@ static void usart_start(UARTDriver *uartp) { /* Note that some bits are enforced because required for correct driver operations.*/ - if (uartp->ud_config->uc_txend2 == NULL) + if (uartp->config->txend2_cb == NULL) cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE; else cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE | USART_CR1_TCIE; - u->CR1 = uartp->ud_config->uc_cr1 | cr1; - u->CR2 = uartp->ud_config->uc_cr2 | USART_CR2_LBDIE; - u->CR3 = uartp->ud_config->uc_cr3 | USART_CR3_DMAT | USART_CR3_DMAR | + u->CR1 = uartp->config->cr1 | cr1; + u->CR2 = uartp->config->cr2 | USART_CR2_LBDIE; + u->CR3 = uartp->config->cr3 | USART_CR3_DMAT | USART_CR3_DMAR | USART_CR3_EIE; /* Starting the receiver idle loop.*/ @@ -166,13 +166,13 @@ static void usart_start(UARTDriver *uartp) { */ static void serve_rx_end_irq(UARTDriver *uartp) { - uartp->ud_rxstate = UART_RX_COMPLETE; - if (uartp->ud_config->uc_rxend != NULL) - uartp->ud_config->uc_rxend(uartp); + uartp->rxstate = UART_RX_COMPLETE; + if (uartp->config->rxend_cb != NULL) + uartp->config->rxend_cb(uartp); /* If the callback didn't explicitly change state then the receiver automatically returns to the idle state.*/ - if (uartp->ud_rxstate == UART_RX_COMPLETE) { - uartp->ud_rxstate = UART_RX_IDLE; + if (uartp->rxstate == UART_RX_COMPLETE) { + uartp->rxstate = UART_RX_IDLE; set_rx_idle_loop(uartp); } } @@ -185,13 +185,13 @@ static void serve_rx_end_irq(UARTDriver *uartp) { static void serve_tx_end_irq(UARTDriver *uartp) { /* A callback is generated, if enabled, after a completed transfer.*/ - uartp->ud_txstate = UART_TX_COMPLETE; - if (uartp->ud_config->uc_txend1 != NULL) - uartp->ud_config->uc_txend1(uartp); + uartp->txstate = UART_TX_COMPLETE; + if (uartp->config->txend1_cb != NULL) + uartp->config->txend1_cb(uartp); /* If the callback didn't explicitly change state then the transmitter automatically returns to the idle state.*/ - if (uartp->ud_txstate == UART_TX_COMPLETE) - uartp->ud_txstate = UART_TX_IDLE; + if (uartp->txstate == UART_TX_COMPLETE) + uartp->txstate = UART_TX_IDLE; } /** * @brief USART common service routine. @@ -200,21 +200,21 @@ static void serve_tx_end_irq(UARTDriver *uartp) { */ static void serve_usart_irq(UARTDriver *uartp) { uint16_t sr; - USART_TypeDef *u = uartp->ud_usart; + USART_TypeDef *u = uartp->usart; sr = u->SR; /* SR reset step 1.*/ (void)u->DR; /* SR reset step 2.*/ if (sr & (USART_SR_LBD | USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_PE)) { u->SR = ~USART_SR_LBD; - if (uartp->ud_config->uc_rxerr != NULL) - uartp->ud_config->uc_rxerr(uartp, translate_errors(sr)); + if (uartp->config->rxerr_cb != NULL) + uartp->config->rxerr_cb(uartp, translate_errors(sr)); } if (sr & USART_SR_TC) { u->SR = ~USART_SR_TC; /* End of transmission, a callback is generated.*/ - if (uartp->ud_config->uc_txend2 != NULL) - uartp->ud_config->uc_txend2(uartp); + if (uartp->config->txend2_cb != NULL) + uartp->config->txend2_cb(uartp); } } @@ -237,13 +237,13 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { if ((STM32_DMA1->ISR & DMA_ISR_TEIF5) != 0) { STM32_UART_USART1_DMA_ERROR_HOOK(); } - if (uartp->ud_rxstate == UART_RX_IDLE) { + if (uartp->rxstate == UART_RX_IDLE) { dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_5); /* Fast IRQ path, this is why it is not centralized in serve_rx_end_irq().*/ /* Receiver in idle state, a callback is generated, if enabled, for each received character and then the driver stays in the same state.*/ - if (uartp->ud_config->uc_rxchar != NULL) - uartp->ud_config->uc_rxchar(uartp, uartp->ud_rxbuf); + if (uartp->config->rxchar_cb != NULL) + uartp->config->rxchar_cb(uartp, uartp->rxbuf); } else { /* Receiver in active state, a callback is generated, if enabled, after @@ -305,13 +305,13 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) { if ((STM32_DMA1->ISR & DMA_ISR_TEIF6) != 0) { STM32_UART_USART2_DMA_ERROR_HOOK(); } - if (uartp->ud_rxstate == UART_RX_IDLE) { + if (uartp->rxstate == UART_RX_IDLE) { dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_6); /* Fast IRQ path, this is why it is not centralized in serve_rx_end_irq().*/ /* Receiver in idle state, a callback is generated, if enabled, for each received character and then the driver stays in the same state.*/ - if (uartp->ud_config->uc_rxchar != NULL) - uartp->ud_config->uc_rxchar(uartp, uartp->ud_rxbuf); + if (uartp->config->rxchar_cb != NULL) + uartp->config->rxchar_cb(uartp, uartp->rxbuf); } else { /* Receiver in active state, a callback is generated, if enabled, after @@ -373,13 +373,13 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) { if ((STM32_DMA1->ISR & DMA_ISR_TEIF3) != 0) { STM32_UART_USART1_DMA_ERROR_HOOK(); } - if (uartp->ud_rxstate == UART_RX_IDLE) { + if (uartp->rxstate == UART_RX_IDLE) { dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_3); /* Fast IRQ path, this is why it is not centralized in serve_rx_end_irq().*/ /* Receiver in idle state, a callback is generated, if enabled, for each received character and then the driver stays in the same state.*/ - if (uartp->ud_config->uc_rxchar != NULL) - uartp->ud_config->uc_rxchar(uartp, uartp->ud_rxbuf); + if (uartp->config->rxchar_cb != NULL) + uartp->config->rxchar_cb(uartp, uartp->rxbuf); } else { /* Receiver in active state, a callback is generated, if enabled, after @@ -439,29 +439,29 @@ void uart_lld_init(void) { #if STM32_UART_USE_USART1 uartObjectInit(&UARTD1); - UARTD1.ud_usart = USART1; - UARTD1.ud_dmap = STM32_DMA1; - UARTD1.ud_dmarx = STM32_DMA_CHANNEL_5; - UARTD1.ud_dmatx = STM32_DMA_CHANNEL_4; - UARTD1.ud_dmaccr = 0; + UARTD1.usart = USART1; + UARTD1.dmap = STM32_DMA1; + UARTD1.dmarx = STM32_DMA_CHANNEL_5; + UARTD1.dmatx = STM32_DMA_CHANNEL_4; + UARTD1.dmaccr = 0; #endif #if STM32_UART_USE_USART2 uartObjectInit(&UARTD2); - UARTD2.ud_usart = USART2; - UARTD2.ud_dmap = STM32_DMA1; - UARTD2.ud_dmarx = STM32_DMA_CHANNEL_6; - UARTD2.ud_dmatx = STM32_DMA_CHANNEL_7; - UARTD2.ud_dmaccr = 0; + UARTD2.usart = USART2; + UARTD2.dmap = STM32_DMA1; + UARTD2.dmarx = STM32_DMA_CHANNEL_6; + UARTD2.dmatx = STM32_DMA_CHANNEL_7; + UARTD2.dmaccr = 0; #endif #if STM32_UART_USE_USART3 uartObjectInit(&UARTD3); - UARTD3.ud_usart = USART3; - UARTD3.ud_dmap = STM32_DMA1; - UARTD3.ud_dmarx = STM32_DMA_CHANNEL_3; - UARTD3.ud_dmatx = STM32_DMA_CHANNEL_2; - UARTD3.ud_dmaccr = 0; + UARTD3.usart = USART3; + UARTD3.dmap = STM32_DMA1; + UARTD3.dmarx = STM32_DMA_CHANNEL_3; + UARTD3.dmatx = STM32_DMA_CHANNEL_2; + UARTD3.dmaccr = 0; #endif } @@ -474,7 +474,7 @@ void uart_lld_init(void) { */ void uart_lld_start(UARTDriver *uartp) { - if (uartp->ud_state == UART_STOP) { + if (uartp->state == UART_STOP) { #if STM32_UART_USE_USART1 if (&UARTD1 == uartp) { dmaEnable(DMA1_ID); /* NOTE: Must be enabled before the IRQs.*/ @@ -516,18 +516,18 @@ void uart_lld_start(UARTDriver *uartp) { /* Static DMA setup, the transfer size depends on the USART settings, it is 16 bits if M=1 and PCE=0 else it is 8 bits.*/ - uartp->ud_dmaccr = STM32_UART_USART1_DMA_PRIORITY << 12; - if ((uartp->ud_config->uc_cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M) - uartp->ud_dmaccr |= DMA_CCR1_MSIZE_0 | DMA_CCR1_PSIZE_0; - dmaChannelSetPeripheral(&uartp->ud_dmap->channels[uartp->ud_dmarx], - &uartp->ud_usart->DR); - dmaChannelSetPeripheral(&uartp->ud_dmap->channels[uartp->ud_dmatx], - &uartp->ud_usart->DR); - uartp->ud_rxbuf = 0; + uartp->dmaccr = STM32_UART_USART1_DMA_PRIORITY << 12; + if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M) + uartp->dmaccr |= DMA_CCR1_MSIZE_0 | DMA_CCR1_PSIZE_0; + dmaChannelSetPeripheral(&uartp->dmap->channels[uartp->dmarx], + &uartp->usart->DR); + dmaChannelSetPeripheral(&uartp->dmap->channels[uartp->dmatx], + &uartp->usart->DR); + uartp->rxbuf = 0; } - uartp->ud_rxstate = UART_RX_IDLE; - uartp->ud_txstate = UART_TX_IDLE; + uartp->rxstate = UART_RX_IDLE; + uartp->txstate = UART_TX_IDLE; usart_start(uartp); } @@ -540,7 +540,7 @@ void uart_lld_start(UARTDriver *uartp) { */ void uart_lld_stop(UARTDriver *uartp) { - if (uartp->ud_state == UART_READY) { + if (uartp->state == UART_READY) { usart_stop(uartp); #if STM32_UART_USE_USART1 @@ -592,10 +592,10 @@ void uart_lld_stop(UARTDriver *uartp) { void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) { /* TX DMA channel preparation and start.*/ - dmaSetupChannel(uartp->ud_dmap, uartp->ud_dmatx, n, txbuf, - uartp->ud_dmaccr | DMA_CCR1_DIR | DMA_CCR1_MINC | + dmaSetupChannel(uartp->dmap, uartp->dmatx, n, txbuf, + uartp->dmaccr | DMA_CCR1_DIR | DMA_CCR1_MINC | DMA_CCR1_TEIE | DMA_CCR1_TCIE); - dmaEnableChannel(uartp->ud_dmap, uartp->ud_dmatx); + dmaEnableChannel(uartp->dmap, uartp->dmatx); } /** @@ -611,9 +611,9 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) { */ size_t uart_lld_stop_send(UARTDriver *uartp) { - dmaDisableChannel(uartp->ud_dmap, uartp->ud_dmatx); - dmaClearChannel(uartp->ud_dmap, uartp->ud_dmatx); - return (size_t)uartp->ud_dmap->channels[uartp->ud_dmatx].CNDTR; + dmaDisableChannel(uartp->dmap, uartp->dmatx); + dmaClearChannel(uartp->dmap, uartp->dmatx); + return (size_t)uartp->dmap->channels[uartp->dmatx].CNDTR; } /** @@ -630,14 +630,14 @@ size_t uart_lld_stop_send(UARTDriver *uartp) { void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) { /* Stopping previous activity (idle state).*/ - dmaDisableChannel(uartp->ud_dmap, uartp->ud_dmarx); - dmaClearChannel(uartp->ud_dmap, uartp->ud_dmarx); + dmaDisableChannel(uartp->dmap, uartp->dmarx); + dmaClearChannel(uartp->dmap, uartp->dmarx); /* RX DMA channel preparation and start.*/ - dmaSetupChannel(uartp->ud_dmap, uartp->ud_dmarx, n, rxbuf, - uartp->ud_dmaccr | DMA_CCR1_MINC | + dmaSetupChannel(uartp->dmap, uartp->dmarx, n, rxbuf, + uartp->dmaccr | DMA_CCR1_MINC | DMA_CCR1_TEIE | DMA_CCR1_TCIE); - dmaEnableChannel(uartp->ud_dmap, uartp->ud_dmarx); + dmaEnableChannel(uartp->dmap, uartp->dmarx); } /** @@ -654,9 +654,9 @@ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) { size_t uart_lld_stop_receive(UARTDriver *uartp) { size_t n; - dmaDisableChannel(uartp->ud_dmap, uartp->ud_dmarx); - dmaClearChannel(uartp->ud_dmap, uartp->ud_dmarx); - n = (size_t)uartp->ud_dmap->channels[uartp->ud_dmarx].CNDTR; + dmaDisableChannel(uartp->dmap, uartp->dmarx); + dmaClearChannel(uartp->dmap, uartp->dmarx); + n = (size_t)uartp->dmap->channels[uartp->dmarx].CNDTR; set_rx_idle_loop(uartp); return n; } diff --git a/os/hal/platforms/STM32/uart_lld.h b/os/hal/platforms/STM32/uart_lld.h index f09fe7cd4..8394d8421 100644 --- a/os/hal/platforms/STM32/uart_lld.h +++ b/os/hal/platforms/STM32/uart_lld.h @@ -117,8 +117,8 @@ /** * @brief USART1 DMA error hook. - * @note The default action for DMA errors is a system halt because DMA error - * can only happen because programming errors. + * @note The default action for DMA errors is a system halt because DMA + * error can only happen because programming errors. */ #if !defined(STM32_UART_USART1_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() @@ -126,8 +126,8 @@ /** * @brief USART2 DMA error hook. - * @note The default action for DMA errors is a system halt because DMA error - * can only happen because programming errors. + * @note The default action for DMA errors is a system halt because DMA + * error can only happen because programming errors. */ #if !defined(STM32_UART_USART2_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() @@ -135,8 +135,8 @@ /** * @brief USART3 DMA error hook. - * @note The default action for DMA errors is a system halt because DMA error - * can only happen because programming errors. + * @note The default action for DMA errors is a system halt because DMA + * error can only happen because programming errors. */ #if !defined(STM32_UART_USART3_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() @@ -208,40 +208,40 @@ typedef struct { /** * @brief End of transmission buffer callback. */ - uartcb_t uc_txend1; + uartcb_t txend1_cb; /** * @brief Physical end of transmission callback. */ - uartcb_t uc_txend2; + uartcb_t txend2_cb; /** * @brief Receive buffer filled callback. */ - uartcb_t uc_rxend; + uartcb_t rxend_cb; /** * @brief Character received while out if the @p UART_RECEIVE state. */ - uartccb_t uc_rxchar; + uartccb_t rxchar_cb; /** * @brief Receive error callback. */ - uartecb_t uc_rxerr; + uartecb_t rxerr_cb; /* End of the mandatory fields.*/ /** * @brief Bit rate. */ - uint32_t uc_speed; + uint32_t speed; /** * @brief Initialization value for the CR1 register. */ - uint16_t uc_cr1; + uint16_t cr1; /** * @brief Initialization value for the CR2 register. */ - uint16_t uc_cr2; + uint16_t cr2; /** * @brief Initialization value for the CR3 register. */ - uint16_t uc_cr3; + uint16_t cr3; } UARTConfig; /** @@ -251,19 +251,19 @@ struct UARTDriver { /** * @brief Driver state. */ - uartstate_t ud_state; + uartstate_t state; /** * @brief Transmitter state. */ - uarttxstate_t ud_txstate; + uarttxstate_t txstate; /** * @brief Receiver state. */ - uartrxstate_t ud_rxstate; + uartrxstate_t rxstate; /** * @brief Current configuration data. */ - const UARTConfig *ud_config; + const UARTConfig *config; #if defined(UART_DRIVER_EXT_FIELDS) UART_DRIVER_EXT_FIELDS #endif @@ -271,27 +271,27 @@ struct UARTDriver { /** * @brief Pointer to the USART registers block. */ - USART_TypeDef *ud_usart; + USART_TypeDef *usart; /** * @brief Pointer to the DMA registers block. */ - stm32_dma_t *ud_dmap; + stm32_dma_t *dmap; /** * @brief DMA priority bit mask. */ - uint32_t ud_dmaccr; + uint32_t dmaccr; /** * @brief Receive DMA channel. */ - uint8_t ud_dmarx; + uint8_t dmarx; /** * @brief Transmit DMA channel. */ - uint8_t ud_dmatx; + uint8_t dmatx; /** * @brief Default receive buffer while into @p UART_RX_IDLE state. */ - volatile uint16_t ud_rxbuf; + volatile uint16_t rxbuf; }; /*===========================================================================*/ diff --git a/os/hal/platforms/STM8S/spi_lld.c b/os/hal/platforms/STM8S/spi_lld.c index c950f0bd4..436a94f2b 100644 --- a/os/hal/platforms/STM8S/spi_lld.c +++ b/os/hal/platforms/STM8S/spi_lld.c @@ -70,12 +70,12 @@ CH_IRQ_HANDLER(10) { handle the case where a frame arrives immediately after reading the DR register.*/ while ((SPI->SR & SPI_SR_RXNE) != 0) { - if (SPID1.spd_rxptr != NULL) - *SPID1.spd_rxptr++ = SPI->DR; + if (SPID1.rxptr != NULL) + *SPID1.rxptr++ = SPI->DR; else (void)SPI->DR; - if (--SPID1.spd_rxcnt == 0) { - chDbgAssert(SPID1.spd_txcnt == 0, + if (--SPID1.rxcnt == 0) { + chDbgAssert(SPID1.txcnt == 0, "IRQ10, #1", "counter out of synch"); /* Stops all the IRQ sources.*/ SPI->ICR = 0; @@ -89,8 +89,8 @@ CH_IRQ_HANDLER(10) { } /* Loading the DR register.*/ if ((SPI->SR & SPI_SR_TXE) != 0) { - if (SPID1.spd_txptr != NULL) - SPI->DR = *SPID1.spd_txptr++; + if (SPID1.txptr != NULL) + SPI->DR = *SPID1.txptr++; else SPI->DR = 0xFF; } @@ -130,7 +130,7 @@ void spi_lld_start(SPIDriver *spip) { /* Configuration.*/ SPI->CR2 = 0; - SPI->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR | SPI_CR1_SPE; + SPI->CR1 = spip->config->cr1 | SPI_CR1_MSTR | SPI_CR1_SPE; } /** @@ -162,7 +162,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - palClearPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palClearPad(spip->config->ssport, spip->config->sspad); } /** @@ -175,7 +175,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - palSetPad(spip->spd_config->spc_ssport, spip->spd_config->spc_sspad); + palSetPad(spip->config->ssport, spip->config->sspad); } /** @@ -191,9 +191,9 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { - spip->spd_rxptr = NULL; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE; } @@ -215,9 +215,9 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE; } @@ -236,9 +236,9 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - spip->spd_rxptr = NULL; - spip->spd_txptr = txbuf; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = NULL; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE; } @@ -257,9 +257,9 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - spip->spd_rxptr = rxbuf; - spip->spd_txptr = NULL; - spip->spd_rxcnt = spip->spd_txcnt = n; + spip->rxptr = rxbuf; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; SPI->ICR = SPI_ICR_TXEI | SPI_ICR_RXEI | SPI_ICR_ERRIE; } diff --git a/os/hal/platforms/STM8S/spi_lld.h b/os/hal/platforms/STM8S/spi_lld.h index 1f665d01a..b81241fd0 100644 --- a/os/hal/platforms/STM8S/spi_lld.h +++ b/os/hal/platforms/STM8S/spi_lld.h @@ -87,20 +87,20 @@ typedef struct { /** * @brief Operation complete callback or @p NULL. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ /** * @brief The chip select line port. */ - ioportid_t spc_ssport; + ioportid_t ssport; /** * @brief The chip select line pad number. */ - uint16_t spc_sspad; + uint16_t sspad; /** * @brief SPI initialization data. */ - uint8_t spc_cr1; + uint8_t cr1; } SPIConfig; /** @@ -110,25 +110,25 @@ struct SPIDriver { /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) @@ -138,19 +138,19 @@ struct SPIDriver { /** * @brief Number of bytes yet to be received. */ - uint16_t spd_rxcnt; + uint16_t rxcnt; /** * @brief Receive pointer or @p NULL. */ - uint8_t *spd_rxptr; + uint8_t *rxptr; /** * @brief Number of bytes yet to be transmitted. */ - uint16_t spd_txcnt; + uint16_t txcnt; /** * @brief Transmit pointer or @p NULL. */ - const uint8_t *spd_txptr; + const uint8_t *txptr; }; /*===========================================================================*/ diff --git a/os/hal/src/adc.c b/os/hal/src/adc.c index 25cbfe750..956c7837f 100644 --- a/os/hal/src/adc.c +++ b/os/hal/src/adc.c @@ -67,19 +67,19 @@ void adcInit(void) { */ void adcObjectInit(ADCDriver *adcp) { - adcp->ad_state = ADC_STOP; - adcp->ad_config = NULL; - adcp->ad_samples = NULL; - adcp->ad_depth = 0; - adcp->ad_grpp = NULL; + adcp->state = ADC_STOP; + adcp->config = NULL; + adcp->samples = NULL; + adcp->depth = 0; + adcp->grpp = NULL; #if ADC_USE_WAIT - adcp->ad_thread = NULL; + adcp->thread = NULL; #endif /* ADC_USE_WAIT */ #if ADC_USE_MUTUAL_EXCLUSION #if CH_USE_MUTEXES - chMtxInit(&adcp->ad_mutex); + chMtxInit(&adcp->mutex); #else - chSemInit(&adcp->ad_semaphore, 1); + chSemInit(&adcp->semaphore, 1); #endif #endif /* ADC_USE_MUTUAL_EXCLUSION */ #if defined(ADC_DRIVER_EXT_INIT_HOOK) @@ -101,11 +101,11 @@ void adcStart(ADCDriver *adcp, const ADCConfig *config) { chDbgCheck(adcp != NULL, "adcStart"); chSysLock(); - chDbgAssert((adcp->ad_state == ADC_STOP) || (adcp->ad_state == ADC_READY), + chDbgAssert((adcp->state == ADC_STOP) || (adcp->state == ADC_READY), "adcStart(), #1", "invalid state"); - adcp->ad_config = config; + adcp->config = config; adc_lld_start(adcp); - adcp->ad_state = ADC_READY; + adcp->state = ADC_READY; chSysUnlock(); } @@ -121,10 +121,10 @@ void adcStop(ADCDriver *adcp) { chDbgCheck(adcp != NULL, "adcStop"); chSysLock(); - chDbgAssert((adcp->ad_state == ADC_STOP) || (adcp->ad_state == ADC_READY), + chDbgAssert((adcp->state == ADC_STOP) || (adcp->state == ADC_READY), "adcStop(), #1", "invalid state"); adc_lld_stop(adcp); - adcp->ad_state = ADC_STOP; + adcp->state = ADC_STOP; chSysUnlock(); } @@ -179,13 +179,13 @@ void adcStartConversionI(ADCDriver *adcp, ((depth == 1) || ((depth & 1) == 0)), "adcStartConversionI"); - chDbgAssert((adcp->ad_state == ADC_READY) || - (adcp->ad_state == ADC_COMPLETE), + chDbgAssert((adcp->state == ADC_READY) || + (adcp->state == ADC_COMPLETE), "adcStartConversionI(), #1", "not ready"); - adcp->ad_samples = samples; - adcp->ad_depth = depth; - adcp->ad_grpp = grpp; - adcp->ad_state = ADC_ACTIVE; + adcp->samples = samples; + adcp->depth = depth; + adcp->grpp = grpp; + adcp->state = ADC_ACTIVE; adc_lld_start_conversion(adcp); } @@ -204,13 +204,13 @@ void adcStopConversion(ADCDriver *adcp) { chDbgCheck(adcp != NULL, "adcStopConversion"); chSysLock(); - chDbgAssert((adcp->ad_state == ADC_READY) || - (adcp->ad_state == ADC_ACTIVE), + chDbgAssert((adcp->state == ADC_READY) || + (adcp->state == ADC_ACTIVE), "adcStopConversion(), #1", "invalid state"); - if (adcp->ad_state != ADC_READY) { + if (adcp->state != ADC_READY) { adc_lld_stop_conversion(adcp); - adcp->ad_grpp = NULL; - adcp->ad_state = ADC_READY; + adcp->grpp = NULL; + adcp->state = ADC_READY; _adc_reset_s(adcp); } chSysUnlock(); @@ -230,14 +230,14 @@ void adcStopConversionI(ADCDriver *adcp) { chDbgCheck(adcp != NULL, "adcStopConversionI"); - chDbgAssert((adcp->ad_state == ADC_READY) || - (adcp->ad_state == ADC_ACTIVE) || - (adcp->ad_state == ADC_COMPLETE), + chDbgAssert((adcp->state == ADC_READY) || + (adcp->state == ADC_ACTIVE) || + (adcp->state == ADC_COMPLETE), "adcStopConversionI(), #1", "invalid state"); - if (adcp->ad_state != ADC_READY) { + if (adcp->state != ADC_READY) { adc_lld_stop_conversion(adcp); - adcp->ad_grpp = NULL; - adcp->ad_state = ADC_READY; + adcp->grpp = NULL; + adcp->state = ADC_READY; _adc_reset_i(adcp); } } @@ -271,9 +271,9 @@ msg_t adcConvert(ADCDriver *adcp, msg_t msg; chSysLock(); - chDbgAssert(grpp->acg_endcb == NULL, "adcConvert(), #1", "has callback"); + chDbgAssert(grpp->end_cb == NULL, "adcConvert(), #1", "has callback"); adcStartConversionI(adcp, grpp, samples, depth); - (adcp)->ad_thread = chThdSelf(); + (adcp)->thread = chThdSelf(); chSchGoSleepS(THD_STATE_SUSPENDED); msg = chThdSelf()->p_u.rdymsg; chSysUnlock(); @@ -286,8 +286,8 @@ msg_t adcConvert(ADCDriver *adcp, * @brief Gains exclusive access to the ADC peripheral. * @details This function tries to gain ownership to the ADC bus, if the bus * is already being used then the invoking thread is queued. - * @pre In order to use this function the option @p ADC_USE_MUTUAL_EXCLUSION - * must be enabled. + * @pre In order to use this function the option + * @p ADC_USE_MUTUAL_EXCLUSION must be enabled. * * @param[in] adcp pointer to the @p ADCDriver object * @@ -298,16 +298,16 @@ void adcAcquireBus(ADCDriver *adcp) { chDbgCheck(adcp != NULL, "adcAcquireBus"); #if CH_USE_MUTEXES - chMtxLock(&adcp->ad_mutex); + chMtxLock(&adcp->mutex); #elif CH_USE_SEMAPHORES - chSemWait(&adcp->ad_semaphore); + chSemWait(&adcp->semaphore); #endif } /** * @brief Releases exclusive access to the ADC peripheral. - * @pre In order to use this function the option @p ADC_USE_MUTUAL_EXCLUSION - * must be enabled. + * @pre In order to use this function the option + * @p ADC_USE_MUTUAL_EXCLUSION must be enabled. * * @param[in] adcp pointer to the @p ADCDriver object * @@ -321,7 +321,7 @@ void adcReleaseBus(ADCDriver *adcp) { (void)adcp; chMtxUnlock(); #elif CH_USE_SEMAPHORES - chSemSignal(&adcp->ad_semaphore); + chSemSignal(&adcp->semaphore); #endif } #endif /* ADC_USE_MUTUAL_EXCLUSION */ diff --git a/os/hal/src/can.c b/os/hal/src/can.c index d63cbfd8a..c240c9e44 100644 --- a/os/hal/src/can.c +++ b/os/hal/src/can.c @@ -67,17 +67,17 @@ void canInit(void) { */ void canObjectInit(CANDriver *canp) { - canp->cd_state = CAN_STOP; - canp->cd_config = NULL; - chSemInit(&canp->cd_txsem, 0); - chSemInit(&canp->cd_rxsem, 0); - chEvtInit(&canp->cd_rxfull_event); - chEvtInit(&canp->cd_txempty_event); - chEvtInit(&canp->cd_error_event); - canp->cd_status = 0; + canp->state = CAN_STOP; + canp->config = NULL; + chSemInit(&canp->txsem, 0); + chSemInit(&canp->rxsem, 0); + chEvtInit(&canp->rxfull_event); + chEvtInit(&canp->txempty_event); + chEvtInit(&canp->error_event); + canp->status = 0; #if CAN_USE_SLEEP_MODE - chEvtInit(&canp->cd_sleep_event); - chEvtInit(&canp->cd_wakeup_event); + chEvtInit(&canp->sleep_event); + chEvtInit(&canp->wakeup_event); #endif /* CAN_USE_SLEEP_MODE */ } @@ -98,16 +98,16 @@ void canStart(CANDriver *canp, const CANConfig *config) { chDbgCheck(canp != NULL, "canStart"); chSysLock(); - chDbgAssert((canp->cd_state == CAN_STOP) || - (canp->cd_state == CAN_STARTING) || - (canp->cd_state == CAN_READY), + chDbgAssert((canp->state == CAN_STOP) || + (canp->state == CAN_STARTING) || + (canp->state == CAN_READY), "canStart(), #1", "invalid state"); - while (canp->cd_state == CAN_STARTING) + while (canp->state == CAN_STARTING) chThdSleepS(1); - if (canp->cd_state == CAN_STOP) { - canp->cd_config = config; + if (canp->state == CAN_STOP) { + canp->config = config; can_lld_start(canp); - canp->cd_state = CAN_READY; + canp->state = CAN_READY; } chSysUnlock(); } @@ -124,14 +124,14 @@ void canStop(CANDriver *canp) { chDbgCheck(canp != NULL, "canStop"); chSysLock(); - chDbgAssert((canp->cd_state == CAN_STOP) || (canp->cd_state == CAN_READY), + chDbgAssert((canp->state == CAN_STOP) || (canp->state == CAN_READY), "canStop(), #1", "invalid state"); can_lld_stop(canp); - chSemResetI(&canp->cd_rxsem, 0); - chSemResetI(&canp->cd_txsem, 0); + chSemResetI(&canp->rxsem, 0); + chSemResetI(&canp->txsem, 0); chSchRescheduleS(); - canp->cd_state = CAN_STOP; - canp->cd_status = 0; + canp->state = CAN_STOP; + canp->status = 0; chSysUnlock(); } @@ -142,7 +142,7 @@ void canStop(CANDriver *canp) { * @note Trying to transmit while in sleep mode simply enqueues the thread. * * @param[in] canp pointer to the @p CANDriver object - * @param[in] ctfp pointer to the CAN frame to be transmitted + * @param[in] ctfp pointer to the CAN frame to be transmitted * @param[in] timeout the number of ticks before the operation timeouts, * the following special values are allowed: * - @a TIME_IMMEDIATE immediate timeout. @@ -160,10 +160,10 @@ msg_t canTransmit(CANDriver *canp, const CANTxFrame *ctfp, systime_t timeout) { chDbgCheck((canp != NULL) && (ctfp != NULL), "canTransmit"); chSysLock(); - chDbgAssert((canp->cd_state == CAN_READY) || (canp->cd_state == CAN_SLEEP), + chDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP), "canTransmit(), #1", "invalid state"); - while ((canp->cd_state == CAN_SLEEP) || !can_lld_can_transmit(canp)) { - msg_t msg = chSemWaitTimeoutS(&canp->cd_txsem, timeout); + while ((canp->state == CAN_SLEEP) || !can_lld_can_transmit(canp)) { + msg_t msg = chSemWaitTimeoutS(&canp->txsem, timeout); if (msg != RDY_OK) { chSysUnlock(); return msg; @@ -200,10 +200,10 @@ msg_t canReceive(CANDriver *canp, CANRxFrame *crfp, systime_t timeout) { chDbgCheck((canp != NULL) && (crfp != NULL), "canReceive"); chSysLock(); - chDbgAssert((canp->cd_state == CAN_READY) || (canp->cd_state == CAN_SLEEP), + chDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP), "canReceive(), #1", "invalid state"); - while ((canp->cd_state == CAN_SLEEP) || !can_lld_can_receive(canp)) { - msg_t msg = chSemWaitTimeoutS(&canp->cd_rxsem, timeout); + while ((canp->state == CAN_SLEEP) || !can_lld_can_receive(canp)) { + msg_t msg = chSemWaitTimeoutS(&canp->rxsem, timeout); if (msg != RDY_OK) { chSysUnlock(); return msg; @@ -226,8 +226,8 @@ canstatus_t canGetAndClearFlags(CANDriver *canp) { canstatus_t status; chSysLock(); - status = canp->cd_status; - canp->cd_status = 0; + status = canp->status; + canp->status = 0; chSysUnlock(); return status; } @@ -236,7 +236,7 @@ canstatus_t canGetAndClearFlags(CANDriver *canp) { /** * @brief Enters the sleep mode. * @details This function puts the CAN driver in sleep mode and broadcasts - * the @p cd_sleep_event event source. + * the @p sleep_event event source. * @pre In order to use this function the option @p CAN_USE_SLEEP_MODE must * be enabled and the @p CAN_SUPPORTS_SLEEP mode must be supported * by the low level driver. @@ -250,12 +250,12 @@ void canSleep(CANDriver *canp) { chDbgCheck(canp != NULL, "canSleep"); chSysLock(); - chDbgAssert((canp->cd_state == CAN_READY) || (canp->cd_state == CAN_SLEEP), + chDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP), "canSleep(), #1", "invalid state"); - if (canp->cd_state == CAN_READY) { + if (canp->state == CAN_READY) { can_lld_sleep(canp); - canp->cd_state = CAN_SLEEP; - chEvtBroadcastI(&canp->cd_sleep_event); + canp->state = CAN_SLEEP; + chEvtBroadcastI(&canp->sleep_event); chSchRescheduleS(); } chSysUnlock(); @@ -273,12 +273,12 @@ void canWakeup(CANDriver *canp) { chDbgCheck(canp != NULL, "canWakeup"); chSysLock(); - chDbgAssert((canp->cd_state == CAN_READY) || (canp->cd_state == CAN_SLEEP), + chDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP), "canWakeup(), #1", "invalid state"); - if (canp->cd_state == CAN_SLEEP) { + if (canp->state == CAN_SLEEP) { can_lld_wakeup(canp); - canp->cd_state = CAN_READY; - chEvtBroadcastI(&canp->cd_wakeup_event); + canp->state = CAN_READY; + chEvtBroadcastI(&canp->wakeup_event); chSchRescheduleS(); } chSysUnlock(); diff --git a/os/hal/src/mac.c b/os/hal/src/mac.c index 9d033fe33..0cf74a5c1 100644 --- a/os/hal/src/mac.c +++ b/os/hal/src/mac.c @@ -71,10 +71,10 @@ void macInit(void) { */ void macObjectInit(MACDriver *macp) { - chSemInit(&macp->md_tdsem, 0); - chSemInit(&macp->md_rdsem, 0); + chSemInit(&macp->tdsem, 0); + chSemInit(&macp->rdsem, 0); #if CH_USE_EVENTS - chEvtInit(&macp->md_rdevent); + chEvtInit(&macp->rdevent); #endif } @@ -123,7 +123,7 @@ msg_t macWaitTransmitDescriptor(MACDriver *macp, (time > 0)) { chSysLock(); systime_t now = chTimeNow(); - if ((msg = chSemWaitTimeoutS(&macp->md_tdsem, time)) == RDY_TIMEOUT) { + if ((msg = chSemWaitTimeoutS(&macp->tdsem, time)) == RDY_TIMEOUT) { chSysUnlock(); break; } @@ -175,7 +175,7 @@ msg_t macWaitReceiveDescriptor(MACDriver *macp, (time > 0)) { chSysLock(); systime_t now = chTimeNow(); - if ((msg = chSemWaitTimeoutS(&macp->md_rdsem, time)) == RDY_TIMEOUT) { + if ((msg = chSemWaitTimeoutS(&macp->rdsem, time)) == RDY_TIMEOUT) { chSysUnlock(); break; } diff --git a/os/hal/src/mmc_spi.c b/os/hal/src/mmc_spi.c index 1b2d930c5..df429c8d3 100644 --- a/os/hal/src/mmc_spi.c +++ b/os/hal/src/mmc_spi.c @@ -18,7 +18,7 @@ */ /** - * @file mmc_spi.c + * @file spi.c * @brief MMC over SPI driver code. * * @addtogroup MMC_SPI @@ -52,24 +52,24 @@ static void tmrfunc(void *p) { MMCDriver *mmcp = p; - if (mmcp->mmc_cnt > 0) { - if (mmcp->mmc_is_inserted()) { - if (--mmcp->mmc_cnt == 0) { - mmcp->mmc_state = MMC_INSERTED; - chEvtBroadcastI(&mmcp->mmc_inserted_event); + if (mmcp->cnt > 0) { + if (mmcp->is_inserted()) { + if (--mmcp->cnt == 0) { + mmcp->state = MMC_INSERTED; + chEvtBroadcastI(&mmcp->inserted_event); } } else - mmcp->mmc_cnt = MMC_POLLING_INTERVAL; + mmcp->cnt = MMC_POLLING_INTERVAL; } else { - if (!mmcp->mmc_is_inserted()) { - mmcp->mmc_state = MMC_WAIT; - mmcp->mmc_cnt = MMC_POLLING_INTERVAL; - chEvtBroadcastI(&mmcp->mmc_removed_event); + if (!mmcp->is_inserted()) { + mmcp->state = MMC_WAIT; + mmcp->cnt = MMC_POLLING_INTERVAL; + chEvtBroadcastI(&mmcp->removed_event); } } - chVTSetI(&mmcp->mmc_vt, MS2ST(MMC_POLLING_DELAY), tmrfunc, mmcp); + chVTSetI(&mmcp->vt, MS2ST(MMC_POLLING_DELAY), tmrfunc, mmcp); } /** @@ -84,13 +84,13 @@ static void wait(MMCDriver *mmcp) { uint8_t buf[4]; for (i = 0; i < 16; i++) { - spiReceive(mmcp->mmc_spip, 1, buf); + spiReceive(mmcp->spip, 1, buf); if (buf[0] == 0xFF) break; } /* Looks like it is a long wait.*/ while (TRUE) { - spiReceive(mmcp->mmc_spip, 1, buf); + spiReceive(mmcp->spip, 1, buf); if (buf[0] == 0xFF) break; #ifdef MMC_NICE_WAITING @@ -121,7 +121,7 @@ static void send_hdr(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) { buf[3] = arg >> 8; buf[4] = arg; buf[5] = 0x95; /* Valid for CMD0 ignored by other commands. */ - spiSend(mmcp->mmc_spip, 6, buf); + spiSend(mmcp->spip, 6, buf); } /** @@ -138,7 +138,7 @@ static uint8_t recvr1(MMCDriver *mmcp) { uint8_t r1[1]; for (i = 0; i < 9; i++) { - spiReceive(mmcp->mmc_spip, 1, r1); + spiReceive(mmcp->spip, 1, r1); if (r1[0] != 0xFF) return r1[0]; } @@ -159,10 +159,10 @@ static uint8_t recvr1(MMCDriver *mmcp) { static uint8_t send_command(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) { uint8_t r1; - spiSelect(mmcp->mmc_spip); + spiSelect(mmcp->spip); send_hdr(mmcp, cmd, arg); r1 = recvr1(mmcp); - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); return r1; } @@ -176,16 +176,16 @@ static uint8_t send_command(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) { static void sync(MMCDriver *mmcp) { uint8_t buf[1]; - spiSelect(mmcp->mmc_spip); + spiSelect(mmcp->spip); while (TRUE) { - spiReceive(mmcp->mmc_spip, 1, buf); + spiReceive(mmcp->spip, 1, buf); if (buf[0] == 0xFF) break; #ifdef MMC_NICE_WAITING chThdSleep(1); /* Trying to be nice with the other threads.*/ #endif } - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); } /*===========================================================================*/ @@ -221,15 +221,15 @@ void mmcObjectInit(MMCDriver *mmcp, SPIDriver *spip, const SPIConfig *lscfg, const SPIConfig *hscfg, mmcquery_t is_protected, mmcquery_t is_inserted) { - mmcp->mmc_state = MMC_STOP; - mmcp->mmc_config = NULL; - mmcp->mmc_spip = spip; - mmcp->mmc_lscfg = lscfg; - mmcp->mmc_hscfg = hscfg; - mmcp->mmc_is_protected = is_protected; - mmcp->mmc_is_inserted = is_inserted; - chEvtInit(&mmcp->mmc_inserted_event); - chEvtInit(&mmcp->mmc_removed_event); + mmcp->state = MMC_STOP; + mmcp->config = NULL; + mmcp->spip = spip; + mmcp->lscfg = lscfg; + mmcp->hscfg = hscfg; + mmcp->is_protected = is_protected; + mmcp->is_inserted = is_inserted; + chEvtInit(&mmcp->inserted_event); + chEvtInit(&mmcp->removed_event); } /** @@ -245,11 +245,11 @@ void mmcStart(MMCDriver *mmcp, const MMCConfig *config) { chDbgCheck((mmcp != NULL) && (config == NULL), "mmcStart"); chSysLock(); - chDbgAssert(mmcp->mmc_state == MMC_STOP, "mmcStart(), #1", "invalid state"); - mmcp->mmc_config = config; - mmcp->mmc_state = MMC_WAIT; - mmcp->mmc_cnt = MMC_POLLING_INTERVAL; - chVTSetI(&mmcp->mmc_vt, MS2ST(MMC_POLLING_DELAY), tmrfunc, mmcp); + chDbgAssert(mmcp->state == MMC_STOP, "mmcStart(), #1", "invalid state"); + mmcp->config = config; + mmcp->state = MMC_WAIT; + mmcp->cnt = MMC_POLLING_INTERVAL; + chVTSetI(&mmcp->vt, MS2ST(MMC_POLLING_DELAY), tmrfunc, mmcp); chSysUnlock(); } @@ -265,17 +265,16 @@ void mmcStop(MMCDriver *mmcp) { chDbgCheck(mmcp != NULL, "mmcStop"); chSysLock(); - chDbgAssert((mmcp->mmc_state != MMC_UNINIT) && - (mmcp->mmc_state != MMC_READING) && - (mmcp->mmc_state != MMC_WRITING), - "mmcStop(), #1", - "invalid state"); - if (mmcp->mmc_state != MMC_STOP) { - mmcp->mmc_state = MMC_STOP; - chVTResetI(&mmcp->mmc_vt); + chDbgAssert((mmcp->state != MMC_UNINIT) && + (mmcp->state != MMC_READING) && + (mmcp->state != MMC_WRITING), + "mmcStop(), #1", "invalid state"); + if (mmcp->state != MMC_STOP) { + mmcp->state = MMC_STOP; + chVTResetI(&mmcp->vt); } chSysUnlock(); - spiStop(mmcp->mmc_spip); + spiStop(mmcp->spip); } /** @@ -300,15 +299,13 @@ bool_t mmcConnect(MMCDriver *mmcp) { chDbgCheck(mmcp != NULL, "mmcConnect"); - chDbgAssert((mmcp->mmc_state != MMC_UNINIT) && - (mmcp->mmc_state != MMC_STOP), - "mmcConnect(), #1", - "invalid state"); + chDbgAssert((mmcp->state != MMC_UNINIT) && (mmcp->state != MMC_STOP), + "mmcConnect(), #1", "invalid state"); - if (mmcp->mmc_state == MMC_INSERTED) { + if (mmcp->state == MMC_INSERTED) { /* Slow clock mode and 128 clock pulses.*/ - spiStart(mmcp->mmc_spip, mmcp->mmc_lscfg); - spiIgnore(mmcp->mmc_spip, 16); + spiStart(mmcp->spip, mmcp->lscfg); + spiIgnore(mmcp->spip, 16); /* SPI mode selection.*/ i = 0; @@ -334,7 +331,7 @@ bool_t mmcConnect(MMCDriver *mmcp) { } /* Initialization complete, full speed. */ - spiStart(mmcp->mmc_spip, mmcp->mmc_hscfg); + spiStart(mmcp->spip, mmcp->hscfg); /* Setting block size.*/ if (send_command(mmcp, MMC_CMDSETBLOCKLEN, MMC_SECTOR_SIZE) != 0x00) @@ -342,8 +339,8 @@ bool_t mmcConnect(MMCDriver *mmcp) { /* Transition to MMC_READY state (if not extracted).*/ chSysLock(); - if (mmcp->mmc_state == MMC_INSERTED) { - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_INSERTED) { + mmcp->state = MMC_READY; result = FALSE; } else @@ -351,7 +348,7 @@ bool_t mmcConnect(MMCDriver *mmcp) { chSysUnlock(); return result; } - if (mmcp->mmc_state == MMC_READY) + if (mmcp->state == MMC_READY) return FALSE; /* Any other state is invalid.*/ return TRUE; @@ -373,24 +370,22 @@ bool_t mmcDisconnect(MMCDriver *mmcp) { chDbgCheck(mmcp != NULL, "mmcDisconnect"); - chDbgAssert((mmcp->mmc_state != MMC_UNINIT) && - (mmcp->mmc_state != MMC_STOP), - "mmcDisconnect(), #1", - "invalid state"); - switch (mmcp->mmc_state) { + chDbgAssert((mmcp->state != MMC_UNINIT) && (mmcp->state != MMC_STOP), + "mmcDisconnect(), #1", "invalid state"); + switch (mmcp->state) { case MMC_READY: /* Wait for the pending write operations to complete.*/ sync(mmcp); chSysLock(); - if (mmcp->mmc_state == MMC_READY) - mmcp->mmc_state = MMC_INSERTED; + if (mmcp->state == MMC_READY) + mmcp->state = MMC_INSERTED; chSysUnlock(); case MMC_INSERTED: status = FALSE; default: status = TRUE; } - spiStop(mmcp->mmc_spip); + spiStop(mmcp->spip); return status; } @@ -410,21 +405,21 @@ bool_t mmcStartSequentialRead(MMCDriver *mmcp, uint32_t startblk) { chDbgCheck(mmcp != NULL, "mmcStartSequentialRead"); chSysLock(); - if (mmcp->mmc_state != MMC_READY) { + if (mmcp->state != MMC_READY) { chSysUnlock(); return TRUE; } - mmcp->mmc_state = MMC_READING; + mmcp->state = MMC_READING; chSysUnlock(); - spiStart(mmcp->mmc_spip, mmcp->mmc_hscfg); - spiSelect(mmcp->mmc_spip); + spiStart(mmcp->spip, mmcp->hscfg); + spiSelect(mmcp->spip); send_hdr(mmcp, MMC_CMDREADMULTIPLE, startblk * MMC_SECTOR_SIZE); if (recvr1(mmcp) != 0x00) { - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); chSysLock(); - if (mmcp->mmc_state == MMC_READING) - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_READING) + mmcp->state = MMC_READY; chSysUnlock(); return TRUE; } @@ -448,26 +443,26 @@ bool_t mmcSequentialRead(MMCDriver *mmcp, uint8_t *buffer) { chDbgCheck((mmcp != NULL) && (buffer != NULL), "mmcSequentialRead"); chSysLock(); - if (mmcp->mmc_state != MMC_READING) { + if (mmcp->state != MMC_READING) { chSysUnlock(); return TRUE; } chSysUnlock(); for (i = 0; i < MMC_WAIT_DATA; i++) { - spiReceive(mmcp->mmc_spip, 1, buffer); + spiReceive(mmcp->spip, 1, buffer); if (buffer[0] == 0xFE) { - spiReceive(mmcp->mmc_spip, MMC_SECTOR_SIZE, buffer); + spiReceive(mmcp->spip, MMC_SECTOR_SIZE, buffer); /* CRC ignored. */ - spiIgnore(mmcp->mmc_spip, 2); + spiIgnore(mmcp->spip, 2); return FALSE; } } /* Timeout.*/ - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); chSysLock(); - if (mmcp->mmc_state == MMC_READING) - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_READING) + mmcp->state = MMC_READY; chSysUnlock(); return TRUE; } @@ -489,22 +484,22 @@ bool_t mmcStopSequentialRead(MMCDriver *mmcp) { chDbgCheck(mmcp != NULL, "mmcStopSequentialRead"); chSysLock(); - if (mmcp->mmc_state != MMC_READING) { + if (mmcp->state != MMC_READING) { chSysUnlock(); return TRUE; } chSysUnlock(); - spiSend(mmcp->mmc_spip, sizeof(stopcmd), stopcmd); + spiSend(mmcp->spip, sizeof(stopcmd), stopcmd); /* result = recvr1(mmcp) != 0x00;*/ /* Note, ignored r1 response, it can be not zero, unknown issue.*/ recvr1(mmcp); result = FALSE; - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); chSysLock(); - if (mmcp->mmc_state == MMC_READING) - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_READING) + mmcp->state = MMC_READY; chSysUnlock(); return result; } @@ -525,21 +520,21 @@ bool_t mmcStartSequentialWrite(MMCDriver *mmcp, uint32_t startblk) { chDbgCheck(mmcp != NULL, "mmcStartSequentialWrite"); chSysLock(); - if (mmcp->mmc_state != MMC_READY) { + if (mmcp->state != MMC_READY) { chSysUnlock(); return TRUE; } - mmcp->mmc_state = MMC_WRITING; + mmcp->state = MMC_WRITING; chSysUnlock(); - spiStart(mmcp->mmc_spip, mmcp->mmc_hscfg); - spiSelect(mmcp->mmc_spip); + spiStart(mmcp->spip, mmcp->hscfg); + spiSelect(mmcp->spip); send_hdr(mmcp, MMC_CMDWRITEMULTIPLE, startblk * MMC_SECTOR_SIZE); if (recvr1(mmcp) != 0x00) { - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); chSysLock(); - if (mmcp->mmc_state == MMC_WRITING) - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_WRITING) + mmcp->state = MMC_READY; chSysUnlock(); return TRUE; } @@ -564,26 +559,26 @@ bool_t mmcSequentialWrite(MMCDriver *mmcp, const uint8_t *buffer) { chDbgCheck((mmcp != NULL) && (buffer != NULL), "mmcSequentialWrite"); chSysLock(); - if (mmcp->mmc_state != MMC_WRITING) { + if (mmcp->state != MMC_WRITING) { chSysUnlock(); return TRUE; } chSysUnlock(); - spiSend(mmcp->mmc_spip, sizeof(start), start); /* Data prologue. */ - spiSend(mmcp->mmc_spip, MMC_SECTOR_SIZE, buffer); /* Data. */ - spiIgnore(mmcp->mmc_spip, 2); /* CRC ignored. */ - spiReceive(mmcp->mmc_spip, 1, b); + spiSend(mmcp->spip, sizeof(start), start); /* Data prologue. */ + spiSend(mmcp->spip, MMC_SECTOR_SIZE, buffer); /* Data. */ + spiIgnore(mmcp->spip, 2); /* CRC ignored. */ + spiReceive(mmcp->spip, 1, b); if ((b[0] & 0x1F) == 0x05) { wait(mmcp); return FALSE; } /* Error.*/ - spiUnselect(mmcp->mmc_spip); + spiUnselect(mmcp->spip); chSysLock(); - if (mmcp->mmc_state == MMC_WRITING) - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_WRITING) + mmcp->state = MMC_READY; chSysUnlock(); return TRUE; } @@ -604,18 +599,18 @@ bool_t mmcStopSequentialWrite(MMCDriver *mmcp) { chDbgCheck(mmcp != NULL, "mmcStopSequentialWrite"); chSysLock(); - if (mmcp->mmc_state != MMC_WRITING) { + if (mmcp->state != MMC_WRITING) { chSysUnlock(); return TRUE; } chSysUnlock(); - spiSend(mmcp->mmc_spip, sizeof(stop), stop); - spiUnselect(mmcp->mmc_spip); + spiSend(mmcp->spip, sizeof(stop), stop); + spiUnselect(mmcp->spip); chSysLock(); - if (mmcp->mmc_state == MMC_WRITING) { - mmcp->mmc_state = MMC_READY; + if (mmcp->state == MMC_WRITING) { + mmcp->state = MMC_READY; chSysUnlock(); return FALSE; } diff --git a/os/hal/src/pal.c b/os/hal/src/pal.c index ce7c226e9..de12baef6 100644 --- a/os/hal/src/pal.c +++ b/os/hal/src/pal.c @@ -64,9 +64,9 @@ ioportmask_t palReadBus(IOBus *bus) { chDbgCheck((bus != NULL) && - (bus->bus_offset > PAL_IOPORTS_WIDTH), "palReadBus"); + (bus->offset > PAL_IOPORTS_WIDTH), "palReadBus"); - return palReadGroup(bus->bus_portid, bus->bus_mask, bus->bus_offset); + return palReadGroup(bus->portid, bus->mask, bus->offset); } /** @@ -89,9 +89,9 @@ ioportmask_t palReadBus(IOBus *bus) { void palWriteBus(IOBus *bus, ioportmask_t bits) { chDbgCheck((bus != NULL) && - (bus->bus_offset > PAL_IOPORTS_WIDTH), "palWriteBus"); + (bus->offset > PAL_IOPORTS_WIDTH), "palWriteBus"); - palWriteGroup(bus->bus_portid, bus->bus_mask, bus->bus_offset, bits); + palWriteGroup(bus->portid, bus->mask, bus->offset, bits); } /** @@ -112,9 +112,9 @@ void palWriteBus(IOBus *bus, ioportmask_t bits) { void palSetBusMode(IOBus *bus, uint_fast8_t mode) { chDbgCheck((bus != NULL) && - (bus->bus_offset > PAL_IOPORTS_WIDTH), "palSetBusMode"); + (bus->offset > PAL_IOPORTS_WIDTH), "palSetBusMode"); - palSetGroupMode(bus->bus_portid, bus->bus_mask, mode); + palSetGroupMode(bus->portid, bus->mask, mode); } #endif /* HAL_USE_PAL */ diff --git a/os/hal/src/pwm.c b/os/hal/src/pwm.c index cf619e508..40ad7428d 100644 --- a/os/hal/src/pwm.c +++ b/os/hal/src/pwm.c @@ -67,8 +67,8 @@ void pwmInit(void) { */ void pwmObjectInit(PWMDriver *pwmp) { - pwmp->pd_state = PWM_STOP; - pwmp->pd_config = NULL; + pwmp->state = PWM_STOP; + pwmp->config = NULL; #if defined(PWM_DRIVER_EXT_INIT_HOOK) PWM_DRIVER_EXT_INIT_HOOK(pwmp); #endif @@ -87,11 +87,11 @@ void pwmStart(PWMDriver *pwmp, const PWMConfig *config) { chDbgCheck((pwmp != NULL) && (config != NULL), "pwmStart"); chSysLock(); - chDbgAssert((pwmp->pd_state == PWM_STOP) || (pwmp->pd_state == PWM_READY), + chDbgAssert((pwmp->state == PWM_STOP) || (pwmp->state == PWM_READY), "pwmStart(), #1", "invalid state"); - pwmp->pd_config = config; + pwmp->config = config; pwm_lld_start(pwmp); - pwmp->pd_state = PWM_READY; + pwmp->state = PWM_READY; chSysUnlock(); } @@ -107,10 +107,10 @@ void pwmStop(PWMDriver *pwmp) { chDbgCheck(pwmp != NULL, "pwmStop"); chSysLock(); - chDbgAssert((pwmp->pd_state == PWM_STOP) || (pwmp->pd_state == PWM_READY), + chDbgAssert((pwmp->state == PWM_STOP) || (pwmp->state == PWM_READY), "pwmStop(), #1", "invalid state"); pwm_lld_stop(pwmp); - pwmp->pd_state = PWM_STOP; + pwmp->state = PWM_STOP; chSysUnlock(); } @@ -132,7 +132,7 @@ void pwmEnableChannel(PWMDriver *pwmp, "pwmEnableChannel"); chSysLock(); - chDbgAssert(pwmp->pd_state == PWM_READY, + chDbgAssert(pwmp->state == PWM_READY, "pwmEnableChannel(), #1", "not ready"); pwm_lld_enable_channel(pwmp, channel, width); chSysUnlock(); @@ -154,7 +154,7 @@ void pwmDisableChannel(PWMDriver *pwmp, pwmchannel_t channel) { "pwmEnableChannel"); chSysLock(); - chDbgAssert(pwmp->pd_state == PWM_READY, + chDbgAssert(pwmp->state == PWM_READY, "pwmDisableChannel(), #1", "not ready"); pwm_lld_disable_channel(pwmp, channel); chSysUnlock(); diff --git a/os/hal/src/spi.c b/os/hal/src/spi.c index e99126b9e..686006e0d 100644 --- a/os/hal/src/spi.c +++ b/os/hal/src/spi.c @@ -67,16 +67,16 @@ void spiInit(void) { */ void spiObjectInit(SPIDriver *spip) { - spip->spd_state = SPI_STOP; - spip->spd_config = NULL; + spip->state = SPI_STOP; + spip->config = NULL; #if SPI_USE_WAIT - spip->spd_thread = NULL; + spip->thread = NULL; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION #if CH_USE_MUTEXES - chMtxInit(&spip->spd_mutex); + chMtxInit(&spip->mutex); #else - chSemInit(&spip->spd_semaphore, 1); + chSemInit(&spip->semaphore, 1); #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_INIT_HOOK) @@ -97,11 +97,11 @@ void spiStart(SPIDriver *spip, const SPIConfig *config) { chDbgCheck((spip != NULL) && (config != NULL), "spiStart"); chSysLock(); - chDbgAssert((spip->spd_state == SPI_STOP) || (spip->spd_state == SPI_READY), + chDbgAssert((spip->state == SPI_STOP) || (spip->state == SPI_READY), "spiStart(), #1", "invalid state"); - spip->spd_config = config; + spip->config = config; spi_lld_start(spip); - spip->spd_state = SPI_READY; + spip->state = SPI_READY; chSysUnlock(); } @@ -119,11 +119,11 @@ void spiStop(SPIDriver *spip) { chDbgCheck(spip != NULL, "spiStop"); chSysLock(); - chDbgAssert((spip->spd_state == SPI_STOP) || (spip->spd_state == SPI_READY), + chDbgAssert((spip->state == SPI_STOP) || (spip->state == SPI_READY), "spiStop(), #1", "invalid state"); spi_lld_unselect(spip); spi_lld_stop(spip); - spip->spd_state = SPI_STOP; + spip->state = SPI_STOP; chSysUnlock(); } @@ -139,8 +139,7 @@ void spiSelect(SPIDriver *spip) { chDbgCheck(spip != NULL, "spiSelect"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiSelect(), #1", "not ready"); + chDbgAssert(spip->state == SPI_READY, "spiSelect(), #1", "not ready"); spiSelectI(spip); chSysUnlock(); } @@ -158,8 +157,7 @@ void spiUnselect(SPIDriver *spip) { chDbgCheck(spip != NULL, "spiUnselect"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiUnselect(), #1", "not ready"); + chDbgAssert(spip->state == SPI_READY, "spiUnselect(), #1", "not ready"); spiUnselectI(spip); chSysUnlock(); } @@ -182,8 +180,7 @@ void spiStartIgnore(SPIDriver *spip, size_t n) { chDbgCheck((spip != NULL) && (n > 0), "spiStartIgnore"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiStartIgnore(), #1", "not ready"); + chDbgAssert(spip->state == SPI_READY, "spiStartIgnore(), #1", "not ready"); spiStartIgnoreI(spip, n); chSysUnlock(); } @@ -212,8 +209,7 @@ void spiStartExchange(SPIDriver *spip, size_t n, "spiStartExchange"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiStartExchange(), #1", "not ready"); + chDbgAssert(spip->state == SPI_READY, "spiStartExchange(), #1", "not ready"); spiStartExchangeI(spip, n, txbuf, rxbuf); chSysUnlock(); } @@ -239,8 +235,7 @@ void spiStartSend(SPIDriver *spip, size_t n, const void *txbuf) { "spiStartSend"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiStartSend(), #1", "not ready"); + chDbgAssert(spip->state == SPI_READY, "spiStartSend(), #1", "not ready"); spiStartSendI(spip, n, txbuf); chSysUnlock(); } @@ -266,8 +261,7 @@ void spiStartReceive(SPIDriver *spip, size_t n, void *rxbuf) { "spiStartReceive"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiStartReceive(), #1", "not ready"); + chDbgAssert(spip->state == SPI_READY, "spiStartReceive(), #1", "not ready"); spiStartReceiveI(spip, n, rxbuf); chSysUnlock(); } @@ -280,7 +274,7 @@ void spiStartReceive(SPIDriver *spip, size_t n, void *rxbuf) { * @pre In order to use this function the option @p SPI_USE_WAIT must be * enabled. * @pre In order to use this function the driver must have been configured - * without callbacks (@p spc_endcb = @p NULL). + * without callbacks (@p end_cb = @p NULL). * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to be ignored @@ -292,10 +286,8 @@ void spiIgnore(SPIDriver *spip, size_t n) { chDbgCheck((spip != NULL) && (n > 0), "spiIgnoreWait"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiIgnore(), #1", "not ready"); - chDbgAssert(spip->spd_config->spc_endcb == NULL, - "spiIgnore(), #2", "has callback"); + chDbgAssert(spip->state == SPI_READY, "spiIgnore(), #1", "not ready"); + chDbgAssert(spip->config->end_cb == NULL, "spiIgnore(), #2", "has callback"); spiStartIgnoreI(spip, n); _spi_wait_s(spip); chSysUnlock(); @@ -308,7 +300,7 @@ void spiIgnore(SPIDriver *spip, size_t n) { * @pre In order to use this function the option @p SPI_USE_WAIT must be * enabled. * @pre In order to use this function the driver must have been configured - * without callbacks (@p spc_endcb = @p NULL). + * without callbacks (@p end_cb = @p NULL). * @note The buffers are organized as uint8_t arrays for data sizes below * or equal to 8 bits else it is organized as uint16_t arrays. * @@ -326,9 +318,8 @@ void spiExchange(SPIDriver *spip, size_t n, "spiExchange"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiExchange(), #1", "not ready"); - chDbgAssert(spip->spd_config->spc_endcb == NULL, + chDbgAssert(spip->state == SPI_READY, "spiExchange(), #1", "not ready"); + chDbgAssert(spip->config->end_cb == NULL, "spiExchange(), #2", "has callback"); spiStartExchangeI(spip, n, txbuf, rxbuf); _spi_wait_s(spip); @@ -341,7 +332,7 @@ void spiExchange(SPIDriver *spip, size_t n, * @pre In order to use this function the option @p SPI_USE_WAIT must be * enabled. * @pre In order to use this function the driver must have been configured - * without callbacks (@p spc_endcb = @p NULL). + * without callbacks (@p end_cb = @p NULL). * @note The buffers are organized as uint8_t arrays for data sizes below * or equal to 8 bits else it is organized as uint16_t arrays. * @@ -353,14 +344,11 @@ void spiExchange(SPIDriver *spip, size_t n, */ void spiSend(SPIDriver *spip, size_t n, const void *txbuf) { - chDbgCheck((spip != NULL) && (n > 0) && (txbuf != NULL), - "spiSend"); + chDbgCheck((spip != NULL) && (n > 0) && (txbuf != NULL), "spiSend"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiSend(), #1", "not ready"); - chDbgAssert(spip->spd_config->spc_endcb == NULL, - "spiSend(), #2", "has callback"); + chDbgAssert(spip->state == SPI_READY, "spiSend(), #1", "not ready"); + chDbgAssert(spip->config->end_cb == NULL, "spiSend(), #2", "has callback"); spiStartSendI(spip, n, txbuf); _spi_wait_s(spip); chSysUnlock(); @@ -372,7 +360,7 @@ void spiSend(SPIDriver *spip, size_t n, const void *txbuf) { * @pre In order to use this function the option @p SPI_USE_WAIT must be * enabled. * @pre In order to use this function the driver must have been configured - * without callbacks (@p spc_endcb = @p NULL). + * without callbacks (@p end_cb = @p NULL). * @note The buffers are organized as uint8_t arrays for data sizes below * or equal to 8 bits else it is organized as uint16_t arrays. * @@ -388,9 +376,8 @@ void spiReceive(SPIDriver *spip, size_t n, void *rxbuf) { "spiReceive"); chSysLock(); - chDbgAssert(spip->spd_state == SPI_READY, - "spiReceive(), #1", "not ready"); - chDbgAssert(spip->spd_config->spc_endcb == NULL, + chDbgAssert(spip->state == SPI_READY, "spiReceive(), #1", "not ready"); + chDbgAssert(spip->config->end_cb == NULL, "spiReceive(), #2", "has callback"); spiStartReceiveI(spip, n, rxbuf); _spi_wait_s(spip); @@ -415,9 +402,9 @@ void spiAcquireBus(SPIDriver *spip) { chDbgCheck(spip != NULL, "spiAcquireBus"); #if CH_USE_MUTEXES - chMtxLock(&spip->spd_mutex); + chMtxLock(&spip->mutex); #elif CH_USE_SEMAPHORES - chSemWait(&spip->spd_semaphore); + chSemWait(&spip->semaphore); #endif } @@ -438,7 +425,7 @@ void spiReleaseBus(SPIDriver *spip) { (void)spip; chMtxUnlock(); #elif CH_USE_SEMAPHORES - chSemSignal(&spip->spd_semaphore); + chSemSignal(&spip->semaphore); #endif } #endif /* SPI_USE_MUTUAL_EXCLUSION */ diff --git a/os/hal/src/uart.c b/os/hal/src/uart.c index 4a21e907f..2a9c6ce6f 100644 --- a/os/hal/src/uart.c +++ b/os/hal/src/uart.c @@ -67,10 +67,10 @@ void uartInit(void) { */ void uartObjectInit(UARTDriver *uartp) { - uartp->ud_state = UART_STOP; - uartp->ud_txstate = UART_TX_IDLE; - uartp->ud_rxstate = UART_RX_IDLE; - uartp->ud_config = NULL; + uartp->state = UART_STOP; + uartp->txstate = UART_TX_IDLE; + uartp->rxstate = UART_RX_IDLE; + uartp->config = NULL; /* Optional, user-defined initializer.*/ #if defined(UART_DRIVER_EXT_INIT_HOOK) UART_DRIVER_EXT_INIT_HOOK(uartp); @@ -90,14 +90,12 @@ void uartStart(UARTDriver *uartp, const UARTConfig *config) { chDbgCheck((uartp != NULL) && (config != NULL), "uartStart"); chSysLock(); - chDbgAssert((uartp->ud_state == UART_STOP) || - (uartp->ud_state == UART_READY), - "uartStart(), #1", - "invalid state"); + chDbgAssert((uartp->state == UART_STOP) || (uartp->state == UART_READY), + "uartStart(), #1", "invalid state"); - uartp->ud_config = config; + uartp->config = config; uart_lld_start(uartp); - uartp->ud_state = UART_READY; + uartp->state = UART_READY; chSysUnlock(); } @@ -113,15 +111,13 @@ void uartStop(UARTDriver *uartp) { chDbgCheck(uartp != NULL, "uartStop"); chSysLock(); - chDbgAssert((uartp->ud_state == UART_STOP) || - (uartp->ud_state == UART_READY), - "uartStop(), #1", - "invalid state"); + chDbgAssert((uartp->state == UART_STOP) || (uartp->state == UART_READY), + "uartStop(), #1", "invalid state"); uart_lld_stop(uartp); - uartp->ud_state = UART_STOP; - uartp->ud_txstate = UART_TX_IDLE; - uartp->ud_rxstate = UART_RX_IDLE; + uartp->state = UART_STOP; + uartp->txstate = UART_TX_IDLE; + uartp->rxstate = UART_RX_IDLE; chSysUnlock(); } @@ -142,13 +138,11 @@ void uartStartSend(UARTDriver *uartp, size_t n, const void *txbuf) { "uartStartSend"); chSysLock(); - chDbgAssert((uartp->ud_state == UART_READY) && - (uartp->ud_txstate == UART_TX_IDLE), - "uartStartSend(), #1", - "not active"); + chDbgAssert((uartp->state == UART_READY) && (uartp->txstate == UART_TX_IDLE), + "uartStartSend(), #1", "not active"); uart_lld_start_send(uartp, n, txbuf); - uartp->ud_txstate = UART_TX_ACTIVE; + uartp->txstate = UART_TX_ACTIVE; chSysUnlock(); } @@ -169,12 +163,11 @@ void uartStartSendI(UARTDriver *uartp, size_t n, const void *txbuf) { chDbgCheck((uartp != NULL) && (n > 0) && (txbuf != NULL), "uartStartSendI"); - chDbgAssert((uartp->ud_state == UART_READY) && - (uartp->ud_txstate != UART_TX_ACTIVE), - "uartStartSendI(), #1", - "not active"); + chDbgAssert((uartp->state == UART_READY) && + (uartp->txstate != UART_TX_ACTIVE), + "uartStartSendI(), #1", "not active"); uart_lld_start_send(uartp, n, txbuf); - uartp->ud_txstate = UART_TX_ACTIVE; + uartp->txstate = UART_TX_ACTIVE; } /** @@ -195,13 +188,11 @@ size_t uartStopSend(UARTDriver *uartp) { chDbgCheck(uartp != NULL, "uartStopSend"); chSysLock(); - chDbgAssert(uartp->ud_state == UART_READY, - "uartStopSend(), #1", - "not active"); + chDbgAssert(uartp->state == UART_READY, "uartStopSend(), #1", "not active"); - if (uartp->ud_txstate == UART_TX_ACTIVE) { + if (uartp->txstate == UART_TX_ACTIVE) { n = uart_lld_stop_send(uartp); - uartp->ud_txstate = UART_TX_IDLE; + uartp->txstate = UART_TX_IDLE; } else n = 0; @@ -226,13 +217,11 @@ size_t uartStopSendI(UARTDriver *uartp) { chDbgCheck(uartp != NULL, "uartStopSendI"); - chDbgAssert(uartp->ud_state == UART_READY, - "uartStopSendI(), #1", - "not active"); + chDbgAssert(uartp->state == UART_READY, "uartStopSendI(), #1", "not active"); - if (uartp->ud_txstate == UART_TX_ACTIVE) { + if (uartp->txstate == UART_TX_ACTIVE) { size_t n = uart_lld_stop_send(uartp); - uartp->ud_txstate = UART_TX_IDLE; + uartp->txstate = UART_TX_IDLE; return n; } return 0; @@ -255,13 +244,11 @@ void uartStartReceive(UARTDriver *uartp, size_t n, void *rxbuf) { "uartStartReceive"); chSysLock(); - chDbgAssert((uartp->ud_state == UART_READY) && - (uartp->ud_rxstate == UART_RX_IDLE), - "uartStartReceive(), #1", - "not active"); + chDbgAssert((uartp->state == UART_READY) && (uartp->rxstate == UART_RX_IDLE), + "uartStartReceive(), #1", "not active"); uart_lld_start_receive(uartp, n, rxbuf); - uartp->ud_rxstate = UART_RX_ACTIVE; + uartp->rxstate = UART_RX_ACTIVE; chSysUnlock(); } @@ -282,13 +269,11 @@ void uartStartReceiveI(UARTDriver *uartp, size_t n, void *rxbuf) { chDbgCheck((uartp != NULL) && (n > 0) && (rxbuf != NULL), "uartStartReceiveI"); - chDbgAssert((uartp->ud_state == UART_READY) && - (uartp->ud_rxstate == UART_RX_IDLE), - "uartStartReceiveI(), #1", - "not active"); + chDbgAssert((uartp->state == UART_READY) && (uartp->rxstate == UART_RX_IDLE), + "uartStartReceiveI(), #1", "not active"); uart_lld_start_receive(uartp, n, rxbuf); - uartp->ud_rxstate = UART_RX_ACTIVE; + uartp->rxstate = UART_RX_ACTIVE; } /** @@ -309,13 +294,12 @@ size_t uartStopReceive(UARTDriver *uartp) { chDbgCheck(uartp != NULL, "uartStopReceive"); chSysLock(); - chDbgAssert(uartp->ud_state == UART_READY, - "uartStopReceive(), #1", - "not active"); + chDbgAssert(uartp->state == UART_READY, + "uartStopReceive(), #1", "not active"); - if (uartp->ud_rxstate == UART_RX_ACTIVE) { + if (uartp->rxstate == UART_RX_ACTIVE) { n = uart_lld_stop_receive(uartp); - uartp->ud_rxstate = UART_RX_IDLE; + uartp->rxstate = UART_RX_IDLE; } else n = 0; @@ -339,13 +323,12 @@ size_t uartStopReceive(UARTDriver *uartp) { size_t uartStopReceiveI(UARTDriver *uartp) { chDbgCheck(uartp != NULL, "uartStopReceiveI"); - chDbgAssert(uartp->ud_state == UART_READY, - "uartStopReceiveI(), #1", - "not active"); + chDbgAssert(uartp->state == UART_READY, + "uartStopReceiveI(), #1", "not active"); - if (uartp->ud_rxstate == UART_RX_ACTIVE) { + if (uartp->rxstate == UART_RX_ACTIVE) { size_t n = uart_lld_stop_receive(uartp); - uartp->ud_rxstate = UART_RX_IDLE; + uartp->rxstate = UART_RX_IDLE; return n; } return 0; diff --git a/os/hal/templates/adc_lld.c b/os/hal/templates/adc_lld.c index 6c541f557..4a6acbee6 100644 --- a/os/hal/templates/adc_lld.c +++ b/os/hal/templates/adc_lld.c @@ -83,7 +83,7 @@ void adc_lld_start(ADCDriver *adcp) { */ void adc_lld_stop(ADCDriver *adcp) { - if (adcp->ad_state == ADC_READY) { + if (adcp->state == ADC_READY) { /* Clock de-activation.*/ } diff --git a/os/hal/templates/adc_lld.h b/os/hal/templates/adc_lld.h index 54d78fd44..1cfba2f72 100644 --- a/os/hal/templates/adc_lld.h +++ b/os/hal/templates/adc_lld.h @@ -86,15 +86,15 @@ typedef struct { /** * @brief Enables the circular buffer mode for the group. */ - bool_t acg_circular; + bool_t circular; /** * @brief Number of the analog channels belonging to the conversion group. */ - adc_channels_num_t acg_num_channels; + adc_channels_num_t num_channels; /** * @brief Callback function associated to the group or @p NULL. */ - adccallback_t acg_endcb; + adccallback_t end_cb; /* End of the mandatory fields.*/ } ADCConversionGroup; @@ -117,37 +117,37 @@ struct ADCDriver { /** * @brief Driver state. */ - adcstate_t ad_state; + adcstate_t state; /** * @brief Current configuration data. */ - const ADCConfig *ad_config; + const ADCConfig *config; /** * @brief Current samples buffer pointer or @p NULL. */ - adcsample_t *ad_samples; + adcsample_t *samples; /** * @brief Current samples buffer depth or @p 0. */ - size_t ad_depth; + size_t depth; /** * @brief Current conversion group pointer or @p NULL. */ - const ADCConversionGroup *ad_grpp; + const ADCConversionGroup *grpp; #if ADC_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *ad_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the peripheral. */ - Mutex ad_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore ad_semaphore; + Semaphore semaphore; #endif #endif /* ADC_USE_MUTUAL_EXCLUSION */ #if defined(ADC_DRIVER_EXT_FIELDS) diff --git a/os/hal/templates/can_lld.c b/os/hal/templates/can_lld.c index 2dc92f169..3662d2867 100644 --- a/os/hal/templates/can_lld.c +++ b/os/hal/templates/can_lld.c @@ -80,7 +80,7 @@ void can_lld_start(CANDriver *canp) { void can_lld_stop(CANDriver *canp) { /* If in ready state then disables the CAN peripheral.*/ - if (canp->cd_state == CAN_READY) { + if (canp->state == CAN_READY) { } } diff --git a/os/hal/templates/can_lld.h b/os/hal/templates/can_lld.h index 37ce7f157..4817cdc7f 100644 --- a/os/hal/templates/can_lld.h +++ b/os/hal/templates/can_lld.h @@ -82,22 +82,22 @@ typedef uint32_t canstatus_t; */ typedef struct { struct { - uint8_t cf_DLC:4; /**< @brief Data length. */ - uint8_t cf_RTR:1; /**< @brief Frame type. */ - uint8_t cf_IDE:1; /**< @brief Identifier type. */ + uint8_t DLC:4; /**< @brief Data length. */ + uint8_t RTR:1; /**< @brief Frame type. */ + uint8_t IDE:1; /**< @brief Identifier type. */ }; union { struct { - uint32_t cf_SID:11; /**< @brief Standard identifier.*/ + uint32_t SID:11; /**< @brief Standard identifier.*/ }; struct { - uint32_t cf_EID:29; /**< @brief Extended identifier.*/ + uint32_t EID:29; /**< @brief Extended identifier.*/ }; }; union { - uint8_t cf_data8[8]; /**< @brief Frame data. */ - uint16_t cf_data16[4]; /**< @brief Frame data. */ - uint32_t cf_data32[2]; /**< @brief Frame data. */ + uint8_t data8[8]; /**< @brief Frame data. */ + uint16_t data16[4]; /**< @brief Frame data. */ + uint32_t data32[2]; /**< @brief Frame data. */ }; } CANTxFrame; @@ -109,22 +109,22 @@ typedef struct { */ typedef struct { struct { - uint8_t cf_DLC:4; /**< @brief Data length. */ - uint8_t cf_RTR:1; /**< @brief Frame type. */ - uint8_t cf_IDE:1; /**< @brief Identifier type. */ + uint8_t DLC:4; /**< @brief Data length. */ + uint8_t RTR:1; /**< @brief Frame type. */ + uint8_t IDE:1; /**< @brief Identifier type. */ }; union { struct { - uint32_t cf_SID:11; /**< @brief Standard identifier.*/ + uint32_t SID:11; /**< @brief Standard identifier.*/ }; struct { - uint32_t cf_EID:29; /**< @brief Extended identifier.*/ + uint32_t EID:29; /**< @brief Extended identifier.*/ }; }; union { - uint8_t cf_data8[8]; /**< @brief Frame data. */ - uint16_t cf_data16[4]; /**< @brief Frame data. */ - uint32_t cf_data32[2]; /**< @brief Frame data. */ + uint8_t data8[8]; /**< @brief Frame data. */ + uint16_t data16[4]; /**< @brief Frame data. */ + uint32_t data32[2]; /**< @brief Frame data. */ }; } CANRxFrame; @@ -155,19 +155,19 @@ typedef struct { /** * @brief Driver state. */ - canstate_t cd_state; + canstate_t state; /** * @brief Current configuration data. */ - const CANConfig *cd_config; + const CANConfig *config; /** * @brief Transmission queue semaphore. */ - Semaphore cd_txsem; + Semaphore txsem; /** * @brief Receive queue semaphore. */ - Semaphore cd_rxsem; + Semaphore rxsem; /** * @brief One or more frames become available. * @note After broadcasting this event it will not be broadcasted again @@ -177,28 +177,28 @@ typedef struct { * invoking @p chReceive() when listening to this event. This behavior * minimizes the interrupt served by the system because CAN traffic. */ - EventSource cd_rxfull_event; + EventSource rxfull_event; /** * @brief One or more transmission slots become available. */ - EventSource cd_txempty_event; + EventSource txempty_event; /** * @brief A CAN bus error happened. */ - EventSource cd_error_event; + EventSource error_event; /** * @brief Error flags set when an error event is broadcasted. */ - canstatus_t cd_status; + canstatus_t status; #if CAN_USE_SLEEP_MODE || defined (__DOXYGEN__) /** * @brief Entering sleep state event. */ - EventSource cd_sleep_event; + EventSource sleep_event; /** * @brief Exiting sleep state event. */ - EventSource cd_wakeup_event; + EventSource wakeup_event; #endif /* CAN_USE_SLEEP_MODE */ /* End of the mandatory fields.*/ } CANDriver; diff --git a/os/hal/templates/mac_lld.h b/os/hal/templates/mac_lld.h index 869fa5db8..f9b532009 100644 --- a/os/hal/templates/mac_lld.h +++ b/os/hal/templates/mac_lld.h @@ -73,10 +73,10 @@ * architecture dependent, fields. */ typedef struct { - Semaphore md_tdsem; /**< Transmit semaphore. */ - Semaphore md_rdsem; /**< Receive semaphore. */ + Semaphore tdsem; /**< Transmit semaphore. */ + Semaphore rdsem; /**< Receive semaphore. */ #if CH_USE_EVENTS - EventSource md_rdevent; /**< Receive event source. */ + EventSource rdevent; /**< Receive event source. */ #endif /* End of the mandatory fields.*/ } MACDriver; @@ -87,8 +87,8 @@ typedef struct { * architecture dependent, fields. */ typedef struct { - size_t td_offset; /**< Current write offset. */ - size_t td_size; /**< Available space size. */ + size_t offset; /**< Current write offset. */ + size_t size; /**< Available space size. */ /* End of the mandatory fields.*/ } MACTransmitDescriptor; @@ -98,8 +98,8 @@ typedef struct { * architecture dependent, fields. */ typedef struct { - size_t rd_offset; /**< Current read offset. */ - size_t rd_size; /**< Available data size. */ + size_t offset; /**< Current read offset. */ + size_t size; /**< Available data size. */ /* End of the mandatory fields.*/ } MACReceiveDescriptor; diff --git a/os/hal/templates/pwm_lld.c b/os/hal/templates/pwm_lld.c index 7e904765a..712ab5982 100644 --- a/os/hal/templates/pwm_lld.c +++ b/os/hal/templates/pwm_lld.c @@ -68,7 +68,7 @@ void pwm_lld_init(void) { */ void pwm_lld_start(PWMDriver *pwmp) { - if (pwmp->pd_state == PWM_STOP) { + if (pwmp->state == PWM_STOP) { /* Clock activation.*/ } /* Configuration.*/ diff --git a/os/hal/templates/pwm_lld.h b/os/hal/templates/pwm_lld.h index 74fb280a7..bf0222981 100644 --- a/os/hal/templates/pwm_lld.h +++ b/os/hal/templates/pwm_lld.h @@ -84,13 +84,13 @@ typedef struct { /** * @brief Channel active logic level. */ - pwmmode_t pcc_mode; + pwmmode_t mode; /** * @brief Channel callback pointer. * @note This callback is invoked on the channel compare event. If set to * @p NULL then the callback is disabled. */ - pwmcallback_t pcc_callback; + pwmcallback_t callback; /* End of the mandatory fields.*/ } PWMChannelConfig; @@ -105,11 +105,11 @@ typedef struct { * @note This callback is invoked on PWM counter reset. If set to * @p NULL then the callback is disabled. */ - pwmcallback_t pc_callback; + pwmcallback_t callback; /** * @brief Channels configurations. */ - PWMChannelConfig pc_channels[PWM_CHANNELS]; + PWMChannelConfig channels[PWM_CHANNELS]; /* End of the mandatory fields.*/ } PWMConfig; @@ -122,11 +122,11 @@ struct PWMDriver { /** * @brief Driver state. */ - pwmstate_t pd_state; + pwmstate_t state; /** * @brief Current configuration data. */ - const PWMConfig *pd_config; + const PWMConfig *config; #if defined(PWM_DRIVER_EXT_FIELDS) PWM_DRIVER_EXT_FIELDS #endif diff --git a/os/hal/templates/spi_lld.c b/os/hal/templates/spi_lld.c index 5b76e3bdf..1235417c7 100644 --- a/os/hal/templates/spi_lld.c +++ b/os/hal/templates/spi_lld.c @@ -68,7 +68,7 @@ void spi_lld_init(void) { */ void spi_lld_start(SPIDriver *spip) { - if (spip->spd_state == SPI_STOP) { + if (spip->state == SPI_STOP) { /* Clock activation.*/ } /* Configuration.*/ diff --git a/os/hal/templates/spi_lld.h b/os/hal/templates/spi_lld.h index e985aa727..047f0756c 100644 --- a/os/hal/templates/spi_lld.h +++ b/os/hal/templates/spi_lld.h @@ -68,7 +68,7 @@ typedef struct { /** * @brief Operation complete callback. */ - spicallback_t spc_endcb; + spicallback_t end_cb; /* End of the mandatory fields.*/ } SPIConfig; @@ -81,25 +81,25 @@ struct SPIDriver { /** * @brief Driver state. */ - spistate_t spd_state; + spistate_t state; /** * @brief Current configuration data. */ - const SPIConfig *spd_config; + const SPIConfig *config; #if SPI_USE_WAIT || defined(__DOXYGEN__) /** * @brief Waiting thread. */ - Thread *spd_thread; + Thread *thread; #endif /* SPI_USE_WAIT */ #if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the bus. */ - Mutex spd_mutex; + Mutex mutex; #elif CH_USE_SEMAPHORES - Semaphore spd_semaphore; + Semaphore semaphore; #endif #endif /* SPI_USE_MUTUAL_EXCLUSION */ #if defined(SPI_DRIVER_EXT_FIELDS) diff --git a/os/hal/templates/uart_lld.h b/os/hal/templates/uart_lld.h index 531e7f3ab..8808d6589 100644 --- a/os/hal/templates/uart_lld.h +++ b/os/hal/templates/uart_lld.h @@ -90,23 +90,23 @@ typedef struct { /** * @brief End of transmission buffer callback. */ - uartcb_t uc_txend1; + uartcb_t txend1_cb; /** * @brief Physical end of transmission callback. */ - uartcb_t uc_txend2; + uartcb_t txend2_cb; /** * @brief Receive buffer filled callback. */ - uartcb_t uc_rxend; + uartcb_t rxend_cb; /** * @brief Character received while out if the @p UART_RECEIVE state. */ - uartccb_t uc_rxchar; + uartccb_t rxchar_cb; /** * @brief Receive error callback. */ - uartecb_t uc_rxerr; + uartecb_t rxerr_cb; /* End of the mandatory fields.*/ } UARTConfig; @@ -119,19 +119,19 @@ struct UARTDriver { /** * @brief Driver state. */ - uartstate_t ud_state; + uartstate_t state; /** * @brief Transmitter state. */ - uarttxstate_t ud_txstate; + uarttxstate_t txstate; /** * @brief Receiver state. */ - uartrxstate_t ud_rxstate; + uartrxstate_t rxstate; /** * @brief Current configuration data. */ - const UARTConfig *ud_config; + const UARTConfig *config; #if defined(UART_DRIVER_EXT_FIELDS) UART_DRIVER_EXT_FIELDS #endif diff --git a/readme.txt b/readme.txt index 3edbd9fee..a1a0a3ce4 100644 --- a/readme.txt +++ b/readme.txt @@ -61,13 +61,19 @@ +--test/ - Kernel test suite source code. | +--coverage/ - Code coverage project. +--testhal/ - HAL integration test demos. - +--STM32/ - STM32 HAL demos. - +--STM8S/ - STM8S HAL demos. + +--LPC11xx/ - LPC11xx HAL test demos. + +--LPC13xx/ - LPC13xx HAL test demos. + +--STM32/ - STM32 HAL test demos. + +--STM8S/ - STM8S HAL test demos. ***************************************************************************** *** Releases *** ***************************************************************************** +*** 2.3.1 *** +- CHANGE: Removed all the prefixes from the structure/union field names + in the HAL subsystem. + *** 2.3.0 *** - FIX: Fixed race condition in CM0 ports, the fix also improves the ISR latency (bug 3193062)(backported to 2.2.2). @@ -84,10 +90,10 @@ 2.2.1). - FIX: Error in MAC driver (bug 3179783)(backported to 2.2.1). - FIX: Fixed wrong serial driver macros (bug 3173336)(backported to 2.2.1). -- NEW: Inproved preemption implementation for the Cortex-M0, now it uses +- NEW: Improved preemption implementation for the Cortex-M0, now it uses the NMI vector in order to restore the original context. The change makes IRQ handling faster and also saves some RAM/ROM space. The GCC port code - now does not inline the epilogue code in each ISR saving significan ROM + now does not inline the epilogue code in each ISR saving significant ROM space for each interrupt handler in the system (backported to 2.2.3). - NEW: Added "IRQ STORM" long duration tests for the STM32, LPC11xx and LPC11xx. The test demonstrates the system stability in a thread-intensive, diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index ab7fb1c5e..7fb08de10 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -42,7 +42,7 @@ static msg_t can_rx(void *p) { CANRxFrame rxmsg; (void)p; - chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); + chEvtRegister(&CAND1.rxfull_event, &el, 0); while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; @@ -51,7 +51,7 @@ static msg_t can_rx(void *p) { palTogglePad(IOPORT3, GPIOC_LED); } } - chEvtUnregister(&CAND1.cd_rxfull_event, &el); + chEvtUnregister(&CAND1.rxfull_event, &el); return 0; } @@ -63,12 +63,12 @@ static msg_t can_tx(void * p) { CANTxFrame txmsg; (void)p; - txmsg.cf_IDE = CAN_IDE_EXT; - txmsg.cf_EID = 0x01234567; - txmsg.cf_RTR = CAN_RTR_DATA; - txmsg.cf_DLC = 8; - txmsg.cf_data32[0] = 0x55AA55AA; - txmsg.cf_data32[1] = 0x00FF00FF; + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { canTransmit(&CAND1, &txmsg, MS2ST(100));