STM8L Demo and PAL driver working now.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2357 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
be60d348aa
commit
11c89928ea
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@ -39,13 +39,13 @@ void hwinit(void) {
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/*
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/*
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* TIM2 initialization as system tick.
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* TIM2 initialization as system tick.
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*/
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*/
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CLK->PCKENR1 |= 32; /* PCKEN15, TIM2 clock source.*/
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CLK->PCKENR1 |= CLK_PCKENR1_TIM2;
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TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
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TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
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TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
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TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
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TIM2->ARRL = (uint8_t)(TIM2_ARR);
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TIM2->ARRL = (uint8_t)(TIM2_ARR);
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TIM2->CNTRH = 0;
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TIM2->CNTRH = 0;
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TIM2->CNTRL = 0;
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TIM2->CNTRL = 0;
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TIM2->SR1 = 0;
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TIM2->SR1 = 0;
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TIM2->IER = 1; /* UIE */
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TIM2->IER = TIM_IER_UIE;
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TIM2->CR1 = 1; /* CEN */
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TIM2->CR1 = TIM_CR1_CEN;
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}
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}
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@ -116,7 +116,7 @@
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* Port C initial setup.
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* Port C initial setup.
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*/
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*/
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#define VAL_GPIOCODR 0
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#define VAL_GPIOCODR 0
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#define VAL_GPIOCDDR (1 < PC_LED4)
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#define VAL_GPIOCDDR (1 << PC_LED4)
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#define VAL_GPIOCCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOCCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOCCR2 0
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#define VAL_GPIOCCR2 0
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@ -132,7 +132,7 @@
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* Port E initial setup.
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* Port E initial setup.
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*/
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*/
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#define VAL_GPIOEODR 0
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#define VAL_GPIOEODR 0
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#define VAL_GPIOEDDR (1 < PE_LED3)
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#define VAL_GPIOEDDR (1 << PE_LED3)
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#define VAL_GPIOECR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOECR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOECR2 0
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#define VAL_GPIOECR2 0
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@ -144,6 +144,19 @@
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#define VAL_GPIOFCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOFCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOFCR2 0
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#define VAL_GPIOFCR2 0
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/*
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* TIM2-update ISR segment code. This code is injected into the appropriate
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* ISR by the HAL.
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*/
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#define _TIM2_UPDATE_ISR() { \
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if (TIM2->SR1 & TIM_SR1_UIF) { \
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chSysLockFromIsr(); \
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chSysTimerHandlerI(); \
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chSysUnlockFromIsr(); \
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TIM2->SR1 = 0; \
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} \
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}
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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@ -211,7 +211,7 @@ exception_vector_t const _vectab[] = {
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{0x82, _unhandled_exception}, /* vector18 */
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{0x82, _unhandled_exception}, /* vector18 */
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#endif
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#endif
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#if defined(_TIM2_OVERFLOW_ISR) || defined(_USART2_TRANSMIT_ISR)
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#if defined(_TIM2_UPDATE_ISR) || defined(_USART2_TRANSMIT_ISR)
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{0x82, vector19},
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{0x82, vector19},
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#else
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#else
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{0x82, _unhandled_exception}, /* vector19 */
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{0x82, _unhandled_exception}, /* vector19 */
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@ -29,14 +29,14 @@ static msg_t Thread1(void *arg) {
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(void)arg;
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(void)arg;
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while (TRUE) {
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while (TRUE) {
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palClearPad(GPIOC, PC_LED4);
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chThdSleepMilliseconds(500);
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palSetPad(GPIOC, PC_LED4);
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palSetPad(GPIOC, PC_LED4);
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chThdSleepMilliseconds(500);
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chThdSleepMilliseconds(500);
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palClearPad(GPIOE, PE_LED3);
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palClearPad(GPIOC, PC_LED4);
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chThdSleepMilliseconds(500);
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chThdSleepMilliseconds(500);
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palSetPad(GPIOE, PE_LED3);
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palSetPad(GPIOE, PE_LED3);
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chThdSleepMilliseconds(500);
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chThdSleepMilliseconds(500);
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palClearPad(GPIOE, PE_LED3);
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chThdSleepMilliseconds(500);
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}
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}
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return 0;
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return 0;
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}
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}
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@ -51,10 +51,6 @@ void main(void) {
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*/
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*/
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hwinit();
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hwinit();
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palClearPad(GPIOC, PC_LED4);
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palSetPad(GPIOE, PE_LED3);
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while(1);
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/*
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/*
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* OS initialization.
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* OS initialization.
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*/
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*/
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