diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c
index a252d6889..dd0cacd11 100644
--- a/os/hal/platforms/STM32/can_lld.c
+++ b/os/hal/platforms/STM32/can_lld.c
@@ -57,7 +57,7 @@ CANDriver CAND1;
  *
  * @isr
  */
-CH_IRQ_HANDLER(CAN1_TX_IRQHandler) {
+CH_IRQ_HANDLER(STM32_CAN1_TX_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -77,7 +77,7 @@ CH_IRQ_HANDLER(CAN1_TX_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) {
+CH_IRQ_HANDLER(STM32_CAN1_RX0_HANDLER) {
   uint32_t rf0r;
 
   CH_IRQ_PROLOGUE();
@@ -109,7 +109,7 @@ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) {
+CH_IRQ_HANDLER(STM32_CAN1_RX1_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -123,7 +123,7 @@ CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) {
+CH_IRQ_HANDLER(STM32_CAN1_SCE_HANDLER) {
   uint32_t msr;
 
   CH_IRQ_PROLOGUE();
@@ -184,13 +184,13 @@ void can_lld_start(CANDriver *canp) {
   /* Clock activation.*/
 #if STM32_CAN_USE_CAN1
   if (&CAND1 == canp) {
-    nvicEnableVector(CAN1_TX_IRQn,
+    nvicEnableVector(STM32_CAN1_TX_NUMBER,
                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
-    nvicEnableVector(CAN1_RX0_IRQn,
+    nvicEnableVector(STM32_CAN1_RX0_NUMBER,
                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
-    nvicEnableVector(CAN1_RX1_IRQn,
+    nvicEnableVector(STM32_CAN1_RX1_NUMBER,
                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
-    nvicEnableVector(CAN1_SCE_IRQn,
+    nvicEnableVector(STM32_CAN1_SCE_NUMBER,
                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
     rccEnableCAN1(FALSE);
   }
@@ -272,10 +272,10 @@ void can_lld_stop(CANDriver *canp) {
     if (&CAND1 == canp) {
       CAN1->MCR = 0x00010002;                   /* Register reset value.    */
       CAN1->IER = 0x00000000;                   /* All sources disabled.    */
-      nvicDisableVector(CAN1_TX_IRQn);
-      nvicDisableVector(CAN1_RX0_IRQn);
-      nvicDisableVector(CAN1_RX1_IRQn);
-      nvicDisableVector(CAN1_SCE_IRQn);
+      nvicDisableVector(STM32_CAN1_TX_NUMBER);
+      nvicDisableVector(STM32_CAN1_RX0_NUMBER);
+      nvicDisableVector(STM32_CAN1_RX1_NUMBER);
+      nvicDisableVector(STM32_CAN1_SCE_NUMBER);
       rccDisableCAN1(FALSE);
     }
 #endif
diff --git a/os/hal/platforms/STM32/stm32.h b/os/hal/platforms/STM32/stm32.h
index a872a2a00..eb64976cb 100644
--- a/os/hal/platforms/STM32/stm32.h
+++ b/os/hal/platforms/STM32/stm32.h
@@ -54,10 +54,6 @@
       defined(__DOXYGEN__)
 #include "stm32f10x.h"
 
-/* Resolving naming anomalies related to the STM32F1xx sub-family.*/
-#define CAN1_TX_IRQn        USB_HP_CAN1_TX_IRQn
-#define CAN1_RX0_IRQn       USB_LP_CAN1_RX0_IRQn
-
 #elif defined(STM32F2XX)
 #include "stm32f2xx.h"
 
diff --git a/os/hal/platforms/STM32F0xx/stm32_isr.h b/os/hal/platforms/STM32F0xx/stm32_isr.h
index 408636b72..a62fbc3cc 100644
--- a/os/hal/platforms/STM32F0xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F0xx/stm32_isr.h
@@ -37,6 +37,9 @@
  * @name    ISR names and numbers remapping
  * @{
  */
+/*
+ * TIM units.
+ */
 #define STM32_TIM1_UP_HANDLER       TIM1_BRK_UP_TRG_COM_IRQHandler
 #define STM32_TIM1_CC_HANDLER       TIM1_CC_IRQHandler
 #define STM32_TIM2_HANDLER          TIM2_IRQHandler
diff --git a/os/hal/platforms/STM32F1xx/stm32_isr.h b/os/hal/platforms/STM32F1xx/stm32_isr.h
index 18de3210e..660a061b9 100644
--- a/os/hal/platforms/STM32F1xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F1xx/stm32_isr.h
@@ -37,6 +37,30 @@
  * @name    ISR names and numbers remapping
  * @{
  */
+/*
+ * CAN units.
+ */
+#define STM32_CAN1_TX_HANDLER       CAN1_TX_IRQHandler
+#define STM32_CAN1_RX0_HANDLER      CAN1_RX0_IRQHandler
+#define STM32_CAN1_RX1_HANDLER      CAN1_RX1_IRQHandler
+#define STM32_CAN1_SCE_HANDLER      CAN1_SCE_IRQHandler
+#define STM32_CAN2_TX_HANDLER       CAN2_TX_IRQHandler
+#define STM32_CAN2_RX0_HANDLER      CAN2_RX0_IRQHandler
+#define STM32_CAN2_RX1_HANDLER      CAN2_RX1_IRQHandler
+#define STM32_CAN2_SCE_HANDLER      CAN2_SCE_IRQHandler
+
+#define STM32_CAN1_TX_NUMBER        USB_HP_CAN1_TX_IRQn
+#define STM32_CAN1_RX0_NUMBER       USB_LP_CAN1_RX0_IRQn
+#define STM32_CAN1_RX1_NUMBER       CAN1_RX1_IRQn
+#define STM32_CAN1_SCE_NUMBER       CAN2_SCE_IRQn
+#define STM32_CAN2_TX_NUMBER        CAN2_TX_IRQn
+#define STM32_CAN2_RX0_NUMBER       CAN2_RX0_IRQn
+#define STM32_CAN2_RX1_NUMBER       CAN2_RX1_IRQn
+#define STM32_CAN2_SCE_NUMBER       CAN2_SCE_IRQn
+
+/*
+ * TIM units.
+ */
 #if defined(STM32F10X_XL)
 #define STM32_TIM1_UP_HANDLER       TIM1_UP_IRQHandler
 #elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \
diff --git a/os/hal/platforms/STM32F2xx/stm32_isr.h b/os/hal/platforms/STM32F2xx/stm32_isr.h
index db3485400..99ef3b01c 100644
--- a/os/hal/platforms/STM32F2xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F2xx/stm32_isr.h
@@ -37,6 +37,30 @@
  * @name    ISR names and numbers remapping
  * @{
  */
+/*
+ * CAN units.
+ */
+#define STM32_CAN1_TX_HANDLER       CAN1_TX_IRQHandler
+#define STM32_CAN1_RX0_HANDLER      CAN1_RX0_IRQHandler
+#define STM32_CAN1_RX1_HANDLER      CAN1_RX1_IRQHandler
+#define STM32_CAN1_SCE_HANDLER      CAN1_SCE_IRQHandler
+#define STM32_CAN2_TX_HANDLER       CAN2_TX_IRQHandler
+#define STM32_CAN2_RX0_HANDLER      CAN2_RX0_IRQHandler
+#define STM32_CAN2_RX1_HANDLER      CAN2_RX1_IRQHandler
+#define STM32_CAN2_SCE_HANDLER      CAN2_SCE_IRQHandler
+
+#define STM32_CAN1_TX_NUMBER        USB_HP_CAN1_TX_IRQn
+#define STM32_CAN1_RX0_NUMBER       USB_LP_CAN1_RX0_IRQn
+#define STM32_CAN1_RX1_NUMBER       CAN1_RX1_IRQn
+#define STM32_CAN1_SCE_NUMBER       CAN2_SCE_IRQn
+#define STM32_CAN2_TX_NUMBER        CAN2_TX_IRQn
+#define STM32_CAN2_RX0_NUMBER       CAN2_RX0_IRQn
+#define STM32_CAN2_RX1_NUMBER       CAN2_RX1_IRQn
+#define STM32_CAN2_SCE_NUMBER       CAN2_SCE_IRQn
+
+/*
+ * TIM units.
+ */
 #define STM32_TIM1_UP_HANDLER       TIM1_UP_IRQHandler
 #define STM32_TIM1_CC_HANDLER       TIM1_CC_IRQHandler
 #define STM32_TIM2_HANDLER          TIM2_IRQHandler
diff --git a/os/hal/platforms/STM32F4xx/stm32_isr.h b/os/hal/platforms/STM32F4xx/stm32_isr.h
index b5b560a98..2dd6a0eab 100644
--- a/os/hal/platforms/STM32F4xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F4xx/stm32_isr.h
@@ -37,6 +37,30 @@
  * @name    ISR names and numbers remapping
  * @{
  */
+/*
+ * CAN units.
+ */
+#define STM32_CAN1_TX_HANDLER       CAN1_TX_IRQHandler
+#define STM32_CAN1_RX0_HANDLER      CAN1_RX0_IRQHandler
+#define STM32_CAN1_RX1_HANDLER      CAN1_RX1_IRQHandler
+#define STM32_CAN1_SCE_HANDLER      CAN1_SCE_IRQHandler
+#define STM32_CAN2_TX_HANDLER       CAN2_TX_IRQHandler
+#define STM32_CAN2_RX0_HANDLER      CAN2_RX0_IRQHandler
+#define STM32_CAN2_RX1_HANDLER      CAN2_RX1_IRQHandler
+#define STM32_CAN2_SCE_HANDLER      CAN2_SCE_IRQHandler
+
+#define STM32_CAN1_TX_NUMBER        USB_HP_CAN1_TX_IRQn
+#define STM32_CAN1_RX0_NUMBER       USB_LP_CAN1_RX0_IRQn
+#define STM32_CAN1_RX1_NUMBER       CAN1_RX1_IRQn
+#define STM32_CAN1_SCE_NUMBER       CAN2_SCE_IRQn
+#define STM32_CAN2_TX_NUMBER        CAN2_TX_IRQn
+#define STM32_CAN2_RX0_NUMBER       CAN2_RX0_IRQn
+#define STM32_CAN2_RX1_NUMBER       CAN2_RX1_IRQn
+#define STM32_CAN2_SCE_NUMBER       CAN2_SCE_IRQn
+
+/*
+ * TIM units.
+ */
 #define STM32_TIM1_UP_HANDLER       TIM1_UP_IRQHandler
 #define STM32_TIM1_CC_HANDLER       TIM1_CC_IRQHandler
 #define STM32_TIM2_HANDLER          TIM2_IRQHandler
diff --git a/os/hal/platforms/STM32L1xx/stm32_isr.h b/os/hal/platforms/STM32L1xx/stm32_isr.h
index 58f43fb2a..14bd457d9 100644
--- a/os/hal/platforms/STM32L1xx/stm32_isr.h
+++ b/os/hal/platforms/STM32L1xx/stm32_isr.h
@@ -37,6 +37,9 @@
  * @name    ISR names and numbers remapping
  * @{
  */
+/*
+ * TIM units.
+ */
 #define STM32_TIM2_HANDLER          TIM2_IRQHandler
 #define STM32_TIM3_HANDLER          TIM3_IRQHandler
 #define STM32_TIM4_HANDLER          TIM4_IRQHandler