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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@729 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2009-02-06 21:03:05 +00:00
parent 77df449498
commit 0ed5d7e2e0
10 changed files with 99 additions and 42 deletions
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2
demos/ARM7-AT91SAM7X-GCC/board.c
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@ -155,7 +155,7 @@ void hwinit1(void) {
/*
* Serial driver initialization, RTS/CTS pins enabled for USART0 only.
*/
InitSerial(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2);
sam7x_serial_init(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2);
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;

4
demos/ARM7-AT91SAM7X-WEB-GCC/board.c
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@ -156,7 +156,7 @@ void hwinit1(void) {
/*
* Serial driver initialization, RTS/CTS pins enabled for USART0 only.
*/
InitSerial(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2);
sam7x_serial_init(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2);
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
@ -164,7 +164,7 @@ void hwinit1(void) {
/*
* EMAC driver initialization.
*/
InitEMAC(AT91C_AIC_PRIOR_HIGHEST - 3);
sam7x_emac_init(AT91C_AIC_PRIOR_HIGHEST - 3);
/*
* ChibiOS/RT initialization.

9
ports/ARM7-AT91SAM7X/port.dox
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@ -21,3 +21,12 @@
* @ingroup AT91SAM7X
*/
/** @} */
/**
* @defgroup AT91SAM7X_EMAC EMAC Support
* @{
* @brief EMAC peripheral support.
*
* @ingroup AT91SAM7X
*/
/** @} */

20
ports/ARM7-AT91SAM7X/sam7x_emac.c
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@ -17,6 +17,13 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file ports/ARM7-AT91SAM7X/sam7x_emac.c
* @brief AT91SAM7X EMAC driver code.
* @addtogroup AT91SAM7X_EMAC
* @{
*/
#include <string.h>
#include <ch.h>
@ -26,13 +33,10 @@
#include "mii.h"
#include "at91lib/aic.h"
#define EMAC_RECEIVE_BUFFERS 24
#define EMAC_RECEIVE_BUFFERS_SIZE 128
#define EMAC_TRANSMIT_BUFFERS 2
#define EMAC_TRANSMIT_BUFFERS_SIZE 1518
EventSource EMACFrameTransmitted; /* A frame was transmitted. */
EventSource EMACFrameReceived; /* A frame was received. */
#ifndef __DOXYGEN__
//static int received; /* Buffered frames counter. */
static bool_t link_up; /* Last from EMACGetLinkStatus()*/
@ -45,8 +49,8 @@ static BufDescriptorEntry *rxptr;
static BufDescriptorEntry tent[EMAC_TRANSMIT_BUFFERS] __attribute__((aligned(8)));
static uint8_t tbuffers[EMAC_TRANSMIT_BUFFERS * EMAC_TRANSMIT_BUFFERS_SIZE] __attribute__((aligned(8)));
static BufDescriptorEntry *txptr;
#endif
#define PHY_ADDRESS 1
#define AT91C_PB15_ERXDV AT91C_PB15_ERXDV_ECRSDV
#define EMAC_PIN_MASK (AT91C_PB0_ETXCK_EREFCK | \
AT91C_PB1_ETXEN | AT91C_PB2_ETX0 | \
@ -136,7 +140,7 @@ CH_IRQ_HANDLER(EMACIrqHandler) {
/*
* EMAC subsystem initialization.
*/
void InitEMAC(int prio) {
void sam7x_emac_init(int prio) {
int i;
/*
@ -408,3 +412,5 @@ restart:
*sizep = size;
return found && !overflow;
}
/** @} */

18
ports/ARM7-AT91SAM7X/sam7x_emac.h
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@ -17,9 +17,23 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file ports/ARM7-AT91SAM7X/sam7x_emac.h
* @brief AT91SAM7X EMAC driver macros and structures.
* @addtogroup AT91SAM7X_EMAC
* @{
*/
#ifndef _SAM7X_EMAC_H_
#define _SAM7X_EMAC_H_
#define PHY_ADDRESS 1
#define EMAC_RECEIVE_BUFFERS 24
#define EMAC_RECEIVE_BUFFERS_SIZE 128
#define EMAC_TRANSMIT_BUFFERS 2
#define EMAC_TRANSMIT_BUFFERS_SIZE 1518
typedef struct {
uint32_t w1;
uint32_t w2;
@ -62,7 +76,7 @@ typedef struct {
#ifdef __cplusplus
extern "C" {
#endif
void InitEMAC(int prio);
void sam7x_emac_init(int prio);
void EMACSetAddress(const uint8_t *eaddr);
bool_t EMACGetLinkStatus(void);
BufDescriptorEntry *EMACGetTransmitBuffer(void);
@ -75,3 +89,5 @@ extern "C" {
extern EventSource EMACFrameTransmitted, EMACFrameReceived;
#endif /* _SAM7X_EMAC_H_ */
/** @} */

71
ports/ARM7-AT91SAM7X/sam7x_serial.c
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@ -125,9 +125,13 @@ static void OutNotify2(void) {
}
#endif
/*
* USART setup, must be invoked with interrupts disabled.
* NOTE: Does not reset I/O queues.
/**
* @brief UART setup.
* @param[in] u pointer to an UART I/O block
* @param[in] speed serial port speed in bits per second
* @param[in] mode mode flags
* @note Must be invoked with interrupts disabled.
* @note Does not reset the I/O queues.
*/
void SetUSART(AT91PS_USART u, int speed, int mode) {
@ -150,50 +154,69 @@ void SetUSART(AT91PS_USART u, int speed, int mode) {
AT91C_US_RXBRK;
}
/*
* Serial subsystem initialization.
* NOTE: Handshake pins are not switched to their function because they may have
* another use. Enable them externally if needed.
/**
* @brief Serial driver initialization.
* @param[in] prio0 priority to be assigned to the USART1 IRQ
* @param[in] prio1 priority to be assigned to the USART2 IRQ
* @note Handshake pads are not enabled inside this function because they
* may have another use, enable them externally if needed.
* RX and TX pads are handled inside.
*/
void InitSerial(int prio0, int prio1) {
void sam7x_serial_init(int prio0, int prio1) {
/* I/O queues setup.*/
#if USE_SAM7X_USART0 || defined(__DOXYGEN__)
/* I/O queue setup.*/
chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1);
chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
/* Switches the I/O pins to the peripheral function A, disables pullups.*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA0_RXD0 | AT91C_PA1_TXD0 |
AT91C_PA5_RXD1 | AT91C_PA6_TXD1;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA0 | AT91C_PIO_PA1 |
AT91C_PIO_PA5 | AT91C_PIO_PA6;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA0 | AT91C_PIO_PA1 |
AT91C_PIO_PA5 | AT91C_PIO_PA6;
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA0_RXD0 | AT91C_PA1_TXD0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA0 | AT91C_PIO_PA1;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA0 | AT91C_PIO_PA1;
/* Starts the clock and clears possible sources of immediate interrupts.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US0) | (1 << AT91C_ID_US1);
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US0);
AT91C_BASE_US0->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA;
AT91C_BASE_US1->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA;
/* Interrupts setup.*/
AIC_ConfigureIT(AT91C_ID_US0,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | prio0,
USART0IrqHandler);
AIC_EnableIT(AT91C_ID_US0);
/* Default parameters.*/
SetUSART(AT91C_BASE_US0, SAM7X_USART_BITRATE, AT91C_US_USMODE_NORMAL |
AT91C_US_CLKS_CLOCK |
AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE |
AT91C_US_NBSTOP_1_BIT);
#endif
#if USE_SAM7X_USART1 || defined(__DOXYGEN__)
/* I/O queues setup.*/
chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
/* Switches the I/O pins to the peripheral function A, disables pullups.*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA5_RXD1 | AT91C_PA6_TXD1;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA5 | AT91C_PIO_PA6;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA5 | AT91C_PIO_PA6;
/* Starts the clock and clears possible sources of immediate interrupts.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US1);
AT91C_BASE_US1->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA;
/* Interrupts setup.*/
AIC_ConfigureIT(AT91C_ID_US1,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | prio1,
USART1IrqHandler);
AIC_EnableIT(AT91C_ID_US1);
SetUSART(AT91C_BASE_US0, 38400, AT91C_US_USMODE_NORMAL |
AT91C_US_CLKS_CLOCK |
AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE |
AT91C_US_NBSTOP_1_BIT);
SetUSART(AT91C_BASE_US1, 38400, AT91C_US_USMODE_NORMAL |
/* Default parameters.*/
SetUSART(AT91C_BASE_US1, SAM7X_USART_BITRATE, AT91C_US_USMODE_NORMAL |
AT91C_US_CLKS_CLOCK |
AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE |
AT91C_US_NBSTOP_1_BIT);
#endif
}
/** @} */

6
ports/ARM7-AT91SAM7X/sam7x_serial.h
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@ -44,8 +44,8 @@
* @note It is possible to use @p SetUART() in order to change the working
* parameters at runtime.
*/
#if !defined(SAM7X_UART_BITRATE) || defined(__DOXYGEN__)
#define SAM7X_UART_BITRATE 38400
#if !defined(SAM7X_USART_BITRATE) || defined(__DOXYGEN__)
#define SAM7X_USART_BITRATE 38400
#endif
/**
@ -69,7 +69,7 @@
#ifdef __cplusplus
extern "C" {
#endif
void InitSerial(int prio0, int prio1);
void sam7x_serial_init(int prio0, int prio1);
void SetUSART(AT91PS_USART u, int speed, int mode);
CH_IRQ_HANDLER(UART0IrqHandler);
CH_IRQ_HANDLER(UART1IrqHandler);

1
ports/ARM7-LPC214x/lpc214x_serial.c
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@ -216,6 +216,7 @@ static void OutNotify2(void) {
* @param[in] lcr the value for the @p LCR register
* @param[in] fcr the value for the @p FCR register
* @note Must be invoked with interrupts disabled.
* @note Does not reset the I/O queues.
*/
void SetUART(UART *u, int speed, int lcr, int fcr) {

1
ports/ARMCM3-STM32F103/stm32_serial.c
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@ -158,6 +158,7 @@ static void OutNotify3(void) {
* @param[in] cr1 the value for the @p CR1 register
* @param[in] cr2 the value for the @p CR2 register
* @param[in] cr3 the value for the @p CR3 register
* @note Must be invoked with interrupts disabled.
* @note Does not reset the I/O queues.
*/
void SetUSART(USART_TypeDef *u, uint32_t speed, uint16_t cr1,

1
ports/MSP430/msp430_serial.c
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@ -173,6 +173,7 @@ static void OutNotify2(void) {
* @param[in] div the divider value as calculated by the @p UBR() macro
* @param[in] mod the value for the @p U1MCTL register
* @param[in] ctl the value for the @p U1CTL register.
* @note Must be invoked with interrupts disabled.
* @note Does not reset the I/O queues.
*/
void SetUSART1(uint16_t div, uint8_t mod, uint8_t ctl) {