git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6240 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
96be7a6300
commit
09fdbf9a37
|
@ -64,7 +64,7 @@ include $(CHIBIOS)/os/hal/osal/chibios/osal.mk
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include $(CHIBIOS)/os/hal/boards/ST_STM32F0_DISCOVERY/board.mk
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include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/devices/STM32F0xx/port.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f0xx.mk
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include $(CHIBIOS)/test/test.mk
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# Define linker script file here
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@ -206,4 +206,4 @@ ifeq ($(USE_FWLIB),yes)
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USE_OPT += -DUSE_STDPERIPH_DRIVER
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endif
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/rules.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/rules.mk
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@ -70,7 +70,7 @@ include $(CHIBIOS)/os/hal/osal/chibios/osal.mk
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include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk
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include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/devices/STM32F30x/port.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f30x.mk
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include $(CHIBIOS)/test/test.mk
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# Define linker script file here
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@ -222,4 +222,4 @@ ifeq ($(USE_FWLIB),yes)
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USE_OPT += -DUSE_STDPERIPH_DRIVER
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endif
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/rules.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/rules.mk
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@ -70,7 +70,7 @@ include $(CHIBIOS)/os/hal/osal/chibios/osal.mk
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include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk
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include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/devices/STM32F4xx/port.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk
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include $(CHIBIOS)/test/test.mk
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# Define linker script file here
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@ -223,4 +223,4 @@ ifeq ($(USE_FWLIB),yes)
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USE_OPT += -DUSE_STDPERIPH_DRIVER
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endif
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/rules.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/rules.mk
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@ -50,7 +50,7 @@
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* measurements.
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*/
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#if !defined(CH_CFG_RTC_FREQUENCY) || defined(__DOXYGEN__)
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#define CH_CFG_RTC_FREQUENCY 72000000
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#define CH_CFG_RTC_FREQUENCY 168000000
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#endif
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/**
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@ -97,7 +97,7 @@
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* @brief Enables the PWM subsystem.
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*/
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#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
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#define HAL_USE_PWM FALSE
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#define HAL_USE_PWM TRUE
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#endif
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/**
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@ -125,14 +125,14 @@
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* @brief Enables the SERIAL over USB subsystem.
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*/
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#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
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#define HAL_USE_SERIAL_USB FALSE
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#define HAL_USE_SERIAL_USB TRUE
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#endif
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/**
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* @brief Enables the SPI subsystem.
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*/
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#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
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#define HAL_USE_SPI FALSE
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#define HAL_USE_SPI TRUE
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#endif
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/**
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@ -146,7 +146,7 @@
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* @brief Enables the USB subsystem.
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*/
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#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
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#define HAL_USE_USB FALSE
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#define HAL_USE_USB TRUE
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#endif
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/*===========================================================================*/
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@ -50,33 +50,32 @@ static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {
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static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {
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static const char *states[] = {CH_THD_STATE_NAMES};
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Thread *tp;
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thread_t *tp;
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(void)argv;
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if (argc > 0) {
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chprintf(chp, "Usage: threads\r\n");
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return;
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}
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chprintf(chp, " addr stack prio refs state time\r\n");
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chprintf(chp, " addr stack prio refs state\r\n");
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tp = chRegFirstThread();
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do {
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chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n",
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chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s\r\n",
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(uint32_t)tp, (uint32_t)tp->p_ctx.r13,
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(uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
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states[tp->p_state], (uint32_t)tp->p_time);
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(uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1));
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tp = chRegNextThread(tp);
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} while (tp != NULL);
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}
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static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {
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Thread *tp;
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thread_t *tp;
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(void)argv;
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if (argc > 0) {
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chprintf(chp, "Usage: test\r\n");
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return;
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}
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tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(),
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tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(),
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TestThread, chp);
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if (tp == NULL) {
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chprintf(chp, "out of memory\r\n");
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@ -223,7 +222,7 @@ static msg_t Thread1(void *arg) {
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* Application entry point.
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*/
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int main(void) {
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Thread *shelltp = NULL;
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thread_t *shelltp = NULL;
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/*
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* System initializations.
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@ -70,7 +70,7 @@ include $(CHIBIOS)/os/hal/osal/chibios/osal.mk
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include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk
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include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/devices/STM32F4xx/port.mk
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk
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include $(CHIBIOS)/test/test.mk
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# Define linker script file here
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@ -222,4 +222,4 @@ ifeq ($(USE_FWLIB),yes)
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USE_OPT += -DUSE_STDPERIPH_DRIVER
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endif
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include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/rules.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/rules.mk
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@ -0,0 +1,83 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32F0xx/cmparams.h
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* @brief ARM Cortex-M0 parameters for the STM32F0xx.
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*
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* @defgroup ARMCMx_STM32F0xx STM32F0xx Specific Parameters
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* @ingroup ARMCMx_SPECIFIC
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* @details This file contains the Cortex-M0 specific parameters for the
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* STM32F0xx platform.
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* @{
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*/
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#ifndef _CMPARAMS_H_
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#define _CMPARAMS_H_
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/**
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* @brief Cortex core model.
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*/
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#define CORTEX_MODEL CORTEX_M0
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/**
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* @brief Memory Protection unit presence.
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*/
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#define CORTEX_HAS_MPU 0
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/**
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* @brief Floating Point unit presence.
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*/
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#define CORTEX_HAS_FPU 0
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/**
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* @brief Number of bits in priority masks.
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*/
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#define CORTEX_PRIORITY_BITS 2
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/**
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* @brief Number of interrupt vectors.
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* @note This number does not include the 16 system vectors and must be
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* rounded to a multiple of 4.
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*/
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#define CORTEX_NUM_VECTORS 32
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/* The following code is not processed when the file is included from an
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asm module.*/
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#if !defined(_FROM_ASM_)
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/* Including the device CMSIS header. Note, we are not using the definitions
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from this header because we need this file to be usable also from
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assembler source files. We verify that the info matches instead.*/
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#include "stm32f0xx.h"
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#if !CORTEX_HAS_MPU != !__MPU_PRESENT
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#error "CMSIS __MPU_PRESENT mismatch"
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#endif
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#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
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#error "CMSIS __NVIC_PRIO_BITS mismatch"
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#endif
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#endif /* !defined(_FROM_ASM_) */
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#endif /* _CMPARAMS_H_ */
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/** @} */
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@ -0,0 +1,87 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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|
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32F3xx/cmparams.h
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* @brief ARM Cortex-M4 parameters for the STM32F3xx.
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*
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* @defgroup ARMCMx_STM32F3xx STM32F3xx Specific Parameters
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* @ingroup ARMCMx_SPECIFIC
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* @details This file contains the Cortex-M4 specific parameters for the
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* STM32F3xx platform.
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* @{
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*/
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#ifndef _CMPARAMS_H_
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#define _CMPARAMS_H_
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/**
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* @brief Cortex core model.
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*/
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#define CORTEX_MODEL CORTEX_M4
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/**
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* @brief Memory Protection unit presence.
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*/
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#define CORTEX_HAS_MPU 1
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/**
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* @brief Floating Point unit presence.
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*/
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#define CORTEX_HAS_FPU 1
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/**
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* @brief Number of bits in priority masks.
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*/
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#define CORTEX_PRIORITY_BITS 4
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/**
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* @brief Number of interrupt vectors.
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* @note This number does not include the 16 system vectors and must be
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* rounded to a multiple of 4.
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*/
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#define CORTEX_NUM_VECTORS 88
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/* The following code is not processed when the file is included from an
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asm module.*/
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#if !defined(_FROM_ASM_)
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|
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/* Including the device CMSIS header. Note, we are not using the definitions
|
||||
from this header because we need this file to be usable also from
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assembler source files. We verify that the info matches instead.*/
|
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#include "stm32f30x.h"
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#if !CORTEX_HAS_MPU != !__MPU_PRESENT
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#error "CMSIS __MPU_PRESENT mismatch"
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#endif
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#if !CORTEX_HAS_FPU != !__FPU_PRESENT
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#error "CMSIS __FPU_PRESENT mismatch"
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#endif
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#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
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#error "CMSIS __NVIC_PRIO_BITS mismatch"
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#endif
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#endif /* !defined(_FROM_ASM_) */
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#endif /* _CMPARAMS_H_ */
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/** @} */
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|
@ -0,0 +1,87 @@
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/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file STM32F4xx/cmparams.h
|
||||
* @brief ARM Cortex-M4 parameters for the STM32F4xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F4xx STM32F4xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M4 specific parameters for the
|
||||
* STM32F4xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
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#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M4
|
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|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU 1
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU 1
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
/**
|
||||
* @brief Number of interrupt vectors.
|
||||
* @note This number does not include the 16 system vectors and must be
|
||||
* rounded to a multiple of 4.
|
||||
*/
|
||||
#define CORTEX_NUM_VECTORS 88
|
||||
|
||||
/* The following code is not processed when the file is included from an
|
||||
asm module.*/
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/* Including the device CMSIS header. Note, we are not using the definitions
|
||||
from this header because we need this file to be usable also from
|
||||
assembler source files. We verify that the info matches instead.*/
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
#if !CORTEX_HAS_MPU != !__MPU_PRESENT
|
||||
#error "CMSIS __MPU_PRESENT mismatch"
|
||||
#endif
|
||||
|
||||
#if !CORTEX_HAS_FPU != !__FPU_PRESENT
|
||||
#error "CMSIS __FPU_PRESENT mismatch"
|
||||
#endif
|
||||
|
||||
#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
|
||||
#error "CMSIS __NVIC_PRIO_BITS mismatch"
|
||||
#endif
|
||||
|
||||
#endif /* !defined(_FROM_ASM_) */
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,29 @@
|
|||
*****************************************************************************
|
||||
*** ChibiOS products directory organization ***
|
||||
*****************************************************************************
|
||||
|
||||
--{root} - Distribution directory.
|
||||
+--os/ - ChibiOS products, this directory.
|
||||
| +--ext/ - Vendor files.
|
||||
| +--common/ - Files used by multiple ChibiOS products.
|
||||
| | +--ports - Common port files for various architectures and
|
||||
| | compilers.
|
||||
| +--hal/ - Hardware Abstraction Layer product.
|
||||
| | +--include/ - HAL high level headers.
|
||||
| | +--src/ - HAL high level sources.
|
||||
| | +--platforms/ - HAL low level drivers implementations.
|
||||
| | +--templates/ - Driver template files.
|
||||
| | +--meta/ - Driver meta templates.
|
||||
| +--rt/ - ChibiOS/RT kernel portable files.
|
||||
| | +--include/ - RT kernel headers.
|
||||
| | +--src/ - RT kernel sources.
|
||||
| | +--templates/ - RT kernel port template files.
|
||||
| | +--ports - RT kernel port files for various architectures and
|
||||
| | compilers.
|
||||
| +--nil/ - ChibiOS/NIL kernel portable files.
|
||||
| | +--include/ - Nil kernel headers.
|
||||
| | +--src/ - Nil kernel sources.
|
||||
| | +--templates/ - Nil kernel port template files.
|
||||
| | +--ports - Nil kernel port files for various architectures and
|
||||
| | compilers.
|
||||
| +--various/ - Various portable support files.
|
|
@ -0,0 +1,15 @@
|
|||
# List of the ChibiOS/RT Cortex-M0 STM32F0xx port files.
|
||||
PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \
|
||||
$(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v6m.c
|
||||
|
||||
PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
|
||||
${CHIBIOS}/os/ext/CMSIS/ST \
|
||||
${CHIBIOS}/os/common/ports/ARMCMx/devices/STM32F0xx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/common/ports/ARMCMx/compilers/GCC/ld
|
|
@ -0,0 +1,15 @@
|
|||
# List of the ChibiOS/RT Cortex-M4 STM32F30x port files.
|
||||
PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \
|
||||
$(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c
|
||||
|
||||
PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
|
||||
${CHIBIOS}/os/ext/CMSIS/ST \
|
||||
${CHIBIOS}/os/common/ports/ARMCMx/devices/STM32F30x \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/common/ports/ARMCMx/compilers/GCC/ld
|
|
@ -0,0 +1,15 @@
|
|||
# List of the ChibiOS/RT Cortex-M0 STM32F4xx port files.
|
||||
PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \
|
||||
$(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c
|
||||
|
||||
PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
|
||||
${CHIBIOS}/os/ext/CMSIS/ST \
|
||||
${CHIBIOS}/os/common/ports/ARMCMx/devices/STM32F4xx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/common/ports/ARMCMx/compilers/GCC/ld
|
|
@ -1,15 +0,0 @@
|
|||
# List of the ChibiOS/RT Cortex-M0 STM32F0xx port files.
|
||||
PORTSRC = ${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v6m.c \
|
||||
$(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/crt0.c \
|
||||
$(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/vectors.c \
|
||||
|
||||
PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
|
||||
${CHIBIOS}/os/ext/CMSIS/ST \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/devices/STM32F0xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC/ld
|
|
@ -1,15 +0,0 @@
|
|||
# List of the ChibiOS/RT Cortex-M4 STM32F30x port files.
|
||||
PORTSRC = ${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c \
|
||||
$(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/crt0.c \
|
||||
$(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/vectors.c \
|
||||
|
||||
PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
|
||||
${CHIBIOS}/os/ext/CMSIS/ST \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/devices/STM32F30x
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC/ld
|
|
@ -1,15 +0,0 @@
|
|||
# List of the ChibiOS/RT Cortex-M0 STM32F4xx port files.
|
||||
PORTSRC = ${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c \
|
||||
$(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/crt0.c \
|
||||
$(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/vectors.c \
|
||||
|
||||
PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
|
||||
${CHIBIOS}/os/ext/CMSIS/ST \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC \
|
||||
${CHIBIOS}/os/rt/ports/ARMCMx/devices/STM32F4xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC/ld
|
Loading…
Reference in New Issue