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Fixed bug 3411774. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3367 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2011-09-20 17:33:38 +00:00
parent 2eae001460
commit 01596d8b5e
9 changed files with 96 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
os/hal/platforms/STM32F1xx/hal_lld.h
View File

@ -82,6 +82,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -123,8 +125,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 FALSE #define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART3 FALSE
#define STM32_HAS_UART4 FALSE #define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB FALSE #define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -150,6 +153,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -191,8 +196,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 FALSE
#define STM32_HAS_UART4 FALSE #define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB FALSE #define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -218,6 +224,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -259,8 +267,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 FALSE #define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART3 FALSE
#define STM32_HAS_UART4 FALSE #define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB FALSE #define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -286,6 +295,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -327,8 +338,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 FALSE
#define STM32_HAS_UART4 FALSE #define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB TRUE #define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -354,6 +366,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -395,8 +409,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 TRUE
#define STM32_HAS_UART4 TRUE #define STM32_HAS_UART4 TRUE
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB TRUE #define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -422,6 +437,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 19
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -463,8 +480,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 TRUE
#define STM32_HAS_UART4 TRUE #define STM32_HAS_UART4 TRUE
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB TRUE #define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -490,6 +508,8 @@
#define STM32_HAS_ETH TRUE #define STM32_HAS_ETH TRUE
#define STM32_EXTI_NUM_CHANNELS 20
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -531,8 +551,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 TRUE
#define STM32_HAS_UART4 TRUE #define STM32_HAS_UART4 TRUE
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB FALSE #define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE #define STM32_HAS_OTG1 TRUE

13
os/hal/platforms/STM32F1xx/hal_lld_f100.h
View File

@ -87,10 +87,11 @@
#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */ #define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */ #define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock */ #define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */
#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock */ #define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */
#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock */ #define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */
#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as RTC clock */ #define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as
RTC clock. */
/*===========================================================================*/ /*===========================================================================*/
/* Platform specific friendly IRQ names. */ /* Platform specific friendly IRQ names. */
@ -143,8 +144,8 @@
#define USART3_IRQHandler VectorDC /**< USART3. */ #define USART3_IRQHandler VectorDC /**< USART3. */
#endif #endif
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */ #define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */ #define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
#define CEC_IRQHandler VectorE8 /**< CEC. */ #define CEC_IRQHandler VectorE8 /**< CEC. */
#define TIM12_IRQHandler VectorEC /**< TIM12. */ #define TIM12_IRQHandler VectorEC /**< TIM12. */
#define TIM13_IRQHandler VectorF0 /**< TIM13. */ #define TIM13_IRQHandler VectorF0 /**< TIM13. */
#define TIM14_IRQHandler VectorF4 /**< TIM14. */ #define TIM14_IRQHandler VectorF4 /**< TIM14. */

13
os/hal/platforms/STM32F1xx/hal_lld_f103.h
View File

@ -90,10 +90,11 @@
#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */ #define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */ #define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock */ #define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */
#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock */ #define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */
#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock */ #define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */
#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as RTC clock */ #define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as
RTC clock. */
/*===========================================================================*/ /*===========================================================================*/
/* Platform specific friendly IRQ names. */ /* Platform specific friendly IRQ names. */
@ -144,8 +145,8 @@
#define USART2_IRQHandler VectorD8 /**< USART2. */ #define USART2_IRQHandler VectorD8 /**< USART2. */
#define USART3_IRQHandler VectorDC /**< USART3. */ #define USART3_IRQHandler VectorDC /**< USART3. */
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */ #define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */ #define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
#define USBWakeUp_IRQHandler VectorE8 /**< USB Wakeup from suspend. */ #define USB_FS_WKUP_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
#define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */ #define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */
#define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */ #define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */
#define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and #define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and

11
os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h
View File

@ -92,10 +92,11 @@
#define STM32_MCO_XT1 (10 << 24) /**< XT1 clock on MCO pin. */ #define STM32_MCO_XT1 (10 << 24) /**< XT1 clock on MCO pin. */
#define STM32_MCO_PLL3 (11 << 24) /**< PLL3 clock on MCO pin. */ #define STM32_MCO_PLL3 (11 << 24) /**< PLL3 clock on MCO pin. */
#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock */ #define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */
#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock */ #define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */
#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock */ #define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */
#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as RTC clock */ #define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as
RTC clock. */
/* RCC_CFGR2 register bits definitions.*/ /* RCC_CFGR2 register bits definitions.*/
#define STM32_PREDIV1SRC_HSE (0 << 16) /**< PREDIV1 source is HSE. */ #define STM32_PREDIV1SRC_HSE (0 << 16) /**< PREDIV1 source is HSE. */
@ -148,7 +149,7 @@
#define USART2_IRQHandler VectorD8 /**< USART2. */ #define USART2_IRQHandler VectorD8 /**< USART2. */
#define USART3_IRQHandler VectorDC /**< USART3. */ #define USART3_IRQHandler VectorDC /**< USART3. */
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */ #define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTCAlarm_IRQHandler VectorE4 /**< RTC alarm through EXTI #define RTC_Alarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
line. */ line. */
#define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through #define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through
EXTI line. */ EXTI line. */

36
os/hal/platforms/STM32F1xx/stm32f10x.h
View File

@ -217,8 +217,10 @@ typedef enum IRQn
USART1_IRQn = 37, /*!< USART1 global Interrupt */ USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USB_FS_WKUP_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
#endif /* STM32F10X_LD */ #endif /* STM32F10X_LD */
#ifdef STM32F10X_LD_VL #ifdef STM32F10X_LD_VL
@ -236,7 +238,8 @@ typedef enum IRQn
USART1_IRQn = 37, /*!< USART1 global Interrupt */ USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */
TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */
TIM7_IRQn = 55 /*!< TIM7 Interrupt */ TIM7_IRQn = 55 /*!< TIM7 Interrupt */
@ -266,8 +269,10 @@ typedef enum IRQn
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */ USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USB_FS_WKUP_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
#endif /* STM32F10X_MD */ #endif /* STM32F10X_MD */
#ifdef STM32F10X_MD_VL #ifdef STM32F10X_MD_VL
@ -290,7 +295,8 @@ typedef enum IRQn
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */ USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */
TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */
TIM7_IRQn = 55 /*!< TIM7 Interrupt */ TIM7_IRQn = 55 /*!< TIM7 Interrupt */
@ -320,8 +326,10 @@ typedef enum IRQn
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */ USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USB_FS_WKUP_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */
TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */
TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */
@ -361,7 +369,8 @@ typedef enum IRQn
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */ USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */
TIM12_IRQn = 43, /*!< TIM12 global Interrupt */ TIM12_IRQn = 43, /*!< TIM12 global Interrupt */
TIM13_IRQn = 44, /*!< TIM13 global Interrupt */ TIM13_IRQn = 44, /*!< TIM13 global Interrupt */
@ -405,8 +414,10 @@ typedef enum IRQn
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */ USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
USB_FS_WKUP_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global Interrupt */ TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global Interrupt */
TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global Interrupt */ TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global Interrupt */
TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */ TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
@ -450,7 +461,8 @@ typedef enum IRQn
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */ USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ /* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */ OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */
TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ TIM5_IRQn = 50, /*!< TIM5 global Interrupt */
SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ SPI3_IRQn = 51, /*!< SPI3 global Interrupt */

17
os/hal/platforms/STM32F2xx/hal_lld.h
View File

@ -133,7 +133,7 @@
/* STM32F2xx capabilities.*/ /* STM32F2xx capabilities.*/
#define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC1 TRUE
#define STM32_HAS_ADC2 TRUE #define STM32_HAS_ADC2 TRUE
#define STM32_HAS_ADC3 FALSE #define STM32_HAS_ADC3 TRUE
#define STM32_HAS_CAN1 TRUE #define STM32_HAS_CAN1 TRUE
#define STM32_HAS_CAN2 TRUE #define STM32_HAS_CAN2 TRUE
@ -145,6 +145,8 @@
#define STM32_HAS_ETH TRUE #define STM32_HAS_ETH TRUE
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -171,8 +173,8 @@
#define STM32_HAS_TIM3 TRUE #define STM32_HAS_TIM3 TRUE
#define STM32_HAS_TIM4 TRUE #define STM32_HAS_TIM4 TRUE
#define STM32_HAS_TIM5 TRUE #define STM32_HAS_TIM5 TRUE
#define STM32_HAS_TIM6 TRUE #define STM32_HAS_TIM6 FALSE
#define STM32_HAS_TIM7 TRUE #define STM32_HAS_TIM7 FALSE
#define STM32_HAS_TIM8 TRUE #define STM32_HAS_TIM8 TRUE
#define STM32_HAS_TIM9 TRUE #define STM32_HAS_TIM9 TRUE
#define STM32_HAS_TIM10 TRUE #define STM32_HAS_TIM10 TRUE
@ -187,10 +189,11 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 FALSE #define STM32_HAS_UART4 TRUE
#define STM32_HAS_UART4 FALSE #define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 TRUE
#define STM32_HAS_USB TRUE #define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE #define STM32_HAS_OTG1 TRUE
/*===========================================================================*/ /*===========================================================================*/
@ -240,7 +243,7 @@
#define USART2_IRQHandler VectorD8 /**< USART2. */ #define USART2_IRQHandler VectorD8 /**< USART2. */
#define USART3_IRQHandler VectorDC /**< USART3. */ #define USART3_IRQHandler VectorDC /**< USART3. */
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */ #define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTCAlarm_IRQHandler VectorE4 /**< RTC alarm through EXTI #define RTC_Alarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
line. */ line. */
#define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through #define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through
EXTI line. */ EXTI line. */

17
os/hal/platforms/STM32L1xx/hal_lld.h
View File

@ -148,6 +148,8 @@
#define STM32_HAS_ETH FALSE #define STM32_HAS_ETH FALSE
#define STM32_EXTI_NUM_CHANNELS 23
#define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE #define STM32_HAS_GPIOC TRUE
@ -189,8 +191,9 @@
#define STM32_HAS_USART1 TRUE #define STM32_HAS_USART1 TRUE
#define STM32_HAS_USART2 TRUE #define STM32_HAS_USART2 TRUE
#define STM32_HAS_USART3 TRUE #define STM32_HAS_USART3 TRUE
#define STM32_HAS_UART3 FALSE
#define STM32_HAS_UART4 FALSE #define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_USB TRUE #define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG1 FALSE
@ -201,8 +204,10 @@
#define WWDG_IRQHandler Vector40 /**< Window Watchdog. */ #define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
#define PVD_IRQHandler Vector44 /**< PVD through EXTI Line #define PVD_IRQHandler Vector44 /**< PVD through EXTI Line
detect. */ detect. */
#define TAMPER_IRQHandler Vector48 /**< Tamper. */ #define TAMPER_STAMP_IRQHandler Vector48 /**< Tamper and Time Stamp
#define RTC_IRQHandler Vector4C /**< RTC. */ through EXTI. */
#define RTC_WKUP_IRQHandler Vector4C /**< RTC Wakeup Timer through
EXTI. */
#define FLASH_IRQHandler Vector50 /**< Flash. */ #define FLASH_IRQHandler Vector50 /**< Flash. */
#define RCC_IRQHandler Vector54 /**< RCC. */ #define RCC_IRQHandler Vector54 /**< RCC. */
#define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */ #define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
@ -221,7 +226,7 @@
#define USB_HP_IRQHandler Vector8C /**< USB High Priority. */ #define USB_HP_IRQHandler Vector8C /**< USB High Priority. */
#define USB_LP_IRQHandler Vector90 /**< USB Low Priority. */ #define USB_LP_IRQHandler Vector90 /**< USB Low Priority. */
#define DAC_IRQHandler Vector94 /**< DAC. */ #define DAC_IRQHandler Vector94 /**< DAC. */
#define COMP_IRQHandler Vector98 /**< COMP. */ #define COMP_IRQHandler Vector98 /**< Comparator through EXTI. */
#define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */ #define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
#define TIM9_IRQHandler VectorA0 /**< TIM9. */ #define TIM9_IRQHandler VectorA0 /**< TIM9. */
#define TIM10_IRQHandler VectorA4 /**< TIM10. */ #define TIM10_IRQHandler VectorA4 /**< TIM10. */
@ -240,8 +245,8 @@
#define USART2_IRQHandler VectorD8 /**< USART2. */ #define USART2_IRQHandler VectorD8 /**< USART2. */
#define USART3_IRQHandler VectorDC /**< USART3. */ #define USART3_IRQHandler VectorDC /**< USART3. */
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */ #define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */ #define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
#define USBWakeUp_IRQHandler VectorE8 /**< USB Wakeup from suspend. */ #define USB_FS_WKUP_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
#define TIM6_IRQHandler VectorEC /**< TIM6. */ #define TIM6_IRQHandler VectorEC /**< TIM6. */
#define TIM7_IRQHandler VectorF0 /**< TIM7. */ #define TIM7_IRQHandler VectorF0 /**< TIM7. */
/** @} */ /** @} */

1
os/hal/platforms/STM32L1xx/platform.mk
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@ -1,6 +1,7 @@
# List of all the STM32L1xx platform files. # List of all the STM32L1xx platform files.
PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32L1xx/hal_lld.c \ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32L1xx/hal_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/ext_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \

2
readme.txt
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@ -73,6 +73,8 @@
***************************************************************************** *****************************************************************************
*** 2.3.3 *** *** 2.3.3 ***
- FIX: Fixed missing UART5 definition in STM32 HAL (bug 3411774)(backported
to 2.2.8).
- FIX: The function chThdExit() triggers an error on shell return when the - FIX: The function chThdExit() triggers an error on shell return when the
system state checker is enabled (bug 3411207)(backported to 2.2.8). system state checker is enabled (bug 3411207)(backported to 2.2.8).
- FIX: Some ARMCMx makefiles refer the file rules.mk in the ARM7 port (bug - FIX: Some ARMCMx makefiles refer the file rules.mk in the ARM7 port (bug